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| author | Michael Meissner <gnu@the-meissners.org> | 1996-08-06 15:55:32 +0000 |
|---|---|---|
| committer | Michael Meissner <gnu@the-meissners.org> | 1996-08-06 15:55:32 +0000 |
| commit | 2e913166b1be63e4a327c9c2f37f0115fece6595 (patch) | |
| tree | 2242deb73e41d1fd8a29671bcf348690a20bbd78 /sim/ppc/ppc-cache-rules | |
| parent | 5fac6a39dc2b8704850d7bec599bc9ae281af3bd (diff) | |
| download | gdb-2e913166b1be63e4a327c9c2f37f0115fece6595.zip gdb-2e913166b1be63e4a327c9c2f37f0115fece6595.tar.gz gdb-2e913166b1be63e4a327c9c2f37f0115fece6595.tar.bz2 | |
7/30 release from Andrew
Diffstat (limited to 'sim/ppc/ppc-cache-rules')
| -rw-r--r-- | sim/ppc/ppc-cache-rules | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/ppc/ppc-cache-rules b/sim/ppc/ppc-cache-rules index 88c55e8..270fb4a 100644 --- a/sim/ppc/ppc-cache-rules +++ b/sim/ppc/ppc-cache-rules @@ -23,10 +23,10 @@ cache:RA:RA_BITMASK:unsigned32:(1 << RA) cache:RT:RT:: cache:RT:rT:signed_word *:(cpu_registers(processor)->gpr + RT) cache:RT:RT_BITMASK:unsigned32:(1 << RT) -compute:RS:RS:: +cache:RS:RS:: cache:RS:rS:signed_word *:(cpu_registers(processor)->gpr + RS) cache:RS:RS_BITMASK:unsigned32:(1 << RS) -compute:RB:RB:: +cache:RB:RB:: cache:RB:rB:signed_word *:(cpu_registers(processor)->gpr + RB) cache:RB:RB_BITMASK:unsigned32:(1 << RB) compute:FRA:FRA:: |