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| author | Jim Blandy <jimb@codesourcery.com> | 2004-06-28 19:02:49 +0000 |
|---|---|---|
| committer | Jim Blandy <jimb@codesourcery.com> | 2004-06-28 19:02:49 +0000 |
| commit | 71d39cfcfd3409f3746a20edc34f2106900ae1cb (patch) | |
| tree | c20e9400d1de5a4f9c272cb77aaf9f3d98a0e5c5 /sim/ppc/e500_registers.h | |
| parent | 06d5cf63af68c61ed05d1383d74d39073ffb9c6c (diff) | |
| download | gdb-71d39cfcfd3409f3746a20edc34f2106900ae1cb.zip gdb-71d39cfcfd3409f3746a20edc34f2106900ae1cb.tar.gz gdb-71d39cfcfd3409f3746a20edc34f2106900ae1cb.tar.bz2 | |
* e500_registers.h (EVR): Cast the 32-bit value of the GPR to an
unsigned type before or-ing it with a 64-bit value.
Diffstat (limited to 'sim/ppc/e500_registers.h')
| -rw-r--r-- | sim/ppc/e500_registers.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sim/ppc/e500_registers.h b/sim/ppc/e500_registers.h index cd12ab5..ccf5e0f 100644 --- a/sim/ppc/e500_registers.h +++ b/sim/ppc/e500_registers.h @@ -79,5 +79,8 @@ struct e500_regs { /* e500 register high bits */ #define GPRH(N) cpu_registers(processor)->e500.gprh[N] -/* e500 unified vector register */ -#define EVR(N) ((((unsigned64)GPRH(N)) << 32) | GPR(N)) +/* e500 unified vector register + We need to cast the gpr value to an unsigned type so that it + doesn't get sign-extended when it's or-ed with a 64-bit value; that + would wipe out the upper 32 bits of the register's value. */ +#define EVR(N) ((((unsigned64)GPRH(N)) << 32) | (unsigned32) GPR(N)) |