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| author | Michael Meissner <gnu@the-meissners.org> | 1995-10-16 20:17:35 +0000 |
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| committer | Michael Meissner <gnu@the-meissners.org> | 1995-10-16 20:17:35 +0000 |
| commit | 9aa8a7883966f3e4d5b8d53bc78399347d47e9dd (patch) | |
| tree | d9266a1ac9aea8445c7ae7e512f44ef8f36aaa29 /sim/ppc/ChangeLog | |
| parent | 4704fd9cab13f8c6f95f02f7fae15ad260e1b5b6 (diff) | |
| download | gdb-9aa8a7883966f3e4d5b8d53bc78399347d47e9dd.zip gdb-9aa8a7883966f3e4d5b8d53bc78399347d47e9dd.tar.gz gdb-9aa8a7883966f3e4d5b8d53bc78399347d47e9dd.tar.bz2 | |
Speedups from Andrew
Diffstat (limited to 'sim/ppc/ChangeLog')
| -rw-r--r-- | sim/ppc/ChangeLog | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog index 543f82f..2ad375d 100644 --- a/sim/ppc/ChangeLog +++ b/sim/ppc/ChangeLog @@ -1,5 +1,14 @@ +Wed Oct 11 17:13:15 1995 Andrew Cagney <cagney@highland.com.au> + + * gen.c, ppc-instructions, psim.c: Fix code for generating + cracking instruction cache. Delete the code that cached just the + result from doing an instruction lookup - this ran slower than no + cache at all. + Fri Oct 13 09:58:43 1995 Michael Meissner <meissner@tiktok.cygnus.com> + * Makefile.in (gen.o): Include $(INLINE_CFLAGS). + * debug.h (ppc_trace): Rename from trace, to avoid a conflict with TCL when gdb is linked with the simulator. * debug.c (ppc_trace): Ditto. |