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| author | Mike Frysinger <vapier@gentoo.org> | 2022-12-25 00:49:11 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2022-12-25 02:10:46 -0500 |
| commit | fc9b04458287e58365b1de8eaf6b626ac11743c2 (patch) | |
| tree | 0166d5cddb2e0285f263e22a199f7e09eb535f1f /sim/msp430 | |
| parent | 21a0fa89d25d2d12c3d1c3a477e8f49efff430df (diff) | |
| download | gdb-fc9b04458287e58365b1de8eaf6b626ac11743c2.zip gdb-fc9b04458287e58365b1de8eaf6b626ac11743c2.tar.gz gdb-fc9b04458287e58365b1de8eaf6b626ac11743c2.tar.bz2 | |
sim: msp430: add basic SMP cpu init
There's no need to assert there's only 1 CPU when setting them all
up here is trivial.
Diffstat (limited to 'sim/msp430')
| -rw-r--r-- | sim/msp430/msp430-sim.c | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/sim/msp430/msp430-sim.c b/sim/msp430/msp430-sim.c index d402be7..e7b58ba 100644 --- a/sim/msp430/msp430-sim.c +++ b/sim/msp430/msp430-sim.c @@ -116,6 +116,7 @@ sim_open (SIM_OPEN_KIND kind, SIM_DESC sd = sim_state_alloc (kind, callback); struct msp430_cpu_state *msp430_cpu; char c; + int i; /* Initialise the simulator. */ @@ -141,11 +142,6 @@ sim_open (SIM_OPEN_KIND kind, return 0; } - CPU_PC_FETCH (STATE_CPU (sd, 0)) = msp430_pc_fetch; - CPU_PC_STORE (STATE_CPU (sd, 0)) = msp430_pc_store; - CPU_REG_FETCH (STATE_CPU (sd, 0)) = msp430_reg_fetch; - CPU_REG_STORE (STATE_CPU (sd, 0)) = msp430_reg_store; - /* Allocate memory if none specified by user. Note - these values match the memory regions in the libgloss/msp430/msp430[xl]-sim.ld scripts. */ if (sim_core_read_buffer (sd, STATE_CPU (sd, 0), read_map, &c, 0x2, 1) == 0) @@ -180,13 +176,21 @@ sim_open (SIM_OPEN_KIND kind, } /* CPU specific initialization. */ - assert (MAX_NR_PROCESSORS == 1); - - msp430_cpu = MSP430_SIM_CPU (STATE_CPU (sd, 0)); - msp430_cpu->cio_breakpoint = trace_sym_value (sd, "C$$IO$$"); - msp430_cpu->cio_buffer = trace_sym_value (sd, "__CIOBUF__"); - if (msp430_cpu->cio_buffer == -1) - msp430_cpu->cio_buffer = trace_sym_value (sd, "_CIOBUF_"); + for (i = 0; i < MAX_NR_PROCESSORS; ++i) + { + SIM_CPU *cpu = STATE_CPU (sd, i); + + CPU_PC_FETCH (cpu) = msp430_pc_fetch; + CPU_PC_STORE (cpu) = msp430_pc_store; + CPU_REG_FETCH (cpu) = msp430_reg_fetch; + CPU_REG_STORE (cpu) = msp430_reg_store; + + msp430_cpu = MSP430_SIM_CPU (cpu); + msp430_cpu->cio_breakpoint = trace_sym_value (sd, "C$$IO$$"); + msp430_cpu->cio_buffer = trace_sym_value (sd, "__CIOBUF__"); + if (msp430_cpu->cio_buffer == -1) + msp430_cpu->cio_buffer = trace_sym_value (sd, "_CIOBUF_"); + } return sd; } |