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authorMike Frysinger <vapier@gentoo.org>2015-03-23 00:30:52 -0400
committerMike Frysinger <vapier@gentoo.org>2021-01-30 10:14:21 -0500
commitd4e3adda1225d29b99f7bc81cc711806ecaacb70 (patch)
tree9e28132b4b36b74d943160bfb5aa7dd03e19b494 /sim/moxie
parent18d4b488f4538f11cfdc618ddfb26eaf2c955fb7 (diff)
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sim: watchpoints: change sizeof_pc to sizeof(sim_cia)
Existing ports already have sizeof_pc set to the same size as sim_cia, so simply make that part of the core code. We already assume this in places by way of sim_pc_{get,set}, and this is how it's documented in the sim-base.h API. There is code to allow sims to pick different register word sizes from address sizes, but most ports use the defaults for both (32-bits), and the few that support multiple register sizes never change the address size (so address defaults to register). I can't think of any machine where the register hardware size would be larger than the address word size either. We have ABIs that behave that way (e.g. x32), but the hardware is still equivalent register sized.
Diffstat (limited to 'sim/moxie')
-rw-r--r--sim/moxie/ChangeLog4
-rw-r--r--sim/moxie/interp.c1
2 files changed, 4 insertions, 1 deletions
diff --git a/sim/moxie/ChangeLog b/sim/moxie/ChangeLog
index c01b323..4a10ac3 100644
--- a/sim/moxie/ChangeLog
+++ b/sim/moxie/ChangeLog
@@ -1,3 +1,7 @@
+2021-01-30 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
+
2021-01-11 Mike Frysinger <vapier@gentoo.org>
* config.in, configure: Regenerate.
diff --git a/sim/moxie/interp.c b/sim/moxie/interp.c
index f895af6..c5f9ed6 100644
--- a/sim/moxie/interp.c
+++ b/sim/moxie/interp.c
@@ -1204,7 +1204,6 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb,
}
STATE_WATCHPOINTS (sd)->pc = &cpu.asregs.regs[PC_REGNO];
- STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (word);
if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
{