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author | Andrew Cagney <cagney@redhat.com> | 1998-03-25 04:15:38 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1998-03-25 04:15:38 +0000 |
commit | 6100784a60a46ce81f1264a630cf003f74df78ce (patch) | |
tree | 872d16ff0f41d3fa580c29f797b16d1aded249a7 /sim/mn10300/ChangeLog | |
parent | 8388c9a5646ad6b1eff9db4851ccd8761decad9e (diff) | |
download | gdb-6100784a60a46ce81f1264a630cf003f74df78ce.zip gdb-6100784a60a46ce81f1264a630cf003f74df78ce.tar.gz gdb-6100784a60a46ce81f1264a630cf003f74df78ce.tar.bz2 |
* interp.c (sim_open): Create second 1mb memory region at 0x40000000.
(sim_open): Create a device tree.
(sim-hw.h): Include.
(do_interrupt): Delete, needs to use dv-mn103cpu.c
* dv-mn103int.c, dv-mn103cpu.c: New files.
Diffstat (limited to 'sim/mn10300/ChangeLog')
-rw-r--r-- | sim/mn10300/ChangeLog | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index 02a8b9e..7a3f3f5 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -1,3 +1,13 @@ +Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * interp.c (sim_open): Create second 1mb memory region at + 0x40000000. + (sim_open): Create a device tree. + (sim-hw.h): Include. + (do_interrupt): Delete, needs to use dv-mn103cpu.c + + * dv-mn103int.c, dv-mn103cpu.c: New files. + Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com> * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): |