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| author | Andrew Cagney <cagney@redhat.com> | 1998-11-23 06:06:12 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-11-23 06:06:12 +0000 |
| commit | ee562da4c499a2d97020368ca36434e292b381b4 (patch) | |
| tree | e1f8e505579ac9e083d5f0a3dce91710a806959f /sim/mips | |
| parent | a83d7d870f21777725939c88f72aef0f3944dec0 (diff) | |
| download | gdb-ee562da4c499a2d97020368ca36434e292b381b4.zip gdb-ee562da4c499a2d97020368ca36434e292b381b4.tar.gz gdb-ee562da4c499a2d97020368ca36434e292b381b4.tar.bz2 | |
Reconize target mips-tx19-elf
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 7 | ||||
| -rwxr-xr-x | sim/mips/configure | 14 | ||||
| -rw-r--r-- | sim/mips/configure.in | 14 |
3 files changed, 21 insertions, 14 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 5cfff84..42d2302 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,10 @@ +start-sanitize-tx19 +Mon Nov 23 16:51:02 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * configure.in (tx19): Reconize target mips-tx19-elf. + * configure: Re-generate. + +end-sanitize-tx19 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com> * configure.in: Configure mips-lsi-elf nee mips*lsi* as a diff --git a/sim/mips/configure b/sim/mips/configure index d142bdf..da72d1d 100755 --- a/sim/mips/configure +++ b/sim/mips/configure @@ -3665,10 +3665,10 @@ fi # Ensure a reasonable default simulator is constructed: (DEPRECATED) case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";; + mips*tx19*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";; # end-sanitize-tx19 # start-sanitize-tx49 - mips64tx49*-*-*) SIMCONF="-mips3 --warnings -mcpu=r4900";; + mips*tx49*) SIMCONF="-mips3 --warnings -mcpu=r4900";; # end-sanitize-tx49 # start-sanitize-r5900 mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";; @@ -3689,7 +3689,7 @@ esac # case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; + mips*tx19*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; # end-sanitize-tx19 mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; *) SIM_SUBTARGET="";; @@ -3705,7 +3705,7 @@ mips_endian= default_endian= case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) default_endian=BIG_ENDIAN ;; + mips*tx19*) default_endian=BIG_ENDIAN ;; # end-sanitize-tx19 # start-sanitize-r5900 mips64r59*-*-*) mips_endian=LITTLE_ENDIAN ;; @@ -3771,7 +3771,7 @@ fi mips_addr_bitsize= case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) mips_bitsize=32 ; mips_msb=31 ;; + mips*tx19*) mips_bitsize=32 ; mips_msb=31 ;; # end-sanitize-tx19 # start-sanitize-r5900 mips64r59*-*-*) mips_bitsize=64 ; mips_msb=63 ; mips_addr_bitsize=32;; @@ -3854,7 +3854,7 @@ mips_fpu=HARDWARE_FLOATING_POINT mips_fpu_bitsize= case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) mips_fpu=SOFT_FLOATING_POINT ;; + mips*tx19*) mips_fpu=SOFT_FLOATING_POINT ;; # end-sanitize-tx19 mips*tx39*) mips_fpu=HARD_FLOATING_POINT mips_fpu_bitsize=32 @@ -3943,7 +3943,7 @@ sim_igen_filter="32,64,f" sim_m16_filter="16" case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) sim_default_gen=M16 + mips*tx19*) sim_default_gen=M16 sim_use_gen=M16 sim_igen_machine="-M tx19" sim_m16_machine="-M tx19" diff --git a/sim/mips/configure.in b/sim/mips/configure.in index 3402edd..64231ed 100644 --- a/sim/mips/configure.in +++ b/sim/mips/configure.in @@ -14,10 +14,10 @@ SIM_AC_OPTION_WARNINGS # Ensure a reasonable default simulator is constructed: (DEPRECATED) case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";; + mips*tx19*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";; # end-sanitize-tx19 # start-sanitize-tx49 - mips64tx49*-*-*) SIMCONF="-mips3 --warnings -mcpu=r4900";; + mips*tx49*) SIMCONF="-mips3 --warnings -mcpu=r4900";; # end-sanitize-tx49 # start-sanitize-r5900 mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";; @@ -38,7 +38,7 @@ AC_SUBST(SIMCONF) # case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; + mips*tx19*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; # end-sanitize-tx19 mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; *) SIM_SUBTARGET="";; @@ -54,7 +54,7 @@ mips_endian= default_endian= case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) default_endian=BIG_ENDIAN ;; + mips*tx19*) default_endian=BIG_ENDIAN ;; # end-sanitize-tx19 # start-sanitize-r5900 mips64r59*-*-*) mips_endian=LITTLE_ENDIAN ;; @@ -75,7 +75,7 @@ SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian) mips_addr_bitsize= case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) mips_bitsize=32 ; mips_msb=31 ;; + mips*tx19*) mips_bitsize=32 ; mips_msb=31 ;; # end-sanitize-tx19 # start-sanitize-r5900 mips64r59*-*-*) mips_bitsize=64 ; mips_msb=63 ; mips_addr_bitsize=32;; @@ -99,7 +99,7 @@ mips_fpu=HARDWARE_FLOATING_POINT mips_fpu_bitsize= case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) mips_fpu=SOFT_FLOATING_POINT ;; + mips*tx19*) mips_fpu=SOFT_FLOATING_POINT ;; # end-sanitize-tx19 mips*tx39*) mips_fpu=HARD_FLOATING_POINT mips_fpu_bitsize=32 @@ -142,7 +142,7 @@ sim_igen_filter="32,64,f" sim_m16_filter="16" case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) sim_default_gen=M16 + mips*tx19*) sim_default_gen=M16 sim_use_gen=M16 sim_igen_machine="-M tx19" sim_m16_machine="-M tx19" |