sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}

The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state.  This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.

It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.

5 files changed, 19 insertions, 11 deletions

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 249e8c5..00f7871 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,13 @@
+2015-04-17  Mike Frysinger  <vapier@gentoo.org>
+
+	* dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
+	PU_PC_GET.
+	* interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
+	(sim_create_inferior): Change CIA_SET to CPU_PC_SET.
+	* m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
+	CIA_SET to CPU_PC_SET.
+	* sim-main.h (CIA_GET, CIA_SET): Delete.
+
 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 
 	* Makefile.in (SIM_OBJS): Delete sim-cpu.o.
diff --git a/sim/mips/dv-tx3904cpu.c b/sim/mips/dv-tx3904cpu.c
index 56b3386..cf9399a 100644
--- a/sim/mips/dv-tx3904cpu.c
+++ b/sim/mips/dv-tx3904cpu.c
@@ -141,7 +141,7 @@ deliver_tx3904cpu_interrupt (struct hw *me,
   struct tx3904cpu *controller = hw_data (me);
   SIM_DESC sd = hw_system (me);
   sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */
-  address_word cia = CIA_GET (cpu);
+  address_word cia = CPU_PC_GET (cpu);
 
 #define CPU cpu
 #define SD current_state
@@ -149,20 +149,20 @@ deliver_tx3904cpu_interrupt (struct hw *me,
   if (controller->pending_reset)
     {
       controller->pending_reset = 0;
-      HW_TRACE ((me, "reset pc=0x%08lx", (long) CIA_GET (cpu)));
+      HW_TRACE ((me, "reset pc=0x%08lx", (long) CPU_PC_GET (cpu)));
       SignalExceptionNMIReset();
     }
   else if (controller->pending_nmi)
     {
       controller->pending_nmi = 0;
-      HW_TRACE ((me, "nmi pc=0x%08lx", (long) CIA_GET (cpu)));
+      HW_TRACE ((me, "nmi pc=0x%08lx", (long) CPU_PC_GET (cpu)));
       SignalExceptionNMIReset();
     }
   else if (controller->pending_level)
     {
       HW_TRACE ((me, "interrupt level=%d pc=0x%08lx sr=0x%08lx",
 		 controller->pending_level,
-		 (long) CIA_GET (cpu), (long) SR));
+		 (long) CPU_PC_GET (cpu), (long) SR));
 
       /* Clear CAUSE register.  It may stay this way if the interrupt
 	 was cleared with a negative pending_level. */
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index d6136ab..38f2524 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -311,7 +311,7 @@ void
 interrupt_event (SIM_DESC sd, void *data)
 {
   sim_cpu *cpu = STATE_CPU (sd, 0); /* FIXME */
-  address_word cia = CIA_GET (cpu);
+  address_word cia = CPU_PC_GET (cpu);
   if (SR & status_IE)
     {
       interrupt_pending = 0;
@@ -1112,7 +1112,7 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
       for (cpu_nr = 0; cpu_nr < sim_engine_nr_cpus (sd); cpu_nr++)
 	{
 	  sim_cpu *cpu = STATE_CPU (sd, cpu_nr);
-	  CIA_SET (cpu, (unsigned64) bfd_get_start_address (abfd));
+	  CPU_PC_SET (cpu, (unsigned64) bfd_get_start_address (abfd));
 	}
     }
 
diff --git a/sim/mips/m16run.c b/sim/mips/m16run.c
index 0f5fec1..44fb9e4 100644
--- a/sim/mips/m16run.c
+++ b/sim/mips/m16run.c
@@ -33,7 +33,7 @@ sim_engine_run (SIM_DESC sd,
 		int siggnal) /* ignore */
 {
   sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
-  address_word cia = CIA_GET (cpu);
+  address_word cia = CPU_PC_GET (cpu);
 
   while (1)
     {
@@ -64,9 +64,9 @@ sim_engine_run (SIM_DESC sd,
       /* process any events */
       if (sim_events_tick (sd))
         {
-          CIA_SET (CPU, cia);
+          CPU_PC_SET (CPU, cia);
           sim_events_process (sd);
-	  cia = CIA_GET (CPU);
+	  cia = CPU_PC_GET (CPU);
         }
 
     }
diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h
index a044504..7a58bd3 100644
--- a/sim/mips/sim-main.h
+++ b/sim/mips/sim-main.h
@@ -257,8 +257,6 @@ struct _sim_cpu {
 
 
   /* The following are internal simulator state variables: */
-#define CIA_GET(CPU) ((CPU)->registers[PCIDX] + 0)
-#define CIA_SET(CPU,CIA) ((CPU)->registers[PCIDX] = (CIA))
   address_word dspc;  /* delay-slot PC */
 #define DSPC ((CPU)->dspc)