aboutsummaryrefslogtreecommitdiff
path: root/sim/mips/ChangeLog
diff options
context:
space:
mode:
authorStan Shebs <shebs@codesourcery.com>1999-04-26 18:34:20 +0000
committerStan Shebs <shebs@codesourcery.com>1999-04-26 18:34:20 +0000
commit7a292a7adf506b866905b06b3024c0fd411c4583 (patch)
tree5b208bb48269b8a82d5c3a5f19c87b45a62a22f4 /sim/mips/ChangeLog
parent1996fae84682e8ddd146215dd2959ad1ec924c09 (diff)
downloadgdb-7a292a7adf506b866905b06b3024c0fd411c4583.zip
gdb-7a292a7adf506b866905b06b3024c0fd411c4583.tar.gz
gdb-7a292a7adf506b866905b06b3024c0fd411c4583.tar.bz2
import gdb-19990422 snapshot
Diffstat (limited to 'sim/mips/ChangeLog')
-rw-r--r--sim/mips/ChangeLog21
1 files changed, 21 insertions, 0 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index bb8ac40..2efd41a 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,24 @@
+1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
+
+ * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
+
+Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
+
+ * configure.in: Any mips64vr5*-*-* target should have
+ -DTARGET_ENABLE_FR=1.
+ (default_endian): Any mips64vr*el-*-* target should default to
+ LITTLE_ENDIAN.
+ * configure: Re-generate.
+
+1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips.igen (ldl): Extend from _16_, not 32.
+
+Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
+
+ * interp.c (sim_store_register): Force registers written to by GDB
+ into an un-interpreted state.
+
1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the