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author | Mike Frysinger <vapier@gentoo.org> | 2015-03-29 03:53:01 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2015-03-29 04:14:27 -0400 |
commit | ea6b7543b422836409fe7848abbfcb452ad26398 (patch) | |
tree | c08ac4c055496e198f976e1ef7e586538491cbc3 /sim/mcore/sim-main.h | |
parent | 525887679c4de93b8006b5013904dec8d19f12f0 (diff) | |
download | gdb-ea6b7543b422836409fe7848abbfcb452ad26398.zip gdb-ea6b7543b422836409fe7848abbfcb452ad26398.tar.gz gdb-ea6b7543b422836409fe7848abbfcb452ad26398.tar.bz2 |
sim: mcore: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point. But at least this
is an improvement on the status quo.
Diffstat (limited to 'sim/mcore/sim-main.h')
-rw-r--r-- | sim/mcore/sim-main.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/sim/mcore/sim-main.h b/sim/mcore/sim-main.h new file mode 100644 index 0000000..96954b8 --- /dev/null +++ b/sim/mcore/sim-main.h @@ -0,0 +1,56 @@ +/* Simulator for Motorola's MCore processor + Copyright (C) 2009-2015 Free Software Foundation, Inc. + +This file is part of GDB, the GNU debugger. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +#ifndef SIM_MAIN_H +#define SIM_MAIN_H + +#include "sim-basics.h" + +typedef address_word sim_cia; +typedef long int word; +typedef unsigned long int uword; + +typedef struct _sim_cpu SIM_CPU; + +#include "sim-base.h" +#include "bfd.h" + +#define CIA_GET(cpu) (cpu)->pc +#define CIA_SET(cpu,val) (cpu)->pc = (val) + +struct _sim_cpu { + + word pc; + + sim_cpu_base base; +}; + +struct sim_state { + + sim_cpu *cpu[MAX_NR_PROCESSORS]; +#if (WITH_SMP) +#define STATE_CPU(sd,n) ((sd)->cpu[n]) +#else +#define STATE_CPU(sd,n) ((sd)->cpu[0]) +#endif + + sim_state_base base; +}; + +#endif + |