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| author | Stephane Carrez <stcarrez@nerim.fr> | 2003-03-01 16:00:09 +0000 |
|---|---|---|
| committer | Stephane Carrez <stcarrez@nerim.fr> | 2003-03-01 16:00:09 +0000 |
| commit | 00416c6ed6b354207787df2ac7a6b1e8ad11fece (patch) | |
| tree | 7ff5a39cfcba5de551f0e15125b517a13e162765 /sim/m68hc11/ChangeLog | |
| parent | eadc1c87ebd3d01cb41b412ca7d436aba8fb67a3 (diff) | |
| download | gdb-00416c6ed6b354207787df2ac7a6b1e8ad11fece.zip gdb-00416c6ed6b354207787df2ac7a6b1e8ad11fece.tar.gz gdb-00416c6ed6b354207787df2ac7a6b1e8ad11fece.tar.bz2 | |
* interp.c (sim_fetch_register): Only store a single byte for
1 byte registers.
Diffstat (limited to 'sim/m68hc11/ChangeLog')
| -rw-r--r-- | sim/m68hc11/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/m68hc11/ChangeLog b/sim/m68hc11/ChangeLog index 325b887..21957ef 100644 --- a/sim/m68hc11/ChangeLog +++ b/sim/m68hc11/ChangeLog @@ -1,3 +1,8 @@ +2003-03-01 Stephane Carrez <stcarrez@nerim.fr> + + * interp.c (sim_fetch_register): Only store a single byte for + 1 byte registers. + 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_prepare_for_program, sim_open) |