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author | Mike Frysinger <vapier@gentoo.org> | 2022-10-31 21:43:10 +0545 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2022-11-02 20:31:10 +0545 |
commit | ee1cffd3883c1d846ad58c1fb86559bb2f930361 (patch) | |
tree | 650a83e14dc8dcb5e061093643102eca8163b461 /sim/m32r | |
parent | 26f228db710f54b54aea4d9a05214add0cf9f541 (diff) | |
download | gdb-ee1cffd3883c1d846ad58c1fb86559bb2f930361.zip gdb-ee1cffd3883c1d846ad58c1fb86559bb2f930361.tar.gz gdb-ee1cffd3883c1d846ad58c1fb86559bb2f930361.tar.bz2 |
sim: common: change sim_{fetch,store}_register helpers to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense. Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
Diffstat (limited to 'sim/m32r')
-rw-r--r-- | sim/m32r/m32r.c | 4 | ||||
-rw-r--r-- | sim/m32r/m32r2.c | 4 | ||||
-rw-r--r-- | sim/m32r/m32rx.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c index f857369..478a45c 100644 --- a/sim/m32r/m32r.c +++ b/sim/m32r/m32r.c @@ -58,7 +58,7 @@ m32r_decode_gdb_ctrl_regnum (int gdb_regnum) /* The contents of BUF are in target byte order. */ int -m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, void *buf, int len) { int size = m32rbf_register_size (rn); if (len != size) @@ -98,7 +98,7 @@ m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32rbf_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) +m32rbf_store_register (SIM_CPU *current_cpu, int rn, const void *buf, int len) { int size = m32rbf_register_size (rn); if (len != size) diff --git a/sim/m32r/m32r2.c b/sim/m32r/m32r2.c index a057a4c..8881bc68 100644 --- a/sim/m32r/m32r2.c +++ b/sim/m32r/m32r2.c @@ -30,7 +30,7 @@ /* The contents of BUF are in target byte order. */ int -m32r2f_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32r2f_fetch_register (SIM_CPU *current_cpu, int rn, void *buf, int len) { return m32rbf_fetch_register (current_cpu, rn, buf, len); } @@ -38,7 +38,7 @@ m32r2f_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32r2f_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) +m32r2f_store_register (SIM_CPU *current_cpu, int rn, const void *buf, int len) { return m32rbf_store_register (current_cpu, rn, buf, len); } diff --git a/sim/m32r/m32rx.c b/sim/m32r/m32rx.c index deafcbe..e5724c5 100644 --- a/sim/m32r/m32rx.c +++ b/sim/m32r/m32rx.c @@ -30,7 +30,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */ /* The contents of BUF are in target byte order. */ int -m32rxf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32rxf_fetch_register (SIM_CPU *current_cpu, int rn, void *buf, int len) { return m32rbf_fetch_register (current_cpu, rn, buf, len); } @@ -38,7 +38,7 @@ m32rxf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32rxf_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) +m32rxf_store_register (SIM_CPU *current_cpu, int rn, const void *buf, int len) { return m32rbf_store_register (current_cpu, rn, buf, len); } |