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authorTom de Vries <tdevries@suse.de>2024-11-23 13:07:38 +0100
committerTom de Vries <tdevries@suse.de>2024-11-23 13:07:38 +0100
commitd2d240ff89b4d3359ea70cdb47d3e79294ca891a (patch)
treed277cf5c4263881d513deb2d7389c2a0c1f4610b /sim/m32r
parent8dfa29fcbd60bead4d67569bd14c818540959130 (diff)
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[sim] Run spellcheck.sh in sim (part 1)
Run gdb/contrib/spellcheck.sh on directory sim. Fix auto-corrected typos: ... accessable -> accessible accidently -> accidentally accomodate -> accommodate adress -> address afair -> affair agains -> against agressively -> aggressively annuled -> annulled arbitary -> arbitrary arround -> around auxillary -> auxiliary availablity -> availability clasic -> classic comming -> coming controled -> controlled controling -> controlling destory -> destroy existance -> existence explictly -> explicitly faciliate -> facilitate fouth -> fourth fullfilled -> fulfilled guarentee -> guarantee hinderance -> hindrance independant -> independent inital -> initial loosing -> losing occurance -> occurrence occured -> occurred occuring -> occurring omited -> omitted oportunity -> opportunity parallely -> parallelly permissable -> permissible postive -> positive powerfull -> powerful preceed -> precede preceeding -> preceding preceeds -> precedes primative -> primitive probaly -> probably programable -> programmable propogate -> propagate propper -> proper recieve -> receive reconized -> recognized refered -> referred refering -> referring relevent -> relevant responisble -> responsible retreive -> retrieve safty -> safety specifiying -> specifying spontanous -> spontaneous sqaure -> square successfull -> successful supress -> suppress sytem -> system thru -> through transfered -> transferred trigered -> triggered unfortunatly -> unfortunately upto -> up to usefull -> useful wierd -> weird writen -> written doesnt -> doesn't isnt -> isn't ... Manually undid the "andd -> and" transformation in sim/testsuite/cr16/andd.cgs and sim/cr16/simops.c. Tested by rebuilding on x86_64-linux. Approved-By: Tom Tromey <tom@tromey.com>
Diffstat (limited to 'sim/m32r')
-rw-r--r--sim/m32r/mloop2.in2
-rw-r--r--sim/m32r/mloopx.in2
-rw-r--r--sim/m32r/traps.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/sim/m32r/mloop2.in b/sim/m32r/mloop2.in
index 202bdd1..b363b85 100644
--- a/sim/m32r/mloop2.in
+++ b/sim/m32r/mloop2.in
@@ -107,7 +107,7 @@ emit_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
with the first insn. */
/* ??? Revisit to handle exceptions right. */
- /* FIXME: No need to handle this parallely if second is nop. */
+ /* FIXME: No need to handle this parallelly if second is nop. */
id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);
/* Note that this can never be a cti. No cti's go in the S pipeline. */
diff --git a/sim/m32r/mloopx.in b/sim/m32r/mloopx.in
index 64342da..562263e 100644
--- a/sim/m32r/mloopx.in
+++ b/sim/m32r/mloopx.in
@@ -107,7 +107,7 @@ emit_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
with the first insn. */
/* ??? Revisit to handle exceptions right. */
- /* FIXME: No need to handle this parallely if second is nop. */
+ /* FIXME: No need to handle this parallelly if second is nop. */
id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);
/* Note that this can never be a cti. No cti's go in the S pipeline. */
diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c
index 7140d95..fe0f948 100644
--- a/sim/m32r/traps.c
+++ b/sim/m32r/traps.c
@@ -152,7 +152,7 @@ t2h_addr (host_callback *cb, struct cb_syscall *sc,
/* TODO: These functions are a big hack and assume that the host runtime has
type sizes and struct layouts that match the target. So the Linux emulation
- probaly only really works in 32-bit runtimes. */
+ probably only really works in 32-bit runtimes. */
static void
translate_endian_h2t (void *addr, size_t size)