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authorDoug Evans <dje@google.com>1998-10-09 23:43:28 +0000
committerDoug Evans <dje@google.com>1998-10-09 23:43:28 +0000
commitbb51b65d6847704b641d1588dfe814df702328af (patch)
tree06ace15d2c9ae5791b794406d6b8cd35c4415671 /sim/m32r/configure.in
parent0b517b9cf2f539c9951f619fbd15d4231cf2416b (diff)
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Add pseudo-basic-block execution support.
* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o. (SIM_EXTRA_DEPS): Add include/opcode/cgen.h. (INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h. (mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu. (stamp-decode): Delete, build decode files with other cpu files. * arch.c,arch.h,cpuall.h: Regenerate. * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. * sem-switch.c,sem.c: Regenerate. * m32r-sim.h (M32R_MISC_PROFILE): New members load_regs, load_regs_pending. * m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register. (m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set, m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get, m32rbf_h_accum_set): Likewise. (m32r_model_{init,update}_insn_cycles): Delete. (m32rbf_model_insn_{before,after}): New fns. (m32r_model_record_cti,m32r_model_record_cycles): Delete. (m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete. (m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete. (check_load_stall): New fn. (m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns. (m32rbf_model_test_u_exec): New fn. * mloop.in: Rewrite, use pbb support. * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete. (sim_fetch_register,sim_store_register): Delete. * sim-main.h (CIA_GET,CIA_SET): Fix. (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete. * tconfig.in (WITH_SCACHE_PBB): Define. (WITH_SCACHE_PBB_M32RBF): Define. * traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_.... (m32r_trap): Pass pc to sim_engine_halt. * configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384. * configure: Regenerate. start-sanitize-m32rx * Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o. (mloopx.c): Build pseudo-basic-block version. Depend on stamp-xcpu. (semx.o): Delete. (extractx.o): Add. (stamp-xdecode): Delete, build decode files with other cpu files. * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate. * readx.c: Delete. * semx.c: Delete. * extractx.c: New file. * semx-switch.c: New file. * m32r-sim.h (BRANCH_NEW_PC): Delete. (SEM_SKIP_INSN): New macro. * m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register. (m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set, m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get, m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise. (m32rxf_model_insn_{before,after}): New fns. (m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete. (m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete. (check_load_stall): New fn. (m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns. * mloopx.in: Rewrite, use pbb support. * tconfig.in (WITH_SCACHE_PBB_M32RXF): Define. (WITH_SEM_SWITCH_FULL): Change from 0 to 1. end-sanitize-m32rx
Diffstat (limited to 'sim/m32r/configure.in')
-rw-r--r--sim/m32r/configure.in2
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/m32r/configure.in b/sim/m32r/configure.in
index 9513239..bf57c2f 100644
--- a/sim/m32r/configure.in
+++ b/sim/m32r/configure.in
@@ -11,7 +11,7 @@ sim_link_links="${sim_link_links} cpu-sim.h cpu-opc.h"
SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_SCACHE(1024)
+SIM_AC_OPTION_SCACHE(16384)
SIM_AC_OPTION_DEFAULT_MODEL(m32r/d)
SIM_AC_OPTION_ENVIRONMENT