aboutsummaryrefslogtreecommitdiff
path: root/sim/lm32
diff options
context:
space:
mode:
authorMike Frysinger <vapier@gentoo.org>2023-12-06 20:08:01 -0700
committerMike Frysinger <vapier@gentoo.org>2023-12-15 21:14:13 -0500
commit81a3befa0ac2ed1e7b2562c1a12d188623c5c3d1 (patch)
tree85d33a8cb7dcc20ccb3d240d6c4a6ddc8c16b27e /sim/lm32
parent18054f49ca94b9e9e9d5791abb83ee2967190583 (diff)
downloadgdb-81a3befa0ac2ed1e7b2562c1a12d188623c5c3d1.zip
gdb-81a3befa0ac2ed1e7b2562c1a12d188623c5c3d1.tar.gz
gdb-81a3befa0ac2ed1e7b2562c1a12d188623c5c3d1.tar.bz2
sim: mn10300: fix incorrect implementation of a few insns
Fix a few problems caught by compiler warnings: * Some of the asr & lsr insns were setting up the c state flag, but then forgetting to set it in the PSW. Add it like the other asr & lsr variants. * Some of the dmulh insns were multiplying one of the source regs against itself instead of against the other source reg. * The sat16_cmp parallel insn was using the wrong register in the compare -- the reg1 src/dst pair are used in the sat16 op, and the reg2 src/dst pair are used in the add op.
Diffstat (limited to 'sim/lm32')
0 files changed, 0 insertions, 0 deletions