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author | Joel Brobecker <brobecker@adacore.com> | 2016-01-01 08:33:14 +0400 |
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committer | Joel Brobecker <brobecker@adacore.com> | 2016-01-01 08:43:22 +0400 |
commit | 618f726fcb851883a0094aa7fa17003889b7189f (patch) | |
tree | 8a551cf59bc8e04bb9ba39fe3d74d9239a7d3568 /sim/ft32/interp.c | |
parent | edd88788349db3bd2af5fc9a38e2ea9cc220757f (diff) | |
download | gdb-618f726fcb851883a0094aa7fa17003889b7189f.zip gdb-618f726fcb851883a0094aa7fa17003889b7189f.tar.gz gdb-618f726fcb851883a0094aa7fa17003889b7189f.tar.bz2 |
GDB copyright headers update after running GDB's copyright.py script.
gdb/ChangeLog:
Update year range in copyright notice of all files.
Diffstat (limited to 'sim/ft32/interp.c')
-rw-r--r-- | sim/ft32/interp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/ft32/interp.c b/sim/ft32/interp.c index 63ce77b..ec019b3 100644 --- a/sim/ft32/interp.c +++ b/sim/ft32/interp.c @@ -1,6 +1,6 @@ /* Simulator for the FT32 processor - Copyright (C) 2008-2015 Free Software Foundation, Inc. + Copyright (C) 2008-2016 Free Software Foundation, Inc. Contributed by FTDI <support@ftdichip.com> This file is part of simulators. |