Initial creation of sourceware repositorygdb-4_18-branchpoint

16 files changed, 10018 insertions, 0 deletions

diff --git a/sim/d30v/ChangeLog b/sim/d30v/ChangeLog
new file mode 100644
index 0000000..668d89e
--- /dev/null
+++ b/sim/d30v/ChangeLog
@@ -0,0 +1,1333 @@
+1999-01-12  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* engine.c (unqueue_writes): Make PSW conflict resolution code
+ 	conditional - disable it for MVTSYS || insn case.
+	
+1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
+ 	update.
+	* engine.c (unqueue_writes): Make non-static.  Remove PSW_V/VA
+	special case.
+	(do_parallel): Don't drain PSW write queue for MVTSYS || insn.
+
+1999-01-07  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_ld2h): Sign-extend loaded half-words.
+
+1999-01-05  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_ld2h): Read memory in word units.
+	(do_ld4bh): Ditto.  Correct sign extension.
+	(do_ld4bhu): Ditto.
+	(do_st2h): Write memory in word units.
+	(do_st4hb): Ditto.
+	(st4hb): Correct mnemonic in igen template.
+
+1998-12-08  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
+	(do_ld2w): Ditto.
+ 	(do_ld4bh): Ditto.
+ 	(do_ld4bhu): Ditto.
+ 	(do_mulx2h): Ditto.
+
+1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_repeat): Don't set RP for repeat count 1.
+
+1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_src): Treat shift count -32 naturally instead of
+	producing zero result.
+
+1998-11-22  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
+
+1998-11-16  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.  
+	* engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
+
+1998-11-12  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
+ 	RPT_IS_CALL macro.  
+	* sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
+	* d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto. 
+	(do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto. 
+	* d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead. 
+	(do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
+	* engine.c (sim_engine_run): Remove conditional setting of R62 based 
+	upon RPT_IS_CALL.
+	
+1998-11-08  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* sim-calls.c (sim_open): Add dummy memory range over control
+	register region (0x40000000..0x4000FFFF).
+ 
+1998-11-06  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
+
+Tue Oct 13 11:01:16 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
+ 	count -32 to produce zero result.
+	(do_src): Ditto for shift count == -64.
+
+Mon Oct 12 23:04:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
+	(do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
+	(do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
+	(sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
+	(do_src): Use loop to limit shift count to -64 .. 63.
+
+Fri Oct  9 16:46:52 1998  Doug Evans  <devans@canuck.cygnus.com>
+
+	* sim-calls.c (get_insn_name): New fn.
+	(sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
+	* sim-main.h (MAX_INSNS,INSN_NAME): Delete.
+
+Mon Sep 28 10:43:28 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
+	correct MSB bit numbers for sign extension masks.
+
+Fri Sep 25 17:32:27 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* engine.c (do_parallel): Unqueue writes if MU instruction was
+	a MVTSYS, as identified by its left_kills_right_p side-effect.
+
+Fri Sep 25 12:31:34 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
+ 	shift/rotate counts to number of bits in width of operand; no
+ 	longer saturate at maxima.
+
+Tue Jul 14 18:39:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* cpu.h (left_kills_right_p): New flag for non-branch instructions
+	that, when executed in left slot of a -> sequential pair, kill the
+	right slot.
+	* d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
+	* engine.c (do_2_short): Respect flag.
+	
+Thu Jun  4 16:48:58 1998  David Taylor  <taylor@texas.cygnus.com>
+
+	* d30v-insns (do_trap): don't save the bPSW and PSW based on
+	current values because an instruction done in parallel with
+	the trap might change them, instead set a flag do that
+	unqueue_writes will take care of it.
+	* engine.c (unqueue_writes): finish trap handling
+	* cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
+	to make use of it; set by do_trap, tested and cleared by
+	unqueue_writes.
+
+Tue May 19 16:07:04 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* engine.c (unqueue_writes): Suppress the all enqueued writes to
+ 	the same flags in PSW except the last.
+
+Fri May 15 11:38:59 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (RETI): Correct instruction spelling to "reit".
+
+Thu May 14 09:34:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (dbt): Handle DBT at end of repeat block.
+	(do_trap, dbt): Clear PSW_RP if at end of repeat block.
+
+Thu May 14 07:41:41 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* engine.c (sim_engine_run): Trigger DDBT based on previous PC,
+ 	instead of next PC.
+
+Wed May 13 11:03:40 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* engine.c (sim_engine_run): Move DDBT handling after instruction
+ 	decode/execute stage.
+
+Tue May 12 12:14:53 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
+ 	properly handle negative saturation inputs.
+
+Tue May 12 11:11:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* engine.c (sim_engine_run): Decrement RPT_C only under more
+ 	restricted conditions.
+
+Mon May 11 17:33:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
+ 	unchanged.
+
+Mon May 11 16:27:04 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
+	functionality.
+
+Fri May  8 16:44:19 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_trap): Set bPC to RPT_S if trap is last
+	instruction in repeat block.
+	(bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
+	is last instruction in repeat block.
+
+Fri May  8 11:06:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
+ 	macro.
+	* cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
+
+Wed May  6 19:40:56 1998  Doug Evans  <devans@canuck.cygnus.com>
+
+	* sim-main.h (INSN_NAME): New arg `cpu'.
+
+Fri May  1 14:24:30 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns: Fix parameter list to sim_engine_abort.
+
+Thu Apr 30 14:28:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* d30v-insns (do_sath): Add additional argument that determines
+	whether or not the F4 (PSW_S) bit in the PSW is updated.
+	(SAT2H): Do not update PSW_S bit.
+	(SATHp): Do update PSW_S bit.
+
+Tue Apr 28 23:36:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* d30v-insns (SRAHp, SRLHp):  Immediate values are signed 6 bit
+	values, not 5 bit values.
+
+Wed Apr 29 12:57:55 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* d30v-insns (do_incr): Check modular arithmetic limits after
+ 	postincrement/postdecrement, rather than before, to match
+ 	erroneous hardware behavior.
+
+Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
+
+        * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Mon Apr 27 19:42:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
+
+Mon Apr 27 14:55:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* d30v-insns (do_mulx2h): Low order results go in ra+1, high
+	order in ra.
+
+Mon Apr 27 14:42:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
+	multiply of high and low fields from operands.
+
+Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+	* config.in: Ditto.
+
+Sun Apr 26 15:20:20 1998  Tom Tromey  <tromey@cygnus.com>
+
+	* acconfig.h: New file.
+	* configure.in: Reverted change of Apr 24; use sinclude again.
+
+Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+	* config.in: Ditto.
+
+Fri Apr 24 11:20:00 1998  Tom Tromey  <tromey@cygnus.com>
+
+	* configure.in: Don't call sinclude.
+
+Wed Apr 22 21:23:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
+	* d30v-insns (MVTACC): Use new RbU and RcU macros.
+
+Wed Apr 22 20:52:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
+	* d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
+	RbH and RbL.
+
+Mon Apr 13 16:59:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* d30v-insns (do_srl): Avoid undefined behavior of host compiler
+	when shifting left by more than 31 bits.
+
+Tue Apr  7 18:09:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* engine.c (sim_engine_run): Remove at_loop_end variable. Add
+	rp_was_set and rpt_c_was_nonzero variables.  Major restructuring of
+	code before and after instruction execution to properly handle state
+	of the RP bit in the PSW, the value in RPT_C, and other loop related
+	problems.
+
+Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Apr  3 15:26:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
+	BASE_ADDRESS constant.
+	* cpu.h (BASE_ADDRESS): Remove constant not used any longer.
+
+Fri Apr  3 14:42:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* cpu.h (EIT_VB): Define macro to access EIT_VB register.
+	(EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
+	* sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
+
+Tue Mar 31 19:00:00 1998  Fred Fish <fnf@cygnus.com>
+
+	* d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
+	just pcdisp.
+
+Mon Mar 30 20:30:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* engine.c (sim_engine_run): Add at_loop_end.  Rework end of loop
+	code to use this to both reset PSW_RP when needed and to set PC
+	to RPT_S for another pass through the loop.
+
+Mon Mar 30 16:12:00 1998  Fred Fish  <fnf@cygnus.com>
+
+	* engine.c (sim_engine_run): Change code that handles RPT_* regs
+	and PSW_RP bit in PSW so that PSW_RP is always set while executing
+	the loop and loop terminates upon completion of the pass for which
+	RPT_C is zero.  More closely follow logic in architecture manual.
+
+Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Thu Mar 19 00:25:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_open): Move memory-region commands back to
+ 	before the call to sim_parse_args.
+	(d30v_option_handler): Implement extmem-size option using
+ 	memory-delete and memory-region commands.
+
+	* sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
+ 	correct number and type of arguments.
+	
+Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Mar 11 13:56:32 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
+ 	read_map and write_map resp.
+
+	* cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
+
+Mon Mar  2 13:34:08 1998  Fred Fish  <fnf@cygnus.com>
+
+	* d30v-insns (do_repeat): Abort repeat instructions that have
+	a repeat count of zero.
+
+Fri Feb 27 18:44:12 1998  Doug Evans  <devans@canuck.cygnus.com>
+
+	* sim-calls.c (sim_open): Update call to sim_add_option_table.
+
+Thu Feb 26 18:34:31 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_info): Delete.
+
+Wed Feb 25 14:44:58 1998  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (mvtsys): If moving to EIT_VB register, and with
+	valid bits.  Optimize code somewhat.
+
+	* cpu.h (eit_vector_base_cr): New CR we need to special case.
+	(EIT_VALID): Valid bits for EIT_VB register.
+	
+	* d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
+	in the low 16 bits of the register.
+
+	* d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
+	results.
+	(do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
+	result back to the registers.
+
+Tue Feb 24 18:09:52 1998  Fred Fish  <fnf@cygnus.com>
+
+	* Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
+	r0 to always be zero.
+	* cpu.h (GPR_SET): Define.
+
+Tue Feb 24 14:12:57 1998  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (do_sath): Do saturation in 32 bits, before
+	converting to 16.
+	(sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
+	(do_sath_p): Delete, no longer used.
+	(sathp): Call do_sath, not do_sath_p.
+
+Mon Feb 23 15:55:14 1998  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (illegal,wrong_slot): Print \n after PC and before we
+	call sim_engine_halt.
+	(sr{a,l}hp): Implement missing instructions.
+	(do_trap): Print high order PSW bits in human readable fashion.
+	(do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
+
+	* alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
+
+	* engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
+	being > 0.  If RPT_C is decremented to 0, clear PSW RP bit.
+
+Fri Feb 20 10:13:34 1998  Fred Fish  <fnf@cygnus.com>
+
+	* cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
+
+Tue Feb 17 12:39:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_store_register, sim_fetch_register): Pass in
+ 	length parameter.  Return -1.
+
+Fri Feb  6 17:39:54 1998  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
+
+Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Jan 30 08:29:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* engine.c (sim_engine_run): Add parameter nr_cpus.
+
+Fri Jan 30 17:09:37 1998  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (jsrtzr): Check for register == 0, not != 0.
+
+Wed Jan 21 17:52:04 1998  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* engine.c (do_stack_swap): Make type of new_sp unsigned.
+
+Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Mon Jan  5 16:04:17 1998  Andrew Cagney  <cagney@sanguine.cygnus.com>
+
+	* sim-calls.c (sim_info): Call profile_print.
+
+	* sim-main.h: Enable instruction profiling.
+
+Thu Dec 18 12:21:38 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
+	and overflow bits.  Don't look at the current value of PSW.
+	(PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
+	question.  Don't look at the current value of PSW.
+
+	* d30v-insns: All instructions that set the PSW, will only queue
+	up the particular bits in question that were set by the
+	instruction.  Don't look at the current value of PSW.
+
+Wed Dec 17 11:41:44 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
+	(DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
+
+	* engine.c (trace_alu32): When changing BPSW/DPSW, print the
+	special PSW bits.
+
+	* d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
+	(do_cmp{,u}_cc): Print which cc value was used if not in switch
+	statement.
+	(do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
+	(mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
+
+Tue Dec 16 18:17:26 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (mulx2h): Add missing instruction.  Complain if
+	register is not even.
+	(do_{add,sub}h_ppp): Get correct high/low values.  Also correctly
+	handle short immediates.
+	(do_ld{2w,4bh}): Don't load r0 if ra == 0.
+
+	* engine.c (d30v_interrupt_event): Remove unused variable
+	(unqueue_writes): Ditto.
+
+Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+	* config.in: Ditto.
+
+Sat Dec 13 23:40:17 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* cpu.h (_write{32,64}): New structures for keeping track of
+	queued writes to registers.
+	(_sim_cpu): Add _write{32,64} structures.  Make is_delayed_call
+	unsigned32 also.
+	(WRITE{32,64}*): New macros for queueing up writes to registers.
+
+	* alu.h (ALU16_END): Take field that says whether we are setting
+	the high or low half word.  Queue up changes to registers.
+	(ALU32_END): Queue up changes to registers.
+	(PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
+
+	* sim-main.h (do_stack_swap): Remove declaration.
+
+	* engine.c (do_stack_swap): Make static.
+	(unqueue_writes): New function to unqueue all changes to 32 and 64
+	bit registers in order.  Implement --trace-alu.  Reset high water
+	marks for # of queued registers.  If PSW changed, possibly update
+	stack pointer.
+	(do_{long,2_short,parallel}): Unqueue register writes at the
+	appropriate time.
+
+	* d30v-insns: Modify all insns to queue changes to registers,
+	rather than do them immediately so that parallel instructions get
+	the right values for inputs.  Rewrite 16 bit operations to be done
+	in terms of masked 32 bit registers.  Don't call do_stack_swap any
+	more here.
+
+Thu Dec 11 10:06:02 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* sim-calls.c (d30v_option_handler): Add support for --extmem-size
+	to size external memory.
+	(sim_open): Ditto.  Default if no --extmem-size option is 8 meg.
+
+Wed Dec 10 01:08:24 1997  Jim Blandy  <jimb@zwingli.cygnus.com>
+
+	* d30v-insns (do_rot2h): Clip rotate amounts to four bits.  The
+ 	upper bits, and the sign of the rotation amount, are red herrings.
+	(do_sra, do_srl): Handle shifts greater than 32 bits.
+	(do_srah, do_sral): Properly sign-extend value and shift amount.
+	Handle shifts larger than 16 bits.
+
+Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Mon Dec  1 15:10:44 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (do_sub2h): For short instruction, correctly
+	dupplicate lower 16 bits of immediate in upper 16 bits.
+	(sat2z): Fix typo that ignored the upper half of the register.
+	(do_satz): If < 0, set *ra to 0, if not call do_sat.
+	(mvtsys): Before setting PSW, and with PSW_VALID.
+
+	* cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
+
+Mon Dec  1 15:05:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+	
+	* d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
+ 	printf, return dummy at end.
+	
+Mon Dec  1 15:05:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
+ 	ALU_ADDC.
+	(do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
+	(do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
+	(do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
+
+	* alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
+ 	ALU16_HAD_CARRY.
+	(ALU32_END): Ditto.
+
+	* sim-main.h (string.h, strings.h): Include.
+	
+	* sim-calls.c: Delete inclusion of string.h and strings.h.
+	
+Sun Nov 30 17:29:25 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* configure.in (--enable-sim-trapdump): New switch to control
+	whether traps 0..30 dump out the registers or do the real trap.
+	* configure: Regenerate.
+
+	* Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
+	appropriate --{en,dis}able-sim-trapdump is done.
+
+	* sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
+	(OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
+	(d30v_option_handler): Add support for --trace-trapdump.
+	(d30v_options): Ditto.
+	(sim_open): Ditto.
+
+	* d30v-insns (do_trap): Do register dump if --trace-trapdump and
+	not the system call trap.  Remove support for calling old function
+	sim_io_syscalls.
+
+Sat Nov 29 18:54:55 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
+	(TRACE_CALL_P): Non-zero if --trace-call.
+	(TRACE_ACTION): Non-zero if there is a tracing action at the end
+	of processing an instruction boundary.
+	(TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
+	(d30v_next_insn): Delete, now trace_action field in cpu state.
+
+	* cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
+	state.
+	(return_occurred): Minimum saved register to check is now 34.
+
+	* engine.c (sim_engine_run): Change call tracing to use
+	trace_action field in cpu state.
+
+	* sim-calls.c (d30v_option_handler): Handle d30v specific options.
+	(d30v_options): D30V specific options.  Right now, --trace-call.
+	(sim_open): Register d30v specific options.
+
+	* d30v-insns (call, return insns): Move --trace-debug call/return
+	tracing action to d30v specific --trace-call option.
+
+Fri Nov 28 20:12:48 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* cpu.h (CREG): Rename from CR.
+
+	* d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
+	(do_trap): Use CREG, not CR.  Switch to using cb_syscall.
+
+Thu Nov 27 19:25:43 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* cpu.h (ACC): Define as short cut to accumulators.
+
+	* d30v-insns (do_rot): Delete explicit function, use ROT32 to do
+	rotate instruction.
+	(do_trap): Make trap 30 print out accumulators and first 16
+	control registers as well.
+	(do_avg): Sign extend to 64 bit type before doing add/shift.
+	(do_avg2h): Sign extend 16 bit chunks before doing add/shift.
+
+Wed Nov 26 15:20:24 1997  Doug Evans  <devans@canuck.cygnus.com>
+
+	* Makefile.in (NL_TARGET): Define.
+
+Wed Nov 26 16:55:38 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* cpu.h (d30v_next_insn): New flag for things we are supposed to
+	trace between instruction words.
+	({call,return}_occurred): Remove index argument.
+	(d30v_{read,write}_mem): Add declarations.
+
+	* cpu.c (d30v_next_insn): New flag for things we are supposed to
+	trace between instruction words.
+	({call,return}_occurred): Remove index argument.
+	(d30v_{read,write}_mem): New functions for reading/writing
+	simulated memory in the new common system call support.
+
+	* d30v-insns: Set emacs C mode.
+	(call/return insns): Set bit to trace call at instruction
+	boundary, rather than doing it here.
+	(do_trap): Set up to use new common system call interface.
+
+	* engine.c (sim_engine_run): If d30v_next_insn is non zero, do
+	function call/return tracing.
+
+Mon Nov 24 16:40:49 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (bnot): Correctly reset bit in question.
+	(do_trap): Use common system call emulation support, rather than
+	our home grown support.
+
+Sun Nov 23 22:47:20 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (mvfacc): Immediate field is unsigned, allowing
+	shifts of up to 63 to be encoded.  Also do shift signed, rather
+	than unsigned.
+
+	* ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
+
+	* d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
+	extends.
+
+Sat Nov 22 19:04:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (illegal, wrong_slot): Replace SIGILL with
+ 	SIM_SIGILL.
+
+	* sim-calls.c (signal.h): Do not include, replaced by
+ 	sim-signal.h.
+
+	* sim-main.h (signal.h): Do not include, include sim-signal.h
+ 	instead.
+
+Fri Nov 21 09:33:54 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
+	(return_occurred): Use zfree instead of free.
+
+Wed Nov 19 13:28:09 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
+	files in $(ENGINE_H).
+
+	* d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
+	a VAL argument to add/subtract along with the carry.
+
+Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
+
+	* Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
+
+Tue Nov 18 13:56:15 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (do_trap): Change to new system call numbers.  Add
+	read emulation.
+
+Mon Nov 17 14:43:45 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (mulx): Add mulx instruction.
+
+Sun Nov 16 19:06:56 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* cpu.c ({call,return}_occurred): New trace functions to mark
+	function calls and returns and check whether all saved registers
+	really were saved.
+
+	* cpu.h ({call,return}_occurred): Add declaration.
+
+	* d30v-insns ({bsr, jsr} patterns): Call call_occurred if
+	--trace-debug to trace function calls.
+	(jmp register pattern): If this is a jump r62 and --trace-debug,
+	call return_occurred to trace function calls.
+	(bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
+	(do_ld2w): Grab memory in 64-bit chunk, to check alignment.
+	(do_st2w): Ditto.
+
+Sat Nov 15 20:57:57 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns: Undo changes from Nov. 11, allowing for odd register
+	pairs, since the machine doesn't support such usage.  Trap on odd
+	registers, rather than give a warning.  Keep do_src and do_trap
+	changes.
+
+Fri Nov 14 11:59:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (do_trap): Pacify compiler warnings for printf calls.
+
+Tue Nov 11 18:26:03 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (not_r63_reg): Rename from make_even_reg, only check
+	for register being r63.  Change callers ld2{h,w}, ld4bh{,u}.
+	(get_reg_not_r63): Rename from get_even_reg, and only check for
+	register r63.  Change callers st2{w,h}, st4b.
+	(do_src): Correct register pair for shift left.
+	(do_trap): Temporarily make trap 30 print out the registers.
+
+Tue Nov  4 08:51:22 1997  Michael Meissner  <meissner@cygnus.com>
+
+	* d30v-insns (do_trap): Make trap 31 be used for system calls.
+	Add primitive write and exit system calls.
+
+	* Makefile (FILTER): New make variable to filter out known igen
+	warnings.
+	(tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
+	out warnings that should be ignored by default.
+
+Fri Oct 31 19:36:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_open): Change EIT to memory region.
+
+Fri Oct 17 16:51:31 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
+	(ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
+
+Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Mon Sep 29 15:23:35 1997  Stu Grossman  <grossman@babylon-5.cygnus.com>
+
+	* d30v-insns (MVFSYS MVTSYS):  Fix bit patterns so that these
+	instructions get recognised.
+
+Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Sep 24 17:51:43 1997  Stu Grossman  <grossman@babylon-5.cygnus.com>
+
+	* Makefile.in (SIM_OBJS):  Add sim-break.o.
+	* (INCLUDE_DEPS):  Add tconfig.h.
+	* alu.h (MEM STORE):  Change to sim_core_read/write_unaligned to
+	allow for trapping unaligned accesses.
+	* cpu.h:  Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
+	mechanism.
+	* d30v-insn (short syscall):  Use syscall 5 for breakpoint insn.
+	* sim-calls.c (sim_fetch_register sim_store_register):  Implement.
+	* tconfig.in:  Define SIM_HAVE_BREAKPOINTS to enable intrinsic
+	breakpoint mechanism.
+	
+Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
+ 	SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
+	(SIM_EXTRA_CFLAGS): Update.
+	
+Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure.in: Specify strict alignment.
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Sep 12 16:13:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+        * sim-calls.c (sim_open): Change memory to
+        internal inst. RAM h'00000000-h'0000ffff (64KB)
+        internal data RAM  h'20000000-h'20007fff (32KB)
+        external RAM       h'80000000-h'803fffff (4MB)
+        EIT                h'fffff000-h'ffffffff
+
+
+Thu Sep 11 08:59:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* Makefile.in (SIM_OBJS): Add sim-hrw.o module.
+
+	* sim-calls.c (sim_read): Delete. use sim-hrw.
+	(sim_write): Delete, use sim-hrw.
+	
+
+Tue Sep  9 01:36:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* ic-d30v (imm_5): Update nr args passed to LSMASKED.
+
+	* d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
+ 	computing the max sat value incorrectly.
+
+Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Sep  5 09:15:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
+ 	type cast instead of SIGNED64 macro.
+
+Thu Sep  4 10:28:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* Makefile.in (SIM_OBJS): Include sim-memopt.o module.
+
+	* sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
+ 	calls.
+	(sim_open): If no memory, use memory commands to establish d30v
+ 	ram.
+	(d30v_option_handler): Delete, replased by sim-memopt.c.
+	(sim_create_inferior): Call sim_module_init.
+
+	* sim-main.h (struct sim_state): Remove members eit_ram,
+ 	sizeof_eit_ram, external_ram, baseof_external_ram,
+ 	sizeof_external_ram. Using generic memory model instead.
+
+Mon Sep  1 11:04:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_open): Use sim_state_alloc.
+
+Sat Aug 30 10:01:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
+
+	* engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
+ 	not -1.
+
+Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+	* config.in: Ditto.
+
+Wed Aug 27 13:41:54 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_open): Add call to sim_analyze_program, update
+ 	call to sim_config.
+
+	* sim-calls.c (sim_create_inferior): Add ABFD argument.
+  	Initialize CPU registers including PC.
+	(sim_load): Delete, using sim-hload.
+
+	* Makefile.in (SIM_OBJS): Add sim-hload.o module.
+
+Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+	* config.in: Ditto.
+
+Mon Aug 25 15:41:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_open): Add ABFD argument.
+	(sim_open): Move sim_config call to after sim_parse_args.
+	(sim_open): Check sim_config return status.
+
+Fri Aug 22 16:38:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
+	(do_subh_ppp): Compute rc=rb-src instead of src-rb.
+	(do_addh_ppp): Ditto.
+	
+Fri Jun 27 14:43:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
+ 	wrong.  Update handling of PSW[DS] bit.
+	(dbt): Fix debug trap address.
+
+	* cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
+
+Tue Jun 24 12:41:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
+	(DBT): Use PSW_SET to update PSW.
+	
+	* alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
+
+Tue Jun 24 12:16:14 1997  Andrew Cagney  <cagney@b2.cygnus.com>
+
+	* d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
+ 	that they are of class %s instead of class function.
+
+Tue Jun 10 12:26:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-main.h (engine_error, engine_restart, engine_halt,
+ 	engine_run_until_stop): Delete prototypes.  Functions deleted
+ 	earlier.
+	(do_interrupt_handler): Add prototype.
+	(sim_state): Add pending_event member to struct.
+
+	* sim-calls.c (sim_open): Configure interrupt handler.
+	* engine.c (d30v_interrupt_event): New function.  Deliver external
+ 	interrupt to processor.
+
+	* d30v-insns (do_stack_swap): Move function from here.
+	* engine.c (do_stack_swap): To here.
+	* sim-main.h (do_stack_swap): Add prototype.
+	
+	* cpu.h (registers): Change current_sp to an int.
+	* d30v-insn (do_stack_swap): Update.
+	
+Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
+ 	instruction.
+	(str_XXX): Fix case of XX == 3 - return "-".
+
+Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* engine.c (sim_engine_run): Issuing L->R and R->L instructions in
+ 	wrong order.
+
+	* d30v-insn (CMPUcc imm long): With of RB field should be 6 not
+ 	three.
+	(MUL, MUL2H, MULHX): X field 01 instead of 10.
+
+Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
+	(dbt, rtd): New instructions.
+
+	* cpu.h (NR_CONTROL_REGISTERS): Now 15.
+	(debug_program_status_word_cr, debug_program_counter_cr): Add
+ 	debug control registers. Renumber other control registers.
+	(PSW_DS): New PSW bit.
+	(DPC, DPSW): Define.
+
+Wed May 28 13:45:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* engine.c (sim_engine_run): Check the event queue on every cycle.
+
+	* sim-calls.c (sim_size): Delete.
+	(sim_do_command): Call sim_args_command.
+	(sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
+	(simulation): Delete global now depend on sd argument.
+	(sim_open): Initialize sim-watch.
+	(d30v_option_handler): New function, parse mem-size argument.
+
+Tue May 27 14:03:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_set_callbacks): Delete.
+	(sim_write): Pass NULL cpu arg to sim_core_write_buffer.
+
+	* engine.c (engine_init): Delete.  Handled in sim_open.
+	(engine_create): Ditto.
+	
+Tue May 20 10:15:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_open): Add callback argument.
+	(sim_set_callbacks): Delete SIM_DESC argument.
+
+Mon May 19 14:59:32 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_open): Set the sim.base magic number.
+
+Fri May 16 15:25:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* d30v-insns: Replace engine_error with common sim_engine_abort.
+	* cpu.c (is_condition_ok, is_wrong_slot): Ditto.
+
+	* engine.c (engine_run_until_stop): Rename this.
+	(sim_engine_run): To this. Simplify - most moved to common.
+
+	* sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
+ 	Delete. Replaced by common code.
+
+	* engine.c (engine_error, engine_restart, engine_halt): Ditto.
+	
+	* sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
+ 	Define as NOPs.
+
+Mon May  5 23:05:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
+ 	../common.
+	* sim-calls.c (sim_open): Ditto.
+
+	* alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
+ 	notice.
+
+Fri May  2 12:01:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim-options.h, sim-utils.h): Include.
+	* Makefile.in (sim-calls.o): Add dependencies.
+
+	* d30v-insns (address_word): Remove cia argument from support
+ 	functions, igen now does this automatically.
+
+	* Makefile.in (tmp-igen): Include line number information in
+ 	generated files.
+
+	* sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
+ 	simulator base type sim_state_base.
+	(sim-core.h, sim-events.h, sim-io.h): Replace with #include
+	"sim-base.h".
+
+	* sim-main.h (sim_state): Track recomendations in common
+ 	directory.
+  	* cpu.h (sim_cpu): Ditto.
+  	* engine.c (do_2_short, do_parallel): Ditto.
+	* cpu.h (GPR): Ditto.
+	* alu.h (MEM, IMEM, STORE): Ditto.
+	* cpu.c (is_wrong_slot): Ditto.
+	* ic-d30v (Aa, Ab): Ditto.
+
+Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+	* Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
+	* sim-calls.c (sim_open): Call sim_module_uninstall if argument
+	parsing fails.  Call sim_post_argv_init.
+	(sim_close): Call sim_module_uninstall.
+
+Fri Apr 18 13:44:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-calls.c (sim_stop): New function.
+
+Thu Apr 17 02:57:55 1997  Doug Evans  <dje@canuck.cygnus.com>
+
+	* Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
+	(SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
+	(SIM_RUN_OBJS): Change from run.o to nrun.o.
+	* cpu.h (sim_cpu): New member base.  Delete members trace, sd.
+	(cpu_traces): Delete.
+	* engine.c (engine_init): Set backlink from cpu to state.
+	* sim-calls.c: #include bfd.h.
+	(sim_open): Set STATE_OPEN_KIND.  Call sim_pre_argv_init,
+	sim_parse_args.
+	(sim_load): Return SIM_RC.  New arg abfd.
+	Call sim_load_file to load file into simulator.
+	(sim_create_inferior): Return SIM_RC.  Delete arg start_address.
+	(sim_trace): Delete.
+	* sim-main.h (struct sim_state): sim_state_base is typedef now.
+	(STATE_CPU): Define.
+
+Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+	* config.in: Ditto.
+
+Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
+
+	* Makefile.in (SIM_EXTRA_DEPS): Define.
+	(SIM_OBJS): Add sim-utils.o.
+	(SIM_GEN): Delete tmp-common.
+	(SIM_EXTRA_CLEAN): Delete clean-common.
+	(BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
+	(tmp-common,clean-common): Delete.
+	(ENGINE_H): sim-state.h renamed to sim-main.h.
+	(clean-igen): Delete tmp-insns.
+
+	* cpu.c: sim-state.h renamed to sim-main.h.
+	* engine.c: Likewise.
+	* sim-calls.c: Likewise.
+	(zalloc,zfree): Moved to ../common/sim-utils.c.
+	* sim-main.h: Renamed from sim-state.h.
+
+	* sim-calls.c (sim_open): New arg `kind'.
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
+
+	* configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Apr  2 11:13:15 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
+
+	* engine.c (current_target_byte_order, current_host_byte_order,
+ 	current_environment, current_alignment, current_floating_point,
+ 	current_model_issue, current_stdio): Delete, moved to
+ 	../common/sim-config.c
+
+Mon Mar 24 14:50:30 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns (do_ldw): Load 4 bytes not 2.
+	(do_incr, LD*, ST*): Increment register not its value.
+
+Mon Mar 24 09:59:53 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* cpu.c (is_wrong_slot): Ditto.
+	(is_condition_ok): Ditto.
+
+	* sim-calls.c (sim_trace): Ditto.
+
+	* engine.c (engine_init): Ditto.
+	(do_2_short): Ditto.
+	(engine_run_until_stop): Ditto.
+
+	* d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
+ 	and `cpu *processor' arguments as igen now handles this.
+
+	* cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
+ 	processor to cpu.
+
+	* sim-state.h: Update.
+
+Fri Mar 21 12:52:12 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns (do_sat): Correct calculation of saturate lower
+ 	bound.
+	(do_sath): Ditto.
+	(do_satzh, do_satz): Arguments should be signed.
+	
+	* sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
+ 	moment.
+	(filter_filename): Drop.
+
+	* cpu.h (is_wrong_slot): Correct declaration name - was
+ 	is_valid_slot.
+
+	* engine.c (do_parallel): Plicate GCC.
+	(engine_error): Ditto.
+	(engine_run_until_stop): Ditto.
+	* cpu.c (is_wrong_slot): Ditto.
+	(is_condition_ok): Ditto.
+	* sim-calls.c (sim_size): Ditto.
+	(sim_read): Ditto.
+	(sim_trace): Ditto.
+	
+	* engine.h, engine.c (engine_create): Add missing prototype to
+ 	header file.  Clean up missing variables.
+
+	* configure.in (unistd.h, string.h, strings.h): Configure in.
+	* configure, config.in: Rebuild.
+
+Thu Mar 20 19:40:20 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns (void): Provide a second emul instruction using a
+ 	branch prefix.
+
+Tue Mar 18 20:51:42 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insn (do_sat*): Pass all necessary args.
+	
+Tue Mar 18 18:49:10 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns (SAT*): Issue warning when bit overflow.
+	(EMUL): Exit with GPR[2] not 2.
+
+Tue Mar 18 14:24:09 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* sim-state.h: New file rename engine.h.
+	(sim_state): Rename engine strut to sim_state, rename events and
+ 	core members.
+	
+	* engine.c: Update.
+	* cpu.h, cpu.c: Ditto.
+	* alu.h: Ditto.
+	* d30v-insns: Ditto.
+	* sim-calls.c: Ditto.
+
+	* Makefile.in (sim-*.c): Moved to ../common.
+
+Tue Mar 18 10:39:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns (do_mac): Adding wrong register.
+	(do_macs): Ditto.
+	(do_msub): Ditto.
+	(do_msubs): Ditto.
+
+	* ic-d30v: Put back definitions of RaH, RaL, et.al.
+	(do_sra2h, do_srah): Use.
+	(do_srl2h, do_srlh): Use.
+	
+	* d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
+
+Tue Mar 18 03:01:25 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns: Specify wild insted of reserved bits.
+	(void): 
+
+Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* configure: Re-generate.
+
+Mon Mar 17 14:35:37 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
+ 	options. Allow RESERVED_BITS to be configured.
+	* configure: Re-generate.
+	
+	* Makefile.in (sim-*.h): Drop, not needed.
+	(sim-*.c): Make each explicit so that they automatically update.
+
+Sat Mar 15 02:34:30 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* ic-d30v (imm long): Incorrect calculation.
+
+	* d30v-insns (EMUL): Finish exit, write-string emul-call.
+
+	* sim-calls.c (sim_trace): Have sim-trace enable basic instruction
+ 	tracing.
+
+Sat Mar 15 02:10:31 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* configure.in: Enable common options - endian, inline and
+ 	warnings.
+	* configure: Regenerate.
+	
+Fri Mar 14 16:11:50 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* Makefile.in (cpu.o): Update dependencies.
+	* cpu.c (is_condition_ok): Update PSW bit manipulations.
+
+Fri Mar 14 12:49:20 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* configure.in: Autoconfig m4
+	* configure: Regenerate.
+
+	* Makefile.in: Use m4 to preprocess d30v-insns.
+	* d30v-insn: Adjust.
+
+Thu Mar 13 12:44:54 1997  Doug Evans  <dje@canuck.cygnus.com>
+
+	* sim-calls.c (sim_open): New SIM_DESC result.  Argument is now
+	in argv form.
+	(other sim_*): New SIM_DESC argument.
+
+Wed Mar 12 19:05:45 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* sim-calls.c (sim_open): Create all the d30v RAM blocks.
+
+	* engine.c (engine_run_until_stop): Handle delayed subroutine
+ 	call.
+	* d30v-insn: Ditto.
+	
+	* ic-d30v: For Rb and Rc always return the value and not the
+ 	equation.
+	* d30v-insn: Use.
+	
+	* ic-d30v (val_Ra): Returns 0 or RA.
+	* d30v-insn: Use.
+	
+	* d30v-insn (make_even_reg, get_even_reg): New functions. Force
+ 	the register index to be even, issusing a warning if it was not.
+	(LD*, ST*): Use.
+	
+Wed Mar 12 14:57:26 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns (do_trap): Implement TRAP instruction.
+
+	* alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
+ 	onto PSW bit.
+	* ic-d30v: Drop F* expressions.
+	* d30v-insn: Use more explicit PSW_FLAG_ ops.
+	* cpu.h (PSW_*): Redo PSW bit values.
+	* alu.h (ALU*_END): Update. Fix setting of overflow - logic was
+ 	backwards.
+	
+	* d30v-insn (MVFSYS, MVTSYS): Implement.
+	* cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
+	
+Wed Mar 12 14:12:11 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* cpu.h (RPT_IS_CALL): New macro for processor field
+ 	is_delayed_call.  That in turn used as a flag to indicate if a
+ 	delayed branch or delayed call is to occure.
+	* d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
+	(do_dbrai): Ditto.
+	(do_dbsr): Ditto.
+	(do_dbsr): Ditto.
+	(do_djmp): Ditto.
+	(do_djmpi): Dotto.
+	(do_djsr): Ditto.
+	(do_djsri): Ditto.
+	(void): 
+
+	* d30v-insn (do_incr): Finish - handle modulo registers.
+	
+	* d30v-insns (CMPU): Include all possible compare
+ 	operations. Issue a warning where op defined by the processor
+ 	spec.
+	
+Wed Mar 12 13:55:55 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns: Add a new instruction class _EMUL and a new
+ 	instruction EMUL that emulates a few basic IO operations.
+
+	* Makefile.in (tmp-igen): Filter in emul instructions.
+
+Fri Mar  7 20:32:13 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
+
+	* d30v-insns (void): Fill in the gaps.
+
+Wed Feb 26 09:31:10 1997  Andrew Cagney  <cagney@kremvax.tpgi.com.au>
+
+	* Makefile.in (tmp-igen): Include ic-d30v in dependencies.
+
+	* ic-d30v (cache): Update to use H_word, L_word added to
+ 	sim-endian.h.
+
+Tue Feb 25 15:26:51 1997  Andrew Cagney  <cagney@kremvax.tpgi.com.au>
+
+	* Makefile.in (tmp-igen): Correctly run $(MAKE).
+
+Thu Feb 20 20:30:31 1997  Andrew Cagney  <cagney@critters.cygnus.com>
+
+	* Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
+ 	files dependant on tmp-igen. Define ENGINE_H.
+	
+Sun Feb 16 16:42:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
+
+	* configure.in: New file - follow Doug Evans instructions.
+	* Makefile.in: Ditto.
+
diff --git a/sim/d30v/Makefile.in b/sim/d30v/Makefile.in
new file mode 100644
index 0000000..d563be8
--- /dev/null
+++ b/sim/d30v/Makefile.in
@@ -0,0 +1,217 @@
+#   Mitsubishi Electric Corp. D30V Simulator.
+#   Copyright (C) 1997, Free Software Foundation, Inc.
+#   Contributed by Cygnus Support.
+# 
+# This file is part of GDB, the GNU debugger.
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+M4= @M4@
+
+
+## COMMON_PRE_CONFIG_FRAG
+
+# These variables are given default values in COMMON_PRE_CONFIG_FRAG.
+# We override the ones we need to here.
+# Not all of these need to be mentioned, only the necessary ones.
+
+# List of object files, less common parts.
+SIM_OBJS = \
+	$(SIM_NEW_COMMON_OBJS) \
+	engine.o cpu.o \
+	s_support.o l_support.o \
+	s_idecode.o l_idecode.o  \
+	s_semantics.o l_semantics.o \
+	sim-calls.o itable.o \
+	sim-hload.o \
+	sim-hrw.o \
+	sim-engine.o \
+	sim-stop.o \
+	sim-reason.o \
+	sim-resume.o
+
+# List of extra dependencies.
+# Generally this consists of simulator specific files included by sim-main.h.
+SIM_EXTRA_DEPS = itable.h s_idecode.h l_idecode.h cpu.h alu.h
+
+# List of generators
+SIM_GEN=tmp-igen
+
+# List of extra flags to always pass to $(CC).
+SIM_EXTRA_CFLAGS = @sim_trapdump@
+
+# List of main object files for `run'.
+SIM_RUN_OBJS = nrun.o
+
+# Dependency of `clean' to clean any extra files.
+SIM_EXTRA_CLEAN = clean-igen
+
+# This selects the d30v newlib/libgloss syscall definitions.
+NL_TARGET=-DNL_TARGET_d30v
+
+## COMMON_POST_CONFIG_FRAG
+
+MAIN_INCLUDE_DEPS = tconfig.h
+INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS)
+
+# Rules need to build $(SIM_OBJS), plus whatever else the target wants.
+
+# ... target specific rules ...
+
+# Filter to eliminate known warnings
+FILTER = 2>&1 | egrep -v "Discarding instruction|instruction field of type \`compute\' changed to \`cache\'|Instruction format is not 64 bits wide"
+
+BUILT_SRC_FROM_IGEN = \
+	s_icache.h \
+	s_icache.c \
+	s_idecode.h \
+	s_idecode.c \
+	s_semantics.h \
+	s_semantics.c \
+	s_model.h \
+	s_model.c \
+	s_support.h \
+	s_support.c \
+	l_icache.h \
+	l_icache.c \
+	l_idecode.h \
+	l_idecode.c \
+	l_semantics.h \
+	l_semantics.c \
+	l_model.h \
+	l_model.c \
+	l_support.h \
+	l_support.c \
+	itable.h itable.c
+$(BUILT_SRC_FROM_IGEN): tmp-igen
+#
+
+.PHONY: clean-igen
+clean-igen:
+	rm -f $(BUILT_SRC_FROM_IGEN)
+	rm -f tmp-igen tmp-insns
+
+../igen/igen:
+	cd ../igen && $(MAKE)
+
+tmp-igen: $(srcdir)/dc-short $(srcdir)/d30v-insns $(srcdir)/ic-d30v ../igen/igen
+	cd ../igen && $(MAKE)
+	echo "# 1 \"$(srcdir)/d30v-insns\"" > tmp-insns
+	$(M4) < $(srcdir)/d30v-insns >> tmp-insns 
+	@echo "Generating short version ..."
+	../igen/igen \
+		-G gen-zero-r0 \
+		-G direct-access \
+		-G default-nia-minus-one \
+		-G conditional-issue \
+		-G verify-slot \
+		-G field-widths \
+		-F short,emul \
+		-B 32 \
+		-P "s_" \
+		-o $(srcdir)/dc-short \
+		-k $(srcdir)/ic-d30v \
+		-n $(srcdir)/d30v-insns -i tmp-insns \
+		-n s_icache.h    -hc tmp-icache.h \
+		-n s_icache.c    -c  tmp-icache.c \
+		-n s_semantics.h -hs tmp-semantics.h \
+		-n s_semantics.c -s  tmp-semantics.c \
+		-n s_idecode.h   -hd tmp-idecode.h \
+		-n s_idecode.c   -d  tmp-idecode.c \
+		-n s_model.h     -hm tmp-model.h \
+		-n s_model.c     -m  tmp-model.c \
+		-n s_support.h   -hf tmp-support.h \
+		-n s_support.c   -f  tmp-support.c $(FILTER)
+	$(srcdir)/../../move-if-change tmp-icache.h s_icache.h
+	$(srcdir)/../../move-if-change tmp-icache.c s_icache.c
+	$(srcdir)/../../move-if-change tmp-idecode.h s_idecode.h
+	$(srcdir)/../../move-if-change tmp-idecode.c s_idecode.c
+	$(srcdir)/../../move-if-change tmp-semantics.h s_semantics.h
+	$(srcdir)/../../move-if-change tmp-semantics.c s_semantics.c
+	$(srcdir)/../../move-if-change tmp-model.h s_model.h
+	$(srcdir)/../../move-if-change tmp-model.c s_model.c
+	$(srcdir)/../../move-if-change tmp-support.h s_support.h
+	$(srcdir)/../../move-if-change tmp-support.c s_support.c
+	@echo "Generating long version ..."
+	../igen/igen \
+		-G gen-zero-r0 \
+		-G direct-access \
+		-G default-nia-minus-one \
+		-G conditional-issue \
+		-G field-widths \
+		-F long,emul \
+		-B 64 \
+		-P "l_" \
+		-o $(srcdir)/dc-short \
+		-k $(srcdir)/ic-d30v \
+		-i tmp-insns \
+		-n l_icache.h    -hc tmp-icache.h \
+		-n l_icache.c    -c  tmp-icache.c \
+		-n l_semantics.h -hs tmp-semantics.h \
+		-n l_semantics.c -s  tmp-semantics.c \
+		-n l_idecode.h   -hd tmp-idecode.h \
+		-n l_idecode.c   -d  tmp-idecode.c \
+		-n l_model.h     -hm tmp-model.h \
+		-n l_model.c     -m  tmp-model.c \
+		-n l_support.h   -hf tmp-support.h \
+		-n l_support.c   -f  tmp-support.c $(FILTER)
+	$(srcdir)/../../move-if-change tmp-icache.h l_icache.h
+	$(srcdir)/../../move-if-change tmp-icache.c l_icache.c
+	$(srcdir)/../../move-if-change tmp-idecode.h l_idecode.h
+	$(srcdir)/../../move-if-change tmp-idecode.c l_idecode.c
+	$(srcdir)/../../move-if-change tmp-semantics.h l_semantics.h
+	$(srcdir)/../../move-if-change tmp-semantics.c l_semantics.c
+	$(srcdir)/../../move-if-change tmp-model.h l_model.h
+	$(srcdir)/../../move-if-change tmp-model.c l_model.c
+	$(srcdir)/../../move-if-change tmp-support.h l_support.h
+	$(srcdir)/../../move-if-change tmp-support.c l_support.c
+	@echo "Generating instruction database ..."
+	../igen/igen \
+		-G field-widths \
+		-F short,long,emul \
+		-B 64 \
+		-o $(srcdir)/dc-short \
+		-k $(srcdir)/ic-d30v \
+		-i tmp-insns \
+		-n itable.h    -ht tmp-itable.h \
+		-n itable.c    -t  tmp-itable.c $(FILTER)
+	$(srcdir)/../../move-if-change tmp-itable.h itable.h
+	$(srcdir)/../../move-if-change tmp-itable.c itable.c
+	touch tmp-igen
+
+ENGINE_H = \
+	sim-main.h \
+	$(srcdir)/../common/sim-basics.h \
+	config.h \
+	$(srcdir)/../common/sim-config.h \
+	$(srcdir)/../common/sim-inline.h \
+	$(srcdir)/../common/sim-types.h \
+	$(srcdir)/../common/sim-bits.h \
+	$(srcdir)/../common/sim-endian.h \
+	itable.h \
+	l_idecode.h s_idecode.h \
+	cpu.h \
+	alu.h \
+	$(srcdir)/../common/sim-alu.h \
+	$(srcdir)/../common/sim-core.h \
+	$(srcdir)/../common/sim-events.h \
+
+engine.o: engine.c $(ENGINE_H)
+sim-calls.o: sim-calls.c $(ENGINE_H) $(srcdir)/../common/sim-utils.h $(srcdir)/../common/sim-options.h
+cpu.o: cpu.c $(ENGINE_H)
+s_support.o: s_support.c $(ENGINE_H)
+l_support.o: l_support.c $(ENGINE_H)
+s_semantics.o: s_semantics.c $(ENGINE_H)
+l_semantics.o: l_semantics.c $(ENGINE_H)
diff --git a/sim/d30v/acconfig.h b/sim/d30v/acconfig.h
new file mode 100644
index 0000000..f9b87a1
--- /dev/null
+++ b/sim/d30v/acconfig.h
@@ -0,0 +1,15 @@
+
+/* Define to 1 if NLS is requested.  */
+#undef ENABLE_NLS
+
+/* Define as 1 if you have catgets and don't want to use GNU gettext.  */
+#undef HAVE_CATGETS
+
+/* Define as 1 if you have gettext and don't want to use GNU gettext.  */
+#undef HAVE_GETTEXT
+
+/* Define as 1 if you have the stpcpy function.  */
+#undef HAVE_STPCPY
+
+/* Define if your locale.h file contains LC_MESSAGES.  */
+#undef HAVE_LC_MESSAGES
diff --git a/sim/d30v/alu.h b/sim/d30v/alu.h
new file mode 100644
index 0000000..d39ee3f
--- /dev/null
+++ b/sim/d30v/alu.h
@@ -0,0 +1,106 @@
+/* Mitsubishi Electric Corp. D30V Simulator.
+   Copyright (C) 1997, Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+This file is part of GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+
+#ifndef _D30V_ALU_H_
+#define _D30V_ALU_H_
+
+#define ALU_CARRY (PSW_VAL(PSW_C) != 0)
+
+#include "sim-alu.h"
+
+#define ALU16_END(TARG, HIGH)						\
+{									\
+  unsigned32 mask, value;						\
+  if (ALU16_HAD_OVERFLOW) {						\
+    mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C);		\
+    value = BIT32 (PSW_V) | BIT32 (PSW_VA);				\
+  }									\
+  else {								\
+    mask = BIT32 (PSW_V) | BIT32 (PSW_C);				\
+    value = 0;								\
+  }									\
+  if (ALU16_HAD_CARRY_BORROW)						\
+    value |= BIT32 (PSW_C);						\
+  if (HIGH)								\
+    WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT<<16, 0xffff0000);	\
+  else									\
+    WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT, 0x0000ffff);	\
+  WRITE32_QUEUE_MASK (&PSW, value, mask);				\
+}
+
+#define ALU32_END(TARG)							\
+{									\
+  unsigned32 mask, value;						\
+  if (ALU32_HAD_OVERFLOW) {						\
+    mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C);		\
+    value = BIT32 (PSW_V) | BIT32 (PSW_VA);				\
+  }									\
+  else {								\
+    mask = BIT32 (PSW_V) | BIT32 (PSW_C);				\
+    value = 0;								\
+  }									\
+  if (ALU32_HAD_CARRY_BORROW)						\
+    value |= BIT32 (PSW_C);						\
+  WRITE32_QUEUE (TARG, ALU32_OVERFLOW_RESULT);				\
+  WRITE32_QUEUE_MASK (&PSW, value, mask);				\
+}
+
+#define ALU_END(TARG) ALU32_END(TARG)
+
+
+/* PSW & Flag manipulation */
+
+#define PSW_SET(BIT,VAL) BLIT32(PSW, (BIT), (VAL))
+#define PSW_VAL(BIT) EXTRACTED32(PSW, (BIT), (BIT))
+
+#define PSW_F(FLAG) (17 + ((FLAG) % 8) * 2)
+#define PSW_FLAG_SET(FLAG,VAL) PSW_SET(PSW_F(FLAG), VAL)
+#define PSW_FLAG_VAL(FLAG) PSW_VAL(PSW_F(FLAG))
+
+#define PSW_SET_QUEUE(BIT,VAL)						\
+do {									\
+  unsigned32 mask = BIT32 (BIT);					\
+  unsigned32 bitval = (VAL) ? mask : 0;					\
+  WRITE32_QUEUE_MASK (&PSW, bitval, mask);				\
+} while (0)
+
+#define PSW_FLAG_SET_QUEUE(FLAG,VAL)					\
+do {									\
+  unsigned32 mask = BIT32 (PSW_F (FLAG));				\
+  unsigned32 bitval = (VAL) ? mask : 0;					\
+  WRITE32_QUEUE_MASK (&PSW, bitval, mask);				\
+} while (0)
+
+/* Bring data in from the cold */
+
+#define IMEM(EA) \
+(sim_core_read_8(STATE_CPU (sd, 0), cia, exec_map, (EA)))
+
+#define MEM(SIGN, EA, NR_BYTES) \
+((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, read_map, (EA)))
+
+#define STORE(EA, NR_BYTES, VAL) \
+do { \
+  sim_core_write_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, write_map, (EA), (VAL)); \
+} while (0)
+
+
+#endif
diff --git a/sim/d30v/config.in b/sim/d30v/config.in
new file mode 100644
index 0000000..9723b86
--- /dev/null
+++ b/sim/d30v/config.in
@@ -0,0 +1,162 @@
+/* config.in.  Generated automatically from configure.in by autoheader.  */
+
+/* Define if using alloca.c.  */
+#undef C_ALLOCA
+
+/* Define to empty if the keyword does not work.  */
+#undef const
+
+/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
+   This function is required for alloca.c support on those systems.  */
+#undef CRAY_STACKSEG_END
+
+/* Define if you have alloca, as a function or macro.  */
+#undef HAVE_ALLOCA
+
+/* Define if you have <alloca.h> and it should be used (not on Ultrix).  */
+#undef HAVE_ALLOCA_H
+
+/* Define if you have a working `mmap' system call.  */
+#undef HAVE_MMAP
+
+/* Define as __inline if that's what the C compiler calls it.  */
+#undef inline
+
+/* Define to `long' if <sys/types.h> doesn't define.  */
+#undef off_t
+
+/* Define if you need to in order for stat and other things to work.  */
+#undef _POSIX_SOURCE
+
+/* Define as the return type of signal handlers (int or void).  */
+#undef RETSIGTYPE
+
+/* Define to `unsigned' if <sys/types.h> doesn't define.  */
+#undef size_t
+
+/* If using the C implementation of alloca, define if you know the
+   direction of stack growth for your system; otherwise it will be
+   automatically deduced at run-time.
+ STACK_DIRECTION > 0 => grows toward higher addresses
+ STACK_DIRECTION < 0 => grows toward lower addresses
+ STACK_DIRECTION = 0 => direction of growth unknown
+ */
+#undef STACK_DIRECTION
+
+/* Define if you have the ANSI C header files.  */
+#undef STDC_HEADERS
+
+/* Define if your processor stores words with the most significant
+   byte first (like Motorola and SPARC, unlike Intel and VAX).  */
+#undef WORDS_BIGENDIAN
+
+/* Define to 1 if NLS is requested.  */
+#undef ENABLE_NLS
+
+/* Define as 1 if you have gettext and don't want to use GNU gettext.  */
+#undef HAVE_GETTEXT
+
+/* Define as 1 if you have the stpcpy function.  */
+#undef HAVE_STPCPY
+
+/* Define if your locale.h file contains LC_MESSAGES.  */
+#undef HAVE_LC_MESSAGES
+
+/* Define if you have the __argz_count function.  */
+#undef HAVE___ARGZ_COUNT
+
+/* Define if you have the __argz_next function.  */
+#undef HAVE___ARGZ_NEXT
+
+/* Define if you have the __argz_stringify function.  */
+#undef HAVE___ARGZ_STRINGIFY
+
+/* Define if you have the __setfpucw function.  */
+#undef HAVE___SETFPUCW
+
+/* Define if you have the dcgettext function.  */
+#undef HAVE_DCGETTEXT
+
+/* Define if you have the getcwd function.  */
+#undef HAVE_GETCWD
+
+/* Define if you have the getpagesize function.  */
+#undef HAVE_GETPAGESIZE
+
+/* Define if you have the getrusage function.  */
+#undef HAVE_GETRUSAGE
+
+/* Define if you have the munmap function.  */
+#undef HAVE_MUNMAP
+
+/* Define if you have the putenv function.  */
+#undef HAVE_PUTENV
+
+/* Define if you have the setenv function.  */
+#undef HAVE_SETENV
+
+/* Define if you have the setlocale function.  */
+#undef HAVE_SETLOCALE
+
+/* Define if you have the sigaction function.  */
+#undef HAVE_SIGACTION
+
+/* Define if you have the stpcpy function.  */
+#undef HAVE_STPCPY
+
+/* Define if you have the strcasecmp function.  */
+#undef HAVE_STRCASECMP
+
+/* Define if you have the strchr function.  */
+#undef HAVE_STRCHR
+
+/* Define if you have the time function.  */
+#undef HAVE_TIME
+
+/* Define if you have the <argz.h> header file.  */
+#undef HAVE_ARGZ_H
+
+/* Define if you have the <fcntl.h> header file.  */
+#undef HAVE_FCNTL_H
+
+/* Define if you have the <fpu_control.h> header file.  */
+#undef HAVE_FPU_CONTROL_H
+
+/* Define if you have the <limits.h> header file.  */
+#undef HAVE_LIMITS_H
+
+/* Define if you have the <locale.h> header file.  */
+#undef HAVE_LOCALE_H
+
+/* Define if you have the <malloc.h> header file.  */
+#undef HAVE_MALLOC_H
+
+/* Define if you have the <nl_types.h> header file.  */
+#undef HAVE_NL_TYPES_H
+
+/* Define if you have the <stdlib.h> header file.  */
+#undef HAVE_STDLIB_H
+
+/* Define if you have the <string.h> header file.  */
+#undef HAVE_STRING_H
+
+/* Define if you have the <strings.h> header file.  */
+#undef HAVE_STRINGS_H
+
+/* Define if you have the <sys/param.h> header file.  */
+#undef HAVE_SYS_PARAM_H
+
+/* Define if you have the <sys/resource.h> header file.  */
+#undef HAVE_SYS_RESOURCE_H
+
+/* Define if you have the <sys/time.h> header file.  */
+#undef HAVE_SYS_TIME_H
+
+/* Define if you have the <time.h> header file.  */
+#undef HAVE_TIME_H
+
+/* Define if you have the <unistd.h> header file.  */
+#undef HAVE_UNISTD_H
+
+/* Define if you have the <values.h> header file.  */
+#undef HAVE_VALUES_H
diff --git a/sim/d30v/configure b/sim/d30v/configure
new file mode 100755
index 0000000..3e787ae
--- /dev/null
+++ b/sim/d30v/configure
@@ -0,0 +1,4264 @@
+#! /bin/sh
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+sim_inline="-DDEFAULT_INLINE=0"
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+# This file is derived from `gettext.m4'.  The difference is that the
+# included macros assume Cygnus-style source and build trees.
+
+# Macro to add for using GNU gettext.
+# Ulrich Drepper <drepper@cygnus.com>, 1995.
+#
+# This file file be copied and used freely without restrictions.  It can
+# be used in projects which are not available under the GNU Public License
+# but which still want to provide support for the GNU gettext functionality.
+# Please note that the actual code is *not* freely available.
+
+# serial 3
+
+
+
+
+
+# Search path for a program which passes the given test.
+# Ulrich Drepper <drepper@cygnus.com>, 1996.
+#
+# This file file be copied and used freely without restrictions.  It can
+# be used in projects which are not available under the GNU Public License
+# but which still want to provide support for the GNU gettext functionality.
+# Please note that the actual code is *not* freely available.
+
+# serial 1
+
+
+
+# Check whether LC_MESSAGES is available in <locale.h>.
+# Ulrich Drepper <drepper@cygnus.com>, 1995.
+#
+# This file file be copied and used freely without restrictions.  It can
+# be used in projects which are not available under the GNU Public License
+# but which still want to provide support for the GNU gettext functionality.
+# Please note that the actual code is *not* freely available.
+
+# serial 1
+
+
+
+# Check to see if we're running under Cygwin32, without using
+# AC_CANONICAL_*.  If so, set output variable CYGWIN32 to "yes".
+# Otherwise set it to "no".
+
+
+
+# Check to see if we're running under Win32, without using
+# AC_CANONICAL_*.  If so, set output variable EXEEXT to ".exe".
+# Otherwise set it to "".
+
+
+
+
+# Guess values for system-dependent variables and create Makefiles.
+# Generated automatically using autoconf version 2.12.2 
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
+#
+# This configure script is free software; the Free Software Foundation
+# gives unlimited permission to copy, distribute and modify it.
+
+# Defaults:
+ac_help=
+ac_default_prefix=/usr/local
+# Any additions from configure.in:
+ac_help="$ac_help
+  --disable-nls           do not use Native Language Support"
+ac_help="$ac_help
+  --with-included-gettext use the GNU gettext library included here"
+ac_help="$ac_help
+  --enable-maintainer-mode		Enable developer functionality."
+ac_help="$ac_help
+  --enable-sim-bswap			Use Host specific BSWAP instruction."
+ac_help="$ac_help
+  --enable-sim-cflags=opts		Extra CFLAGS for use in building simulator"
+ac_help="$ac_help
+  --enable-sim-debug=opts		Enable debugging flags"
+ac_help="$ac_help
+  --enable-sim-stdio			Specify whether to use stdio for console input/output."
+ac_help="$ac_help
+  --enable-sim-trace=opts		Enable tracing flags"
+ac_help="$ac_help
+  --enable-sim-profile=opts		Enable profiling flags"
+ac_help="$ac_help
+  --enable-sim-inline=inlines		Specify which functions should be inlined."
+ac_help="$ac_help
+  --enable-sim-endian=endian		Specify target byte endian orientation."
+ac_help="$ac_help
+  --enable-sim-alignment=align		Specify strict,  nonstrict or forced alignment of memory accesses."
+ac_help="$ac_help
+  --enable-sim-hostendian=end		Specify host byte endian orientation."
+ac_help="$ac_help
+  --enable-build-warnings[=LIST]		Enable build-time compiler warnings"
+ac_help="$ac_help
+  --enable-sim-reserved-bits		Specify whether to check reserved bits in instruction."
+ac_help="$ac_help
+  --enable-sim-trapdump		Make unknown traps dump the registers"
+
+# Initialize some variables set by options.
+# The variables have the same names as the options, with
+# dashes changed to underlines.
+build=NONE
+cache_file=./config.cache
+exec_prefix=NONE
+host=NONE
+no_create=
+nonopt=NONE
+no_recursion=
+prefix=NONE
+program_prefix=NONE
+program_suffix=NONE
+program_transform_name=s,x,x,
+silent=
+site=
+srcdir=
+target=NONE
+verbose=
+x_includes=NONE
+x_libraries=NONE
+bindir='${exec_prefix}/bin'
+sbindir='${exec_prefix}/sbin'
+libexecdir='${exec_prefix}/libexec'
+datadir='${prefix}/share'
+sysconfdir='${prefix}/etc'
+sharedstatedir='${prefix}/com'
+localstatedir='${prefix}/var'
+libdir='${exec_prefix}/lib'
+includedir='${prefix}/include'
+oldincludedir='/usr/include'
+infodir='${prefix}/info'
+mandir='${prefix}/man'
+
+# Initialize some other variables.
+subdirs=
+MFLAGS= MAKEFLAGS=
+SHELL=${CONFIG_SHELL-/bin/sh}
+# Maximum number of lines to put in a shell here document.
+ac_max_here_lines=12
+
+ac_prev=
+for ac_option
+do
+
+  # If the previous option needs an argument, assign it.
+  if test -n "$ac_prev"; then
+    eval "$ac_prev=\$ac_option"
+    ac_prev=
+    continue
+  fi
+
+  case "$ac_option" in
+  -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
+  *) ac_optarg= ;;
+  esac
+
+  # Accept the important Cygnus configure options, so we can diagnose typos.
+
+  case "$ac_option" in
+
+  -bindir | --bindir | --bindi | --bind | --bin | --bi)
+    ac_prev=bindir ;;
+  -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
+    bindir="$ac_optarg" ;;
+
+  -build | --build | --buil | --bui | --bu)
+    ac_prev=build ;;
+  -build=* | --build=* | --buil=* | --bui=* | --bu=*)
+    build="$ac_optarg" ;;
+
+  -cache-file | --cache-file | --cache-fil | --cache-fi \
+  | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
+    ac_prev=cache_file ;;
+  -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
+  | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
+    cache_file="$ac_optarg" ;;
+
+  -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
+    ac_prev=datadir ;;
+  -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
+  | --da=*)
+    datadir="$ac_optarg" ;;
+
+  -disable-* | --disable-*)
+    ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
+    # Reject names that are not valid shell variable names.
+    if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
+      { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
+    fi
+    ac_feature=`echo $ac_feature| sed 's/-/_/g'`
+    eval "enable_${ac_feature}=no" ;;
+
+  -enable-* | --enable-*)
+    ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
+    # Reject names that are not valid shell variable names.
+    if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
+      { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
+    fi
+    ac_feature=`echo $ac_feature| sed 's/-/_/g'`
+    case "$ac_option" in
+      *=*) ;;
+      *) ac_optarg=yes ;;
+    esac
+    eval "enable_${ac_feature}='$ac_optarg'" ;;
+
+  -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
+  | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
+  | --exec | --exe | --ex)
+    ac_prev=exec_prefix ;;
+  -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
+  | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
+  | --exec=* | --exe=* | --ex=*)
+    exec_prefix="$ac_optarg" ;;
+
+  -gas | --gas | --ga | --g)
+    # Obsolete; use --with-gas.
+    with_gas=yes ;;
+
+  -help | --help | --hel | --he)
+    # Omit some internal or obsolete options to make the list less imposing.
+    # This message is too long to be a string in the A/UX 3.1 sh.
+    cat << EOF
+Usage: configure [options] [host]
+Options: [defaults in brackets after descriptions]
+Configuration:
+  --cache-file=FILE       cache test results in FILE
+  --help                  print this message
+  --no-create             do not create output files
+  --quiet, --silent       do not print \`checking...' messages
+  --version               print the version of autoconf that created configure
+Directory and file names:
+  --prefix=PREFIX         install architecture-independent files in PREFIX
+                          [$ac_default_prefix]
+  --exec-prefix=EPREFIX   install architecture-dependent files in EPREFIX
+                          [same as prefix]
+  --bindir=DIR            user executables in DIR [EPREFIX/bin]
+  --sbindir=DIR           system admin executables in DIR [EPREFIX/sbin]
+  --libexecdir=DIR        program executables in DIR [EPREFIX/libexec]
+  --datadir=DIR           read-only architecture-independent data in DIR
+                          [PREFIX/share]
+  --sysconfdir=DIR        read-only single-machine data in DIR [PREFIX/etc]
+  --sharedstatedir=DIR    modifiable architecture-independent data in DIR
+                          [PREFIX/com]
+  --localstatedir=DIR     modifiable single-machine data in DIR [PREFIX/var]
+  --libdir=DIR            object code libraries in DIR [EPREFIX/lib]
+  --includedir=DIR        C header files in DIR [PREFIX/include]
+  --oldincludedir=DIR     C header files for non-gcc in DIR [/usr/include]
+  --infodir=DIR           info documentation in DIR [PREFIX/info]
+  --mandir=DIR            man documentation in DIR [PREFIX/man]
+  --srcdir=DIR            find the sources in DIR [configure dir or ..]
+  --program-prefix=PREFIX prepend PREFIX to installed program names
+  --program-suffix=SUFFIX append SUFFIX to installed program names
+  --program-transform-name=PROGRAM
+                          run sed PROGRAM on installed program names
+EOF
+    cat << EOF
+Host type:
+  --build=BUILD           configure for building on BUILD [BUILD=HOST]
+  --host=HOST             configure for HOST [guessed]
+  --target=TARGET         configure for TARGET [TARGET=HOST]
+Features and packages:
+  --disable-FEATURE       do not include FEATURE (same as --enable-FEATURE=no)
+  --enable-FEATURE[=ARG]  include FEATURE [ARG=yes]
+  --with-PACKAGE[=ARG]    use PACKAGE [ARG=yes]
+  --without-PACKAGE       do not use PACKAGE (same as --with-PACKAGE=no)
+  --x-includes=DIR        X include files are in DIR
+  --x-libraries=DIR       X library files are in DIR
+EOF
+    if test -n "$ac_help"; then
+      echo "--enable and --with options recognized:$ac_help"
+    fi
+    exit 0 ;;
+
+  -host | --host | --hos | --ho)
+    ac_prev=host ;;
+  -host=* | --host=* | --hos=* | --ho=*)
+    host="$ac_optarg" ;;
+
+  -includedir | --includedir | --includedi | --included | --include \
+  | --includ | --inclu | --incl | --inc)
+    ac_prev=includedir ;;
+  -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
+  | --includ=* | --inclu=* | --incl=* | --inc=*)
+    includedir="$ac_optarg" ;;
+
+  -infodir | --infodir | --infodi | --infod | --info | --inf)
+    ac_prev=infodir ;;
+  -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
+    infodir="$ac_optarg" ;;
+
+  -libdir | --libdir | --libdi | --libd)
+    ac_prev=libdir ;;
+  -libdir=* | --libdir=* | --libdi=* | --libd=*)
+    libdir="$ac_optarg" ;;
+
+  -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
+  | --libexe | --libex | --libe)
+    ac_prev=libexecdir ;;
+  -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
+  | --libexe=* | --libex=* | --libe=*)
+    libexecdir="$ac_optarg" ;;
+
+  -localstatedir | --localstatedir | --localstatedi | --localstated \
+  | --localstate | --localstat | --localsta | --localst \
+  | --locals | --local | --loca | --loc | --lo)
+    ac_prev=localstatedir ;;
+  -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
+  | --localstate=* | --localstat=* | --localsta=* | --localst=* \
+  | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
+    localstatedir="$ac_optarg" ;;
+
+  -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
+    ac_prev=mandir ;;
+  -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
+    mandir="$ac_optarg" ;;
+
+  -nfp | --nfp | --nf)
+    # Obsolete; use --without-fp.
+    with_fp=no ;;
+
+  -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+  | --no-cr | --no-c)
+    no_create=yes ;;
+
+  -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+  | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
+    no_recursion=yes ;;
+
+  -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
+  | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
+  | --oldin | --oldi | --old | --ol | --o)
+    ac_prev=oldincludedir ;;
+  -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
+  | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
+  | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
+    oldincludedir="$ac_optarg" ;;
+
+  -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
+    ac_prev=prefix ;;
+  -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
+    prefix="$ac_optarg" ;;
+
+  -program-prefix | --program-prefix | --program-prefi | --program-pref \
+  | --program-pre | --program-pr | --program-p)
+    ac_prev=program_prefix ;;
+  -program-prefix=* | --program-prefix=* | --program-prefi=* \
+  | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
+    program_prefix="$ac_optarg" ;;
+
+  -program-suffix | --program-suffix | --program-suffi | --program-suff \
+  | --program-suf | --program-su | --program-s)
+    ac_prev=program_suffix ;;
+  -program-suffix=* | --program-suffix=* | --program-suffi=* \
+  | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
+    program_suffix="$ac_optarg" ;;
+
+  -program-transform-name | --program-transform-name \
+  | --program-transform-nam | --program-transform-na \
+  | --program-transform-n | --program-transform- \
+  | --program-transform | --program-transfor \
+  | --program-transfo | --program-transf \
+  | --program-trans | --program-tran \
+  | --progr-tra | --program-tr | --program-t)
+    ac_prev=program_transform_name ;;
+  -program-transform-name=* | --program-transform-name=* \
+  | --program-transform-nam=* | --program-transform-na=* \
+  | --program-transform-n=* | --program-transform-=* \
+  | --program-transform=* | --program-transfor=* \
+  | --program-transfo=* | --program-transf=* \
+  | --program-trans=* | --program-tran=* \
+  | --progr-tra=* | --program-tr=* | --program-t=*)
+    program_transform_name="$ac_optarg" ;;
+
+  -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+  | -silent | --silent | --silen | --sile | --sil)
+    silent=yes ;;
+
+  -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
+    ac_prev=sbindir ;;
+  -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
+  | --sbi=* | --sb=*)
+    sbindir="$ac_optarg" ;;
+
+  -sharedstatedir | --sharedstatedir | --sharedstatedi \
+  | --sharedstated | --sharedstate | --sharedstat | --sharedsta \
+  | --sharedst | --shareds | --shared | --share | --shar \
+  | --sha | --sh)
+    ac_prev=sharedstatedir ;;
+  -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
+  | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
+  | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
+  | --sha=* | --sh=*)
+    sharedstatedir="$ac_optarg" ;;
+
+  -site | --site | --sit)
+    ac_prev=site ;;
+  -site=* | --site=* | --sit=*)
+    site="$ac_optarg" ;;
+
+  -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
+    ac_prev=srcdir ;;
+  -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
+    srcdir="$ac_optarg" ;;
+
+  -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
+  | --syscon | --sysco | --sysc | --sys | --sy)
+    ac_prev=sysconfdir ;;
+  -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
+  | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
+    sysconfdir="$ac_optarg" ;;
+
+  -target | --target | --targe | --targ | --tar | --ta | --t)
+    ac_prev=target ;;
+  -target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*)
+    target="$ac_optarg" ;;
+
+  -v | -verbose | --verbose | --verbos | --verbo | --verb)
+    verbose=yes ;;
+
+  -version | --version | --versio | --versi | --vers)
+    echo "configure generated by autoconf version 2.12.2"
+    exit 0 ;;
+
+  -with-* | --with-*)
+    ac_package=`echo $ac_option|sed -e 's/-*with-//' -e 's/=.*//'`
+    # Reject names that are not valid shell variable names.
+    if test -n "`echo $ac_package| sed 's/[-_a-zA-Z0-9]//g'`"; then
+      { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
+    fi
+    ac_package=`echo $ac_package| sed 's/-/_/g'`
+    case "$ac_option" in
+      *=*) ;;
+      *) ac_optarg=yes ;;
+    esac
+    eval "with_${ac_package}='$ac_optarg'" ;;
+
+  -without-* | --without-*)
+    ac_package=`echo $ac_option|sed -e 's/-*without-//'`
+    # Reject names that are not valid shell variable names.
+    if test -n "`echo $ac_package| sed 's/[-a-zA-Z0-9_]//g'`"; then
+      { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
+    fi
+    ac_package=`echo $ac_package| sed 's/-/_/g'`
+    eval "with_${ac_package}=no" ;;
+
+  --x)
+    # Obsolete; use --with-x.
+    with_x=yes ;;
+
+  -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \
+  | --x-incl | --x-inc | --x-in | --x-i)
+    ac_prev=x_includes ;;
+  -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
+  | --x-incl=* | --x-inc=* | --x-in=* | --x-i=*)
+    x_includes="$ac_optarg" ;;
+
+  -x-libraries | --x-libraries | --x-librarie | --x-librari \
+  | --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l)
+    ac_prev=x_libraries ;;
+  -x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \
+  | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
+    x_libraries="$ac_optarg" ;;
+
+  -*) { echo "configure: error: $ac_option: invalid option; use --help to show usage" 1>&2; exit 1; }
+    ;;
+
+  *)
+    if test -n "`echo $ac_option| sed 's/[-a-z0-9.]//g'`"; then
+      echo "configure: warning: $ac_option: invalid host type" 1>&2
+    fi
+    if test "x$nonopt" != xNONE; then
+      { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; }
+    fi
+    nonopt="$ac_option"
+    ;;
+
+  esac
+done
+
+if test -n "$ac_prev"; then
+  { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; }
+fi
+
+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+
+# File descriptor usage:
+# 0 standard input
+# 1 file creation
+# 2 errors and warnings
+# 3 some systems may open it to /dev/tty
+# 4 used on the Kubota Titan
+# 6 checking for... messages and results
+# 5 compiler messages saved in config.log
+if test "$silent" = yes; then
+  exec 6>/dev/null
+else
+  exec 6>&1
+fi
+exec 5>./config.log
+
+echo "\
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+" 1>&5
+
+# Strip out --no-create and --no-recursion so they do not pile up.
+# Also quote any args containing shell metacharacters.
+ac_configure_args=
+for ac_arg
+do
+  case "$ac_arg" in
+  -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+  | --no-cr | --no-c) ;;
+  -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+  | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;;
+  *" "*|*"	"*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
+  ac_configure_args="$ac_configure_args '$ac_arg'" ;;
+  *) ac_configure_args="$ac_configure_args $ac_arg" ;;
+  esac
+done
+
+# NLS nuisances.
+# Only set these to C if already set.  These must not be set unconditionally
+# because not all systems understand e.g. LANG=C (notably SCO).
+# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'!
+# Non-C LC_CTYPE values break the ctype check.
+if test "${LANG+set}"   = set; then LANG=C;   export LANG;   fi
+if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi
+if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
+if test "${LC_CTYPE+set}"    = set; then LC_CTYPE=C;    export LC_CTYPE;    fi
+
+# confdefs.h avoids OS command line length limits that DEFS can exceed.
+rm -rf conftest* confdefs.h
+# AIX cpp loses on an empty file, so make sure it contains at least a newline.
+echo > confdefs.h
+
+# A filename unique to this package, relative to the directory that
+# configure is in, which we can look for to find out if srcdir is correct.
+ac_unique_file=Makefile.in
+
+# Find the source files, if location was not specified.
+if test -z "$srcdir"; then
+  ac_srcdir_defaulted=yes
+  # Try the directory containing this script, then its parent.
+  ac_prog=$0
+  ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
+  test "x$ac_confdir" = "x$ac_prog" && ac_confdir=.
+  srcdir=$ac_confdir
+  if test ! -r $srcdir/$ac_unique_file; then
+    srcdir=..
+  fi
+else
+  ac_srcdir_defaulted=no
+fi
+if test ! -r $srcdir/$ac_unique_file; then
+  if test "$ac_srcdir_defaulted" = yes; then
+    { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; }
+  else
+    { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
+  fi
+fi
+srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
+
+# Prefer explicitly selected file to automatically selected ones.
+if test -z "$CONFIG_SITE"; then
+  if test "x$prefix" != xNONE; then
+    CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
+  else
+    CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+  fi
+fi
+for ac_site_file in $CONFIG_SITE; do
+  if test -r "$ac_site_file"; then
+    echo "loading site script $ac_site_file"
+    . "$ac_site_file"
+  fi
+done
+
+if test -r "$cache_file"; then
+  echo "loading cache $cache_file"
+  . $cache_file
+else
+  echo "creating cache $cache_file"
+  > $cache_file
+fi
+
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+ac_exeext=
+ac_objext=o
+if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
+  # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu.
+  if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
+    ac_n= ac_c='
+' ac_t='	'
+  else
+    ac_n=-n ac_c= ac_t=
+  fi
+else
+  ac_n= ac_c='\c' ac_t=
+fi
+
+
+
+echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
+echo "configure:691: checking how to run the C preprocessor" >&5
+# On Suns, sometimes $CPP names a directory.
+if test -n "$CPP" && test -d "$CPP"; then
+  CPP=
+fi
+if test -z "$CPP"; then
+if eval "test \"`echo '$''{'ac_cv_prog_CPP'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+    # This must be in double quotes, not single quotes, because CPP may get
+  # substituted into the Makefile and "${CC-cc}" will confuse make.
+  CPP="${CC-cc} -E"
+  # On the NeXT, cc -E runs the code through the compiler's parser,
+  # not just through cpp.
+  cat > conftest.$ac_ext <<EOF
+#line 706 "configure"
+#include "confdefs.h"
+#include <assert.h>
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:712: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  :
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  CPP="${CC-cc} -E -traditional-cpp"
+  cat > conftest.$ac_ext <<EOF
+#line 723 "configure"
+#include "confdefs.h"
+#include <assert.h>
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:729: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  :
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  CPP="${CC-cc} -nologo -E"
+  cat > conftest.$ac_ext <<EOF
+#line 740 "configure"
+#include "confdefs.h"
+#include <assert.h>
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:746: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  :
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  CPP=/lib/cpp
+fi
+rm -f conftest*
+fi
+rm -f conftest*
+fi
+rm -f conftest*
+  ac_cv_prog_CPP="$CPP"
+fi
+  CPP="$ac_cv_prog_CPP"
+else
+  ac_cv_prog_CPP="$CPP"
+fi
+echo "$ac_t""$CPP" 1>&6
+
+echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6
+echo "configure:771: checking whether ${MAKE-make} sets \${MAKE}" >&5
+set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'`
+if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftestmake <<\EOF
+all:
+	@echo 'ac_maketemp="${MAKE}"'
+EOF
+# GNU make sometimes prints "make[1]: Entering...", which would confuse us.
+eval `${MAKE-make} -f conftestmake 2>/dev/null | grep temp=`
+if test -n "$ac_maketemp"; then
+  eval ac_cv_prog_make_${ac_make}_set=yes
+else
+  eval ac_cv_prog_make_${ac_make}_set=no
+fi
+rm -f conftestmake
+fi
+if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+  SET_MAKE=
+else
+  echo "$ac_t""no" 1>&6
+  SET_MAKE="MAKE=${MAKE-make}"
+fi
+
+echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
+echo "configure:798: checking for POSIXized ISC" >&5
+if test -d /etc/conf/kconfig.d &&
+  grep _POSIX_VERSION /usr/include/sys/unistd.h >/dev/null 2>&1
+then
+  echo "$ac_t""yes" 1>&6
+  ISC=yes # If later tests want to check for ISC.
+  cat >> confdefs.h <<\EOF
+#define _POSIX_SOURCE 1
+EOF
+
+  if test "$GCC" = yes; then
+    CC="$CC -posix"
+  else
+    CC="$CC -Xp"
+  fi
+else
+  echo "$ac_t""no" 1>&6
+  ISC=
+fi
+
+echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
+echo "configure:819: checking for ANSI C header files" >&5
+if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 824 "configure"
+#include "confdefs.h"
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <float.h>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:832: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  ac_cv_header_stdc=yes
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+if test $ac_cv_header_stdc = yes; then
+  # SunOS 4.x string.h does not declare mem*, contrary to ANSI.
+cat > conftest.$ac_ext <<EOF
+#line 849 "configure"
+#include "confdefs.h"
+#include <string.h>
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  egrep "memchr" >/dev/null 2>&1; then
+  :
+else
+  rm -rf conftest*
+  ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+  # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
+cat > conftest.$ac_ext <<EOF
+#line 867 "configure"
+#include "confdefs.h"
+#include <stdlib.h>
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  egrep "free" >/dev/null 2>&1; then
+  :
+else
+  rm -rf conftest*
+  ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+  # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
+if test "$cross_compiling" = yes; then
+  :
+else
+  cat > conftest.$ac_ext <<EOF
+#line 888 "configure"
+#include "confdefs.h"
+#include <ctype.h>
+#define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
+#define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c))
+#define XOR(e, f) (((e) && !(f)) || (!(e) && (f)))
+int main () { int i; for (i = 0; i < 256; i++)
+if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2);
+exit (0); }
+
+EOF
+if { (eval echo configure:899: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+then
+  :
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -fr conftest*
+  ac_cv_header_stdc=no
+fi
+rm -fr conftest*
+fi
+
+fi
+fi
+
+echo "$ac_t""$ac_cv_header_stdc" 1>&6
+if test $ac_cv_header_stdc = yes; then
+  cat >> confdefs.h <<\EOF
+#define STDC_HEADERS 1
+EOF
+
+fi
+
+echo $ac_n "checking for working const""... $ac_c" 1>&6
+echo "configure:923: checking for working const" >&5
+if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 928 "configure"
+#include "confdefs.h"
+
+int main() {
+
+/* Ultrix mips cc rejects this.  */
+typedef int charset[2]; const charset x;
+/* SunOS 4.1.1 cc rejects this.  */
+char const *const *ccp;
+char **p;
+/* NEC SVR4.0.2 mips cc rejects this.  */
+struct point {int x, y;};
+static struct point const zero = {0,0};
+/* AIX XL C 1.02.0.0 rejects this.
+   It does not let you subtract one const X* pointer from another in an arm
+   of an if-expression whose if-part is not a constant expression */
+const char *g = "string";
+ccp = &g + (g ? g-g : 0);
+/* HPUX 7.0 cc rejects these. */
+++ccp;
+p = (char**) ccp;
+ccp = (char const *const *) p;
+{ /* SCO 3.2v4 cc rejects this.  */
+  char *t;
+  char const *s = 0 ? (char *) 0 : (char const *) 0;
+
+  *t++ = 0;
+}
+{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this.  */
+  int x[] = {25, 17};
+  const int *foo = &x[0];
+  ++foo;
+}
+{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
+  typedef const int *iptr;
+  iptr p = 0;
+  ++p;
+}
+{ /* AIX XL C 1.02.0.0 rejects this saying
+     "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */
+  struct s { int j; const int *ap[3]; };
+  struct s *b; b->j = 5;
+}
+{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
+  const int foo = 10;
+}
+
+; return 0; }
+EOF
+if { (eval echo configure:977: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+  rm -rf conftest*
+  ac_cv_c_const=yes
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  ac_cv_c_const=no
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$ac_cv_c_const" 1>&6
+if test $ac_cv_c_const = no; then
+  cat >> confdefs.h <<\EOF
+#define const 
+EOF
+
+fi
+
+echo $ac_n "checking for inline""... $ac_c" 1>&6
+echo "configure:998: checking for inline" >&5
+if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  ac_cv_c_inline=no
+for ac_kw in inline __inline__ __inline; do
+  cat > conftest.$ac_ext <<EOF
+#line 1005 "configure"
+#include "confdefs.h"
+
+int main() {
+} $ac_kw foo() {
+; return 0; }
+EOF
+if { (eval echo configure:1012: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+  rm -rf conftest*
+  ac_cv_c_inline=$ac_kw; break
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+fi
+rm -f conftest*
+done
+
+fi
+
+echo "$ac_t""$ac_cv_c_inline" 1>&6
+case "$ac_cv_c_inline" in
+  inline | yes) ;;
+  no) cat >> confdefs.h <<\EOF
+#define inline 
+EOF
+ ;;
+  *)  cat >> confdefs.h <<EOF
+#define inline $ac_cv_c_inline
+EOF
+ ;;
+esac
+
+echo $ac_n "checking for off_t""... $ac_c" 1>&6
+echo "configure:1038: checking for off_t" >&5
+if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1043 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+#if STDC_HEADERS
+#include <stdlib.h>
+#include <stddef.h>
+#endif
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  egrep "off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
+  rm -rf conftest*
+  ac_cv_type_off_t=yes
+else
+  rm -rf conftest*
+  ac_cv_type_off_t=no
+fi
+rm -f conftest*
+
+fi
+echo "$ac_t""$ac_cv_type_off_t" 1>&6
+if test $ac_cv_type_off_t = no; then
+  cat >> confdefs.h <<\EOF
+#define off_t long
+EOF
+
+fi
+
+echo $ac_n "checking for size_t""... $ac_c" 1>&6
+echo "configure:1071: checking for size_t" >&5
+if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1076 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+#if STDC_HEADERS
+#include <stdlib.h>
+#include <stddef.h>
+#endif
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  egrep "size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
+  rm -rf conftest*
+  ac_cv_type_size_t=yes
+else
+  rm -rf conftest*
+  ac_cv_type_size_t=no
+fi
+rm -f conftest*
+
+fi
+echo "$ac_t""$ac_cv_type_size_t" 1>&6
+if test $ac_cv_type_size_t = no; then
+  cat >> confdefs.h <<\EOF
+#define size_t unsigned
+EOF
+
+fi
+
+# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
+# for constant arguments.  Useless!
+echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
+echo "configure:1106: checking for working alloca.h" >&5
+if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1111 "configure"
+#include "confdefs.h"
+#include <alloca.h>
+int main() {
+char *p = alloca(2 * sizeof(int));
+; return 0; }
+EOF
+if { (eval echo configure:1118: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  ac_cv_header_alloca_h=yes
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  ac_cv_header_alloca_h=no
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
+if test $ac_cv_header_alloca_h = yes; then
+  cat >> confdefs.h <<\EOF
+#define HAVE_ALLOCA_H 1
+EOF
+
+fi
+
+echo $ac_n "checking for alloca""... $ac_c" 1>&6
+echo "configure:1139: checking for alloca" >&5
+if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1144 "configure"
+#include "confdefs.h"
+
+#ifdef __GNUC__
+# define alloca __builtin_alloca
+#else
+# ifdef _MSC_VER
+#  include <malloc.h>
+#  define alloca _alloca
+# else
+#  if HAVE_ALLOCA_H
+#   include <alloca.h>
+#  else
+#   ifdef _AIX
+ #pragma alloca
+#   else
+#    ifndef alloca /* predefined by HP cc +Olibcalls */
+char *alloca ();
+#    endif
+#   endif
+#  endif
+# endif
+#endif
+
+int main() {
+char *p = (char *) alloca(1);
+; return 0; }
+EOF
+if { (eval echo configure:1172: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  ac_cv_func_alloca_works=yes
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  ac_cv_func_alloca_works=no
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
+if test $ac_cv_func_alloca_works = yes; then
+  cat >> confdefs.h <<\EOF
+#define HAVE_ALLOCA 1
+EOF
+
+fi
+
+if test $ac_cv_func_alloca_works = no; then
+  # The SVR3 libPW and SVR4 libucb both contain incompatible functions
+  # that cause trouble.  Some versions do not even contain alloca or
+  # contain a buggy version.  If you still want to use their alloca,
+  # use ar to extract alloca.o from them instead of compiling alloca.c.
+  ALLOCA=alloca.${ac_objext}
+  cat >> confdefs.h <<\EOF
+#define C_ALLOCA 1
+EOF
+
+
+echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
+echo "configure:1204: checking whether alloca needs Cray hooks" >&5
+if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1209 "configure"
+#include "confdefs.h"
+#if defined(CRAY) && ! defined(CRAY2)
+webecray
+#else
+wenotbecray
+#endif
+
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  egrep "webecray" >/dev/null 2>&1; then
+  rm -rf conftest*
+  ac_cv_os_cray=yes
+else
+  rm -rf conftest*
+  ac_cv_os_cray=no
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$ac_cv_os_cray" 1>&6
+if test $ac_cv_os_cray = yes; then
+for ac_func in _getb67 GETB67 getb67; do
+  echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
+echo "configure:1234: checking for $ac_func" >&5
+if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1239 "configure"
+#include "confdefs.h"
+/* System header to define __stub macros and hopefully few prototypes,
+    which can conflict with char $ac_func(); below.  */
+#include <assert.h>
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char $ac_func();
+
+int main() {
+
+/* The GNU C library defines this for functions which it implements
+    to always fail with ENOSYS.  Some functions are actually named
+    something starting with __ and the normal name is an alias.  */
+#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
+choke me
+#else
+$ac_func();
+#endif
+
+; return 0; }
+EOF
+if { (eval echo configure:1262: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=no"
+fi
+rm -f conftest*
+fi
+
+if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+  cat >> confdefs.h <<EOF
+#define CRAY_STACKSEG_END $ac_func
+EOF
+
+  break
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+done
+fi
+
+echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
+echo "configure:1289: checking stack direction for C alloca" >&5
+if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  if test "$cross_compiling" = yes; then
+  ac_cv_c_stack_direction=0
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1297 "configure"
+#include "confdefs.h"
+find_stack_direction ()
+{
+  static char *addr = 0;
+  auto char dummy;
+  if (addr == 0)
+    {
+      addr = &dummy;
+      return find_stack_direction ();
+    }
+  else
+    return (&dummy > addr) ? 1 : -1;
+}
+main ()
+{
+  exit (find_stack_direction() < 0);
+}
+EOF
+if { (eval echo configure:1316: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+then
+  ac_cv_c_stack_direction=1
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -fr conftest*
+  ac_cv_c_stack_direction=-1
+fi
+rm -fr conftest*
+fi
+
+fi
+
+echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
+cat >> confdefs.h <<EOF
+#define STACK_DIRECTION $ac_cv_c_stack_direction
+EOF
+
+fi
+
+for ac_hdr in unistd.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:1341: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1346 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1351: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=yes"
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+for ac_func in getpagesize
+do
+echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
+echo "configure:1380: checking for $ac_func" >&5
+if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1385 "configure"
+#include "confdefs.h"
+/* System header to define __stub macros and hopefully few prototypes,
+    which can conflict with char $ac_func(); below.  */
+#include <assert.h>
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char $ac_func();
+
+int main() {
+
+/* The GNU C library defines this for functions which it implements
+    to always fail with ENOSYS.  Some functions are actually named
+    something starting with __ and the normal name is an alias.  */
+#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
+choke me
+#else
+$ac_func();
+#endif
+
+; return 0; }
+EOF
+if { (eval echo configure:1408: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=no"
+fi
+rm -f conftest*
+fi
+
+if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_func 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+echo $ac_n "checking for working mmap""... $ac_c" 1>&6
+echo "configure:1433: checking for working mmap" >&5
+if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  if test "$cross_compiling" = yes; then
+  ac_cv_func_mmap_fixed_mapped=no
+else
+  cat > conftest.$ac_ext <<EOF
+#line 1441 "configure"
+#include "confdefs.h"
+
+/* Thanks to Mike Haertel and Jim Avera for this test.
+   Here is a matrix of mmap possibilities:
+	mmap private not fixed
+	mmap private fixed at somewhere currently unmapped
+	mmap private fixed at somewhere already mapped
+	mmap shared not fixed
+	mmap shared fixed at somewhere currently unmapped
+	mmap shared fixed at somewhere already mapped
+   For private mappings, we should verify that changes cannot be read()
+   back from the file, nor mmap's back from the file at a different
+   address.  (There have been systems where private was not correctly
+   implemented like the infamous i386 svr4.0, and systems where the
+   VM page cache was not coherent with the filesystem buffer cache
+   like early versions of FreeBSD and possibly contemporary NetBSD.)
+   For shared mappings, we should conversely verify that changes get
+   propogated back to all the places they're supposed to be.
+
+   Grep wants private fixed already mapped.
+   The main things grep needs to know about mmap are:
+   * does it exist and is it safe to write into the mmap'd area
+   * how to use it (BSD variants)  */
+#include <sys/types.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+
+/* This mess was copied from the GNU getpagesize.h.  */
+#ifndef HAVE_GETPAGESIZE
+# ifdef HAVE_UNISTD_H
+#  include <unistd.h>
+# endif
+
+/* Assume that all systems that can run configure have sys/param.h.  */
+# ifndef HAVE_SYS_PARAM_H
+#  define HAVE_SYS_PARAM_H 1
+# endif
+
+# ifdef _SC_PAGESIZE
+#  define getpagesize() sysconf(_SC_PAGESIZE)
+# else /* no _SC_PAGESIZE */
+#  ifdef HAVE_SYS_PARAM_H
+#   include <sys/param.h>
+#   ifdef EXEC_PAGESIZE
+#    define getpagesize() EXEC_PAGESIZE
+#   else /* no EXEC_PAGESIZE */
+#    ifdef NBPG
+#     define getpagesize() NBPG * CLSIZE
+#     ifndef CLSIZE
+#      define CLSIZE 1
+#     endif /* no CLSIZE */
+#    else /* no NBPG */
+#     ifdef NBPC
+#      define getpagesize() NBPC
+#     else /* no NBPC */
+#      ifdef PAGESIZE
+#       define getpagesize() PAGESIZE
+#      endif /* PAGESIZE */
+#     endif /* no NBPC */
+#    endif /* no NBPG */
+#   endif /* no EXEC_PAGESIZE */
+#  else /* no HAVE_SYS_PARAM_H */
+#   define getpagesize() 8192	/* punt totally */
+#  endif /* no HAVE_SYS_PARAM_H */
+# endif /* no _SC_PAGESIZE */
+
+#endif /* no HAVE_GETPAGESIZE */
+
+#ifdef __cplusplus
+extern "C" { void *malloc(unsigned); }
+#else
+char *malloc();
+#endif
+
+int
+main()
+{
+	char *data, *data2, *data3;
+	int i, pagesize;
+	int fd;
+
+	pagesize = getpagesize();
+
+	/*
+	 * First, make a file with some known garbage in it.
+	 */
+	data = malloc(pagesize);
+	if (!data)
+		exit(1);
+	for (i = 0; i < pagesize; ++i)
+		*(data + i) = rand();
+	umask(0);
+	fd = creat("conftestmmap", 0600);
+	if (fd < 0)
+		exit(1);
+	if (write(fd, data, pagesize) != pagesize)
+		exit(1);
+	close(fd);
+
+	/*
+	 * Next, try to mmap the file at a fixed address which
+	 * already has something else allocated at it.  If we can,
+	 * also make sure that we see the same garbage.
+	 */
+	fd = open("conftestmmap", O_RDWR);
+	if (fd < 0)
+		exit(1);
+	data2 = malloc(2 * pagesize);
+	if (!data2)
+		exit(1);
+	data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
+	if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
+	    MAP_PRIVATE | MAP_FIXED, fd, 0L))
+		exit(1);
+	for (i = 0; i < pagesize; ++i)
+		if (*(data + i) != *(data2 + i))
+			exit(1);
+
+	/*
+	 * Finally, make sure that changes to the mapped area
+	 * do not percolate back to the file as seen by read().
+	 * (This is a bug on some variants of i386 svr4.0.)
+	 */
+	for (i = 0; i < pagesize; ++i)
+		*(data2 + i) = *(data2 + i) + 1;
+	data3 = malloc(pagesize);
+	if (!data3)
+		exit(1);
+	if (read(fd, data3, pagesize) != pagesize)
+		exit(1);
+	for (i = 0; i < pagesize; ++i)
+		if (*(data + i) != *(data3 + i))
+			exit(1);
+	close(fd);
+	unlink("conftestmmap");
+	exit(0);
+}
+
+EOF
+if { (eval echo configure:1581: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+then
+  ac_cv_func_mmap_fixed_mapped=yes
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -fr conftest*
+  ac_cv_func_mmap_fixed_mapped=no
+fi
+rm -fr conftest*
+fi
+
+fi
+
+echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
+if test $ac_cv_func_mmap_fixed_mapped = yes; then
+  cat >> confdefs.h <<\EOF
+#define HAVE_MMAP 1
+EOF
+
+fi
+
+
+# autoconf.info says this should be called right after AC_INIT.
+
+
+ac_aux_dir=
+for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
+  if test -f $ac_dir/install-sh; then
+    ac_aux_dir=$ac_dir
+    ac_install_sh="$ac_aux_dir/install-sh -c"
+    break
+  elif test -f $ac_dir/install.sh; then
+    ac_aux_dir=$ac_dir
+    ac_install_sh="$ac_aux_dir/install.sh -c"
+    break
+  fi
+done
+if test -z "$ac_aux_dir"; then
+  { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
+fi
+ac_config_guess=$ac_aux_dir/config.guess
+ac_config_sub=$ac_aux_dir/config.sub
+ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
+
+
+# Do some error checking and defaulting for the host and target type.
+# The inputs are:
+#    configure --host=HOST --target=TARGET --build=BUILD NONOPT
+#
+# The rules are:
+# 1. You are not allowed to specify --host, --target, and nonopt at the
+#    same time.
+# 2. Host defaults to nonopt.
+# 3. If nonopt is not specified, then host defaults to the current host,
+#    as determined by config.guess.
+# 4. Target and build default to nonopt.
+# 5. If nonopt is not specified, then target and build default to host.
+
+# The aliases save the names the user supplied, while $host etc.
+# will get canonicalized.
+case $host---$target---$nonopt in
+NONE---*---* | *---NONE---* | *---*---NONE) ;;
+*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
+esac
+
+
+# Make sure we can run config.sub.
+if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
+else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
+fi
+
+echo $ac_n "checking host system type""... $ac_c" 1>&6
+echo "configure:1654: checking host system type" >&5
+
+host_alias=$host
+case "$host_alias" in
+NONE)
+  case $nonopt in
+  NONE)
+    if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
+    else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
+    fi ;;
+  *) host_alias=$nonopt ;;
+  esac ;;
+esac
+
+host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
+host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
+host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
+host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
+echo "$ac_t""$host" 1>&6
+
+echo $ac_n "checking target system type""... $ac_c" 1>&6
+echo "configure:1675: checking target system type" >&5
+
+target_alias=$target
+case "$target_alias" in
+NONE)
+  case $nonopt in
+  NONE) target_alias=$host_alias ;;
+  *) target_alias=$nonopt ;;
+  esac ;;
+esac
+
+target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
+target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
+target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
+target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
+echo "$ac_t""$target" 1>&6
+
+echo $ac_n "checking build system type""... $ac_c" 1>&6
+echo "configure:1693: checking build system type" >&5
+
+build_alias=$build
+case "$build_alias" in
+NONE)
+  case $nonopt in
+  NONE) build_alias=$host_alias ;;
+  *) build_alias=$nonopt ;;
+  esac ;;
+esac
+
+build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
+build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
+build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
+build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
+echo "$ac_t""$build" 1>&6
+
+test "$host_alias" != "$target_alias" &&
+  test "$program_prefix$program_suffix$program_transform_name" = \
+    NONENONEs,x,x, &&
+  program_prefix=${target_alias}-
+
+if test "$program_transform_name" = s,x,x,; then
+  program_transform_name=
+else
+  # Double any \ or $.  echo might interpret backslashes.
+  cat <<\EOF_SED > conftestsed
+s,\\,\\\\,g; s,\$,$$,g
+EOF_SED
+  program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
+  rm -f conftestsed
+fi
+test "$program_prefix" != NONE &&
+  program_transform_name="s,^,${program_prefix},; $program_transform_name"
+# Use a double $ so make ignores it.
+test "$program_suffix" != NONE &&
+  program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
+
+# sed with no file args requires a program.
+test "$program_transform_name" = "" && program_transform_name="s,x,x,"
+
+# Extract the first word of "gcc", so it can be a program name with args.
+set dummy gcc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1737: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      ac_cv_prog_CC="gcc"
+      break
+    fi
+  done
+  IFS="$ac_save_ifs"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+  echo "$ac_t""$CC" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+if test -z "$CC"; then
+  # Extract the first word of "cc", so it can be a program name with args.
+set dummy cc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1766: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
+  ac_prog_rejected=no
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
+        ac_prog_rejected=yes
+	continue
+      fi
+      ac_cv_prog_CC="cc"
+      break
+    fi
+  done
+  IFS="$ac_save_ifs"
+if test $ac_prog_rejected = yes; then
+  # We found a bogon in the path, so make sure we never use it.
+  set dummy $ac_cv_prog_CC
+  shift
+  if test $# -gt 0; then
+    # We chose a different compiler from the bogus one.
+    # However, it has the same basename, so the bogon will be chosen
+    # first if we set CC to just the basename; use the full file name.
+    shift
+    set dummy "$ac_dir/$ac_word" "$@"
+    shift
+    ac_cv_prog_CC="$@"
+  fi
+fi
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+  echo "$ac_t""$CC" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+  if test -z "$CC"; then
+    case "`uname -s`" in
+    *win32* | *WIN32*)
+      # Extract the first word of "cl", so it can be a program name with args.
+set dummy cl; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1816: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      ac_cv_prog_CC="cl"
+      break
+    fi
+  done
+  IFS="$ac_save_ifs"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+  echo "$ac_t""$CC" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+ ;;
+    esac
+  fi
+  test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
+fi
+
+echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
+echo "configure:1847: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+cat > conftest.$ac_ext <<EOF
+#line 1857 "configure"
+#include "confdefs.h"
+main(){return(0);}
+EOF
+if { (eval echo configure:1861: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  ac_cv_prog_cc_works=yes
+  # If we can't run a trivial program, we are probably using a cross compiler.
+  if (./conftest; exit) 2>/dev/null; then
+    ac_cv_prog_cc_cross=no
+  else
+    ac_cv_prog_cc_cross=yes
+  fi
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  ac_cv_prog_cc_works=no
+fi
+rm -fr conftest*
+
+echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
+if test $ac_cv_prog_cc_works = no; then
+  { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
+fi
+echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
+echo "configure:1881: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
+cross_compiling=$ac_cv_prog_cc_cross
+
+echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
+echo "configure:1886: checking whether we are using GNU C" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.c <<EOF
+#ifdef __GNUC__
+  yes;
+#endif
+EOF
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1895: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+  ac_cv_prog_gcc=yes
+else
+  ac_cv_prog_gcc=no
+fi
+fi
+
+echo "$ac_t""$ac_cv_prog_gcc" 1>&6
+
+if test $ac_cv_prog_gcc = yes; then
+  GCC=yes
+else
+  GCC=
+fi
+
+ac_test_CFLAGS="${CFLAGS+set}"
+ac_save_CFLAGS="$CFLAGS"
+CFLAGS=
+echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
+echo "configure:1914: checking whether ${CC-cc} accepts -g" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  echo 'void f(){}' > conftest.c
+if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
+  ac_cv_prog_cc_g=yes
+else
+  ac_cv_prog_cc_g=no
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
+if test "$ac_test_CFLAGS" = set; then
+  CFLAGS="$ac_save_CFLAGS"
+elif test $ac_cv_prog_cc_g = yes; then
+  if test "$GCC" = yes; then
+    CFLAGS="-g -O2"
+  else
+    CFLAGS="-g"
+  fi
+else
+  if test "$GCC" = yes; then
+    CFLAGS="-O2"
+  else
+    CFLAGS=
+  fi
+fi
+
+# Find a good install program.  We prefer a C program (faster),
+# so one script is as good as another.  But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# ./install, which can be erroneously created by make from ./install.sh.
+echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
+echo "configure:1957: checking for a BSD compatible install" >&5
+if test -z "$INSTALL"; then
+if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+    IFS="${IFS= 	}"; ac_save_IFS="$IFS"; IFS=":"
+  for ac_dir in $PATH; do
+    # Account for people who put trailing slashes in PATH elements.
+    case "$ac_dir/" in
+    /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
+    *)
+      # OSF1 and SCO ODT 3.0 have their own names for install.
+      # Don't use installbsd from OSF since it installs stuff as root
+      # by default.
+      for ac_prog in ginstall scoinst install; do
+        if test -f $ac_dir/$ac_prog; then
+	  if test $ac_prog = install &&
+            grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
+	    # AIX install.  It has an incompatible calling convention.
+	    :
+	  else
+	    ac_cv_path_install="$ac_dir/$ac_prog -c"
+	    break 2
+	  fi
+	fi
+      done
+      ;;
+    esac
+  done
+  IFS="$ac_save_IFS"
+
+fi
+  if test "${ac_cv_path_install+set}" = set; then
+    INSTALL="$ac_cv_path_install"
+  else
+    # As a last resort, use the slow shell script.  We don't cache a
+    # path for INSTALL within a source directory, because that will
+    # break other packages using the cache if that directory is
+    # removed, or if the path is relative.
+    INSTALL="$ac_install_sh"
+  fi
+fi
+echo "$ac_t""$INSTALL" 1>&6
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
+
+# Put a plausible default for CC_FOR_BUILD in Makefile.
+if test "x$cross_compiling" = "xno"; then
+  CC_FOR_BUILD='$(CC)'
+else
+  CC_FOR_BUILD=gcc
+fi
+
+
+
+
+AR=${AR-ar}
+
+# Extract the first word of "ranlib", so it can be a program name with args.
+set dummy ranlib; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:2023: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  if test -n "$RANLIB"; then
+  ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
+else
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      ac_cv_prog_RANLIB="ranlib"
+      break
+    fi
+  done
+  IFS="$ac_save_ifs"
+  test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
+fi
+fi
+RANLIB="$ac_cv_prog_RANLIB"
+if test -n "$RANLIB"; then
+  echo "$ac_t""$RANLIB" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+
+ALL_LINGUAS=
+                              
+   for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
+unistd.h values.h sys/param.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:2057: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2062 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:2067: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=yes"
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+   for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
+__argz_count __argz_stringify __argz_next
+do
+echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
+echo "configure:2097: checking for $ac_func" >&5
+if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2102 "configure"
+#include "confdefs.h"
+/* System header to define __stub macros and hopefully few prototypes,
+    which can conflict with char $ac_func(); below.  */
+#include <assert.h>
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char $ac_func();
+
+int main() {
+
+/* The GNU C library defines this for functions which it implements
+    to always fail with ENOSYS.  Some functions are actually named
+    something starting with __ and the normal name is an alias.  */
+#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
+choke me
+#else
+$ac_func();
+#endif
+
+; return 0; }
+EOF
+if { (eval echo configure:2125: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=no"
+fi
+rm -f conftest*
+fi
+
+if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_func 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+
+   if test "${ac_cv_func_stpcpy+set}" != "set"; then
+     for ac_func in stpcpy
+do
+echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
+echo "configure:2154: checking for $ac_func" >&5
+if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2159 "configure"
+#include "confdefs.h"
+/* System header to define __stub macros and hopefully few prototypes,
+    which can conflict with char $ac_func(); below.  */
+#include <assert.h>
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char $ac_func();
+
+int main() {
+
+/* The GNU C library defines this for functions which it implements
+    to always fail with ENOSYS.  Some functions are actually named
+    something starting with __ and the normal name is an alias.  */
+#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
+choke me
+#else
+$ac_func();
+#endif
+
+; return 0; }
+EOF
+if { (eval echo configure:2182: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=no"
+fi
+rm -f conftest*
+fi
+
+if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_func 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+   fi
+   if test "${ac_cv_func_stpcpy}" = "yes"; then
+     cat >> confdefs.h <<\EOF
+#define HAVE_STPCPY 1
+EOF
+
+   fi
+
+   if test $ac_cv_header_locale_h = yes; then
+    echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
+echo "configure:2216: checking for LC_MESSAGES" >&5
+if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2221 "configure"
+#include "confdefs.h"
+#include <locale.h>
+int main() {
+return LC_MESSAGES
+; return 0; }
+EOF
+if { (eval echo configure:2228: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  am_cv_val_LC_MESSAGES=yes
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  am_cv_val_LC_MESSAGES=no
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
+    if test $am_cv_val_LC_MESSAGES = yes; then
+      cat >> confdefs.h <<\EOF
+#define HAVE_LC_MESSAGES 1
+EOF
+
+    fi
+  fi
+   echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
+echo "configure:2249: checking whether NLS is requested" >&5
+        # Check whether --enable-nls or --disable-nls was given.
+if test "${enable_nls+set}" = set; then
+  enableval="$enable_nls"
+  USE_NLS=$enableval
+else
+  USE_NLS=yes
+fi
+
+    echo "$ac_t""$USE_NLS" 1>&6
+    
+
+    USE_INCLUDED_LIBINTL=no
+
+        if test "$USE_NLS" = "yes"; then
+      cat >> confdefs.h <<\EOF
+#define ENABLE_NLS 1
+EOF
+
+      echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
+echo "configure:2269: checking whether included gettext is requested" >&5
+      # Check whether --with-included-gettext or --without-included-gettext was given.
+if test "${with_included_gettext+set}" = set; then
+  withval="$with_included_gettext"
+  nls_cv_force_use_gnu_gettext=$withval
+else
+  nls_cv_force_use_gnu_gettext=no
+fi
+
+      echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
+
+      nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
+      if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
+                        		nls_cv_header_intl=
+	nls_cv_header_libgt=
+	CATOBJEXT=NONE
+
+	ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
+echo "configure:2288: checking for libintl.h" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2293 "configure"
+#include "confdefs.h"
+#include <libintl.h>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:2298: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=yes"
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+  echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
+echo "configure:2315: checking for gettext in libc" >&5
+if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2320 "configure"
+#include "confdefs.h"
+#include <libintl.h>
+int main() {
+return (int) gettext ("")
+; return 0; }
+EOF
+if { (eval echo configure:2327: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  gt_cv_func_gettext_libc=yes
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  gt_cv_func_gettext_libc=no
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6
+
+	   if test "$gt_cv_func_gettext_libc" != "yes"; then
+	     echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6
+echo "configure:2343: checking for bindtextdomain in -lintl" >&5
+ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'`
+if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  ac_save_LIBS="$LIBS"
+LIBS="-lintl  $LIBS"
+cat > conftest.$ac_ext <<EOF
+#line 2351 "configure"
+#include "confdefs.h"
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char bindtextdomain();
+
+int main() {
+bindtextdomain()
+; return 0; }
+EOF
+if { (eval echo configure:2362: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_lib_$ac_lib_var=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_lib_$ac_lib_var=no"
+fi
+rm -f conftest*
+LIBS="$ac_save_LIBS"
+
+fi
+if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+  echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6
+echo "configure:2378: checking for gettext in libintl" >&5
+if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2383 "configure"
+#include "confdefs.h"
+
+int main() {
+return (int) gettext ("")
+; return 0; }
+EOF
+if { (eval echo configure:2390: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  gt_cv_func_gettext_libintl=yes
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  gt_cv_func_gettext_libintl=no
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$gt_cv_func_gettext_libintl" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+	   fi
+
+	   if test "$gt_cv_func_gettext_libc" = "yes" \
+	      || test "$gt_cv_func_gettext_libintl" = "yes"; then
+	      cat >> confdefs.h <<\EOF
+#define HAVE_GETTEXT 1
+EOF
+
+	      # Extract the first word of "msgfmt", so it can be a program name with args.
+set dummy msgfmt; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:2418: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  case "$MSGFMT" in
+  /*)
+  ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
+  ;;
+  *)
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
+	ac_cv_path_MSGFMT="$ac_dir/$ac_word"
+	break
+      fi
+    fi
+  done
+  IFS="$ac_save_ifs"
+  test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="no"
+  ;;
+esac
+fi
+MSGFMT="$ac_cv_path_MSGFMT"
+if test -n "$MSGFMT"; then
+  echo "$ac_t""$MSGFMT" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+	      if test "$MSGFMT" != "no"; then
+		for ac_func in dcgettext
+do
+echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
+echo "configure:2452: checking for $ac_func" >&5
+if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2457 "configure"
+#include "confdefs.h"
+/* System header to define __stub macros and hopefully few prototypes,
+    which can conflict with char $ac_func(); below.  */
+#include <assert.h>
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char $ac_func();
+
+int main() {
+
+/* The GNU C library defines this for functions which it implements
+    to always fail with ENOSYS.  Some functions are actually named
+    something starting with __ and the normal name is an alias.  */
+#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
+choke me
+#else
+$ac_func();
+#endif
+
+; return 0; }
+EOF
+if { (eval echo configure:2480: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=no"
+fi
+rm -f conftest*
+fi
+
+if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_func 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+		# Extract the first word of "gmsgfmt", so it can be a program name with args.
+set dummy gmsgfmt; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:2507: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  case "$GMSGFMT" in
+  /*)
+  ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
+  ;;
+  ?:/*)			 
+  ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
+  ;;
+  *)
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
+      break
+    fi
+  done
+  IFS="$ac_save_ifs"
+  test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
+  ;;
+esac
+fi
+GMSGFMT="$ac_cv_path_GMSGFMT"
+if test -n "$GMSGFMT"; then
+  echo "$ac_t""$GMSGFMT" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+		# Extract the first word of "xgettext", so it can be a program name with args.
+set dummy xgettext; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:2542: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  case "$XGETTEXT" in
+  /*)
+  ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
+  ;;
+  *)
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      if test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"; then
+	ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
+	break
+      fi
+    fi
+  done
+  IFS="$ac_save_ifs"
+  test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
+  ;;
+esac
+fi
+XGETTEXT="$ac_cv_path_XGETTEXT"
+if test -n "$XGETTEXT"; then
+  echo "$ac_t""$XGETTEXT" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+		cat > conftest.$ac_ext <<EOF
+#line 2574 "configure"
+#include "confdefs.h"
+
+int main() {
+extern int _nl_msg_cat_cntr;
+			       return _nl_msg_cat_cntr
+; return 0; }
+EOF
+if { (eval echo configure:2582: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  CATOBJEXT=.gmo
+		   DATADIRNAME=share
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  CATOBJEXT=.mo
+		   DATADIRNAME=lib
+fi
+rm -f conftest*
+		INSTOBJEXT=.mo
+	      fi
+	    fi
+	
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+
+	        
+        if test "$CATOBJEXT" = "NONE"; then
+	  	  	  nls_cv_use_gnu_gettext=yes
+        fi
+      fi
+
+      if test "$nls_cv_use_gnu_gettext" = "yes"; then
+                INTLOBJS="\$(GETTOBJS)"
+        # Extract the first word of "msgfmt", so it can be a program name with args.
+set dummy msgfmt; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:2614: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  case "$MSGFMT" in
+  /*)
+  ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
+  ;;
+  *)
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
+	ac_cv_path_MSGFMT="$ac_dir/$ac_word"
+	break
+      fi
+    fi
+  done
+  IFS="$ac_save_ifs"
+  test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
+  ;;
+esac
+fi
+MSGFMT="$ac_cv_path_MSGFMT"
+if test -n "$MSGFMT"; then
+  echo "$ac_t""$MSGFMT" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+        # Extract the first word of "gmsgfmt", so it can be a program name with args.
+set dummy gmsgfmt; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:2648: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  case "$GMSGFMT" in
+  /*)
+  ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
+  ;;
+  ?:/*)			 
+  ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
+  ;;
+  *)
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
+      break
+    fi
+  done
+  IFS="$ac_save_ifs"
+  test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
+  ;;
+esac
+fi
+GMSGFMT="$ac_cv_path_GMSGFMT"
+if test -n "$GMSGFMT"; then
+  echo "$ac_t""$GMSGFMT" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+        # Extract the first word of "xgettext", so it can be a program name with args.
+set dummy xgettext; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:2683: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  case "$XGETTEXT" in
+  /*)
+  ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
+  ;;
+  *)
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      if test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"; then
+	ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
+	break
+      fi
+    fi
+  done
+  IFS="$ac_save_ifs"
+  test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
+  ;;
+esac
+fi
+XGETTEXT="$ac_cv_path_XGETTEXT"
+if test -n "$XGETTEXT"; then
+  echo "$ac_t""$XGETTEXT" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+        
+	USE_INCLUDED_LIBINTL=yes
+        CATOBJEXT=.gmo
+        INSTOBJEXT=.mo
+        DATADIRNAME=share
+	INTLDEPS='$(top_builddir)/../intl/libintl.a'
+	INTLLIBS=$INTLDEPS
+	LIBS=`echo $LIBS | sed -e 's/-lintl//'`
+        nls_cv_header_intl=libintl.h
+        nls_cv_header_libgt=libgettext.h
+      fi
+
+            if test "$XGETTEXT" != ":"; then
+			if $XGETTEXT --omit-header /dev/null 2> /dev/null; then
+	  : ;
+	else
+	  echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
+	  XGETTEXT=":"
+	fi
+      fi
+
+      # We need to process the po/ directory.
+      POSUB=po
+    else
+      DATADIRNAME=share
+      nls_cv_header_intl=libintl.h
+      nls_cv_header_libgt=libgettext.h
+    fi
+
+    # If this is used in GNU gettext we have to set USE_NLS to `yes'
+    # because some of the sources are only built for this goal.
+    if test "$PACKAGE" = gettext; then
+      USE_NLS=yes
+      USE_INCLUDED_LIBINTL=yes
+    fi
+
+                for lang in $ALL_LINGUAS; do
+      GMOFILES="$GMOFILES $lang.gmo"
+      POFILES="$POFILES $lang.po"
+    done
+
+        
+    
+    
+    
+    
+    
+    
+    
+    
+    
+    
+  
+
+   if test "x$CATOBJEXT" != "x"; then
+     if test "x$ALL_LINGUAS" = "x"; then
+       LINGUAS=
+     else
+       echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
+echo "configure:2773: checking for catalogs to be installed" >&5
+       NEW_LINGUAS=
+       for lang in ${LINGUAS=$ALL_LINGUAS}; do
+         case "$ALL_LINGUAS" in
+          *$lang*) NEW_LINGUAS="$NEW_LINGUAS $lang" ;;
+         esac
+       done
+       LINGUAS=$NEW_LINGUAS
+       echo "$ac_t""$LINGUAS" 1>&6
+     fi
+
+          if test -n "$LINGUAS"; then
+       for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done
+     fi
+   fi
+
+            if test $ac_cv_header_locale_h = yes; then
+     INCLUDE_LOCALE_H="#include <locale.h>"
+   else
+     INCLUDE_LOCALE_H="\
+/* The system does not provide the header <locale.h>.  Take care yourself.  */"
+   fi
+   
+
+            if test -f $srcdir/po2tbl.sed.in; then
+      if test "$CATOBJEXT" = ".cat"; then
+	 ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
+echo "configure:2801: checking for linux/version.h" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2806 "configure"
+#include "confdefs.h"
+#include <linux/version.h>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:2811: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=yes"
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+  msgformat=linux
+else
+  echo "$ac_t""no" 1>&6
+msgformat=xopen
+fi
+
+
+	          	 sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
+      fi
+            sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
+	 $srcdir/po2tbl.sed.in > po2tbl.sed
+   fi
+
+            if test "$PACKAGE" = "gettext"; then
+     GT_NO="#NO#"
+     GT_YES=
+   else
+     GT_NO=
+     GT_YES="#YES#"
+   fi
+   
+   
+
+   MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
+   
+
+      l=
+   
+
+            if test -d $srcdir/po; then
+      test -d po || mkdir po
+      if test "x$srcdir" != "x."; then
+	 if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
+	    posrcprefix="$srcdir/"
+	 else
+	    posrcprefix="../$srcdir/"
+	 fi
+      else
+	 posrcprefix="../"
+      fi
+      rm -f po/POTFILES
+      sed -e "/^#/d" -e "/^\$/d" -e "s,.*,	$posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
+	 < $srcdir/po/POTFILES.in > po/POTFILES
+   fi
+  
+
+# Check for common headers.
+# FIXME: Seems to me this can cause problems for i386-windows hosts.
+# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
+for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:2880: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2885 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:2890: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=yes"
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+for ac_hdr in sys/time.h sys/resource.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:2920: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2925 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:2930: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=yes"
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+for ac_hdr in fcntl.h fpu_control.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:2960: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 2965 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:2970: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=yes"
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+for ac_func in getrusage time sigaction __setfpucw
+do
+echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
+echo "configure:2999: checking for $ac_func" >&5
+if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 3004 "configure"
+#include "confdefs.h"
+/* System header to define __stub macros and hopefully few prototypes,
+    which can conflict with char $ac_func(); below.  */
+#include <assert.h>
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char $ac_func();
+
+int main() {
+
+/* The GNU C library defines this for functions which it implements
+    to always fail with ENOSYS.  Some functions are actually named
+    something starting with __ and the normal name is an alias.  */
+#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
+choke me
+#else
+$ac_func();
+#endif
+
+; return 0; }
+EOF
+if { (eval echo configure:3027: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_func_$ac_func=no"
+fi
+rm -f conftest*
+fi
+
+if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_func 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+
+# Check for socket libraries
+echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
+echo "configure:3054: checking for bind in -lsocket" >&5
+ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
+if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  ac_save_LIBS="$LIBS"
+LIBS="-lsocket  $LIBS"
+cat > conftest.$ac_ext <<EOF
+#line 3062 "configure"
+#include "confdefs.h"
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char bind();
+
+int main() {
+bind()
+; return 0; }
+EOF
+if { (eval echo configure:3073: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_lib_$ac_lib_var=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_lib_$ac_lib_var=no"
+fi
+rm -f conftest*
+LIBS="$ac_save_LIBS"
+
+fi
+if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
+    -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_lib 1
+EOF
+
+  LIBS="-lsocket $LIBS"
+
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
+echo "configure:3101: checking for gethostbyname in -lnsl" >&5
+ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
+if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  ac_save_LIBS="$LIBS"
+LIBS="-lnsl  $LIBS"
+cat > conftest.$ac_ext <<EOF
+#line 3109 "configure"
+#include "confdefs.h"
+/* Override any gcc2 internal prototype to avoid an error.  */
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+char gethostbyname();
+
+int main() {
+gethostbyname()
+; return 0; }
+EOF
+if { (eval echo configure:3120: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+  rm -rf conftest*
+  eval "ac_cv_lib_$ac_lib_var=yes"
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_lib_$ac_lib_var=no"
+fi
+rm -f conftest*
+LIBS="$ac_save_LIBS"
+
+fi
+if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
+    -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_lib 1
+EOF
+
+  LIBS="-lnsl $LIBS"
+
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+
+. ${srcdir}/../../bfd/configure.host
+
+
+
+USE_MAINTAINER_MODE=no
+# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
+if test "${enable_maintainer_mode+set}" = set; then
+  enableval="$enable_maintainer_mode"
+  case "${enableval}" in
+  yes)	MAINT="" USE_MAINTAINER_MODE=yes ;;
+  no)	MAINT="#" ;;
+  *)	{ echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
+esac
+if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
+  echo "Setting maintainer mode" 6>&1
+fi
+else
+  MAINT="#"
+fi
+
+
+
+# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
+if test "${enable_sim_bswap+set}" = set; then
+  enableval="$enable_sim_bswap"
+  case "${enableval}" in
+  yes)	sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
+  no)	sim_bswap="-DWITH_BSWAP=0";;
+  *)	{ echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
+  echo "Setting bswap flags = $sim_bswap" 6>&1
+fi
+else
+  sim_bswap=""
+fi
+
+
+
+# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
+if test "${enable_sim_cflags+set}" = set; then
+  enableval="$enable_sim_cflags"
+  case "${enableval}" in
+  yes)	 sim_cflags="-O2 -fomit-frame-pointer";;
+  trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
+  no)	 sim_cflags="";;
+  *)	 sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
+  echo "Setting sim cflags = $sim_cflags" 6>&1
+fi
+else
+  sim_cflags=""
+fi
+
+
+
+# Check whether --enable-sim-debug or --disable-sim-debug was given.
+if test "${enable_sim_debug+set}" = set; then
+  enableval="$enable_sim_debug"
+  case "${enableval}" in
+  yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
+  no)  sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
+  *)   sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
+  echo "Setting sim debug = $sim_debug" 6>&1
+fi
+else
+  sim_debug=""
+fi
+
+
+
+# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
+if test "${enable_sim_stdio+set}" = set; then
+  enableval="$enable_sim_stdio"
+  case "${enableval}" in
+  yes)	sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
+  no)	sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
+  *)	{ echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
+  echo "Setting stdio flags = $sim_stdio" 6>&1
+fi
+else
+  sim_stdio=""
+fi
+
+
+
+# Check whether --enable-sim-trace or --disable-sim-trace was given.
+if test "${enable_sim_trace+set}" = set; then
+  enableval="$enable_sim_trace"
+  case "${enableval}" in
+  yes)	sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
+  no)	sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
+  [-0-9]*)
+	sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
+  [a-z]*)
+	sim_trace=""
+	for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
+	  if test x"$sim_trace" = x; then
+	    sim_trace="-DWITH_TRACE='(TRACE_$x"
+	  else
+	    sim_trace="${sim_trace}|TRACE_$x"
+	  fi
+	done
+	sim_trace="$sim_trace)'" ;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
+  echo "Setting sim trace = $sim_trace" 6>&1
+fi
+else
+  sim_trace=""
+fi
+
+
+
+# Check whether --enable-sim-profile or --disable-sim-profile was given.
+if test "${enable_sim_profile+set}" = set; then
+  enableval="$enable_sim_profile"
+  case "${enableval}" in
+  yes)	sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
+  no)	sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
+  [-0-9]*)
+	sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
+  [a-z]*)
+	sim_profile=""
+	for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
+	  if test x"$sim_profile" = x; then
+	    sim_profile="-DWITH_PROFILE='(PROFILE_$x"
+	  else
+	    sim_profile="${sim_profile}|PROFILE_$x"
+	  fi
+	done
+	sim_profile="$sim_profile)'" ;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
+  echo "Setting sim profile = $sim_profile" 6>&1
+fi
+else
+  sim_profile=""
+fi
+
+
+
+echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
+echo "configure:3296: checking return type of signal handlers" >&5
+if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 3301 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+#include <signal.h>
+#ifdef signal
+#undef signal
+#endif
+#ifdef __cplusplus
+extern "C" void (*signal (int, void (*)(int)))(int);
+#else
+void (*signal ()) ();
+#endif
+
+int main() {
+int i;
+; return 0; }
+EOF
+if { (eval echo configure:3318: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+  rm -rf conftest*
+  ac_cv_type_signal=void
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  ac_cv_type_signal=int
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$ac_cv_type_signal" 1>&6
+cat >> confdefs.h <<EOF
+#define RETSIGTYPE $ac_cv_type_signal
+EOF
+
+
+
+echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
+echo "configure:3338: checking for executable suffix" >&5
+if eval "test \"`echo '$''{'am_cv_exeext'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  if test "$CYGWIN32" = yes; then
+am_cv_exeext=.exe
+else
+cat > am_c_test.c << 'EOF'
+int main() {
+/* Nothing needed here */
+}
+EOF
+${CC-cc} -o am_c_test $CFLAGS $CPPFLAGS $LDFLAGS am_c_test.c $LIBS 1>&5
+am_cv_exeext=`ls am_c_test.* | grep -v am_c_test.c | sed -e s/am_c_test//`
+rm -f am_c_test*
+fi
+
+test x"${am_cv_exeext}" = x && am_cv_exeext=no
+fi
+EXEEXT=""
+test x"${am_cv_exeext}" != xno && EXEEXT=${am_cv_exeext}
+echo "$ac_t""${am_cv_exeext}" 1>&6
+
+
+sim_link_files=
+sim_link_links=
+
+sim_link_links=tconfig.h
+if test -f ${srcdir}/tconfig.in
+then
+  sim_link_files=tconfig.in
+else
+  sim_link_files=../common/tconfig.in
+fi
+
+# targ-vals.def points to the libc macro description file.
+case "${target}" in
+*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
+esac
+sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
+sim_link_links="${sim_link_links} targ-vals.def"
+
+
+
+for ac_prog in gm4 gnum4 m4
+do
+# Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:3387: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_path_M4'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  case "$M4" in
+  /*)
+  ac_cv_path_M4="$M4" # Let the user override the test with a path.
+  ;;
+  ?:/*)			 
+  ac_cv_path_M4="$M4" # Let the user override the test with a dos path.
+  ;;
+  *)
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
+  for ac_dir in $PATH; do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      ac_cv_path_M4="$ac_dir/$ac_word"
+      break
+    fi
+  done
+  IFS="$ac_save_ifs"
+  ;;
+esac
+fi
+M4="$ac_cv_path_M4"
+if test -n "$M4"; then
+  echo "$ac_t""$M4" 1>&6
+else
+  echo "$ac_t""no" 1>&6
+fi
+
+test -n "$M4" && break
+done
+test -n "$M4" || M4="m4"
+
+
+
+default_sim_inline="-DDEFAULT_INLINE=0"
+# Check whether --enable-sim-inline or --disable-sim-inline was given.
+if test "${enable_sim_inline+set}" = set; then
+  enableval="$enable_sim_inline"
+  sim_inline=""
+case "$enableval" in
+  no)		sim_inline="-DDEFAULT_INLINE=0";;
+  0)		sim_inline="-DDEFAULT_INLINE=0";;
+  yes | 2)	sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
+  1)		sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
+  *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
+       new_flag=""
+       case "$x" in
+	 *_INLINE=*)	new_flag="-D$x";;
+	 *=*)		new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
+	 *_INLINE)	new_flag="-D$x=ALL_C_INLINE";;
+	 *)		new_flag="-D$x""_INLINE=ALL_C_INLINE";;
+       esac
+       if test x"$sim_inline" = x""; then
+	 sim_inline="$new_flag"
+       else
+	 sim_inline="$sim_inline $new_flag"
+       fi
+     done;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
+  echo "Setting inline flags = $sim_inline" 6>&1
+fi
+else
+  
+if test "x$cross_compiling" = "xno"; then
+  if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then
+    sim_inline="${default_sim_inline}"
+    if test x"$silent" != x"yes"; then
+      echo "Setting inline flags = $sim_inline" 6>&1
+    fi
+  else
+    sim_inline=""
+  fi
+else
+  sim_inline="-DDEFAULT_INLINE=0"
+fi
+fi
+
+
+wire_endian="BIG_ENDIAN"
+default_endian=""
+# Check whether --enable-sim-endian or --disable-sim-endian was given.
+if test "${enable_sim_endian+set}" = set; then
+  enableval="$enable_sim_endian"
+  case "${enableval}" in
+  b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
+  l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
+  yes)	 if test x"$wire_endian" != x; then
+	   sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
+	 else
+           if test x"$default_endian" != x; then
+	     sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
+	   else
+	     echo "No hard-wired endian for target $target" 1>&6
+	     sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
+	   fi
+	 fi;;
+  no)	 if test x"$default_endian" != x; then
+	   sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
+	 else
+	   if test x"$wire_endian" != x; then
+	     sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
+	   else
+	     echo "No default endian for target $target" 1>&6
+	     sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
+	   fi
+	 fi;;
+  *)	 { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
+  echo "Setting endian flags = $sim_endian" 6>&1
+fi
+else
+  if test x"$default_endian" != x; then
+  sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
+else
+  if test x"$wire_endian" != x; then
+    sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
+  else
+    sim_endian=
+  fi
+fi
+fi
+
+wire_alignment="STRICT_ALIGNMENT"
+default_alignment=""
+
+# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
+if test "${enable_sim_alignment+set}" = set; then
+  enableval="$enable_sim_alignment"
+  case "${enableval}" in
+  strict | STRICT)       sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
+  nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
+  forced | FORCED)       sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
+  yes) if test x"$wire_alignment" != x; then
+	 sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
+       else
+         if test x"$default_alignment" != x; then
+           sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
+         else
+	   echo "No hard-wired alignment for target $target" 1>&6
+	   sim_alignment="-DWITH_ALIGNMENT=0"
+         fi
+       fi;;
+  no)  if test x"$default_alignment" != x; then
+	 sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
+       else
+         if test x"$wire_alignment" != x; then
+	   sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
+         else
+           echo "No default alignment for target $target" 1>&6
+           sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
+         fi
+       fi;;
+  *)   { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
+  echo "Setting alignment flags = $sim_alignment" 6>&1
+fi
+else
+  if test x"$default_alignment" != x; then
+  sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
+else
+  if test x"$wire_alignment" != x; then
+    sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
+  else
+    sim_alignment=
+  fi
+fi
+fi
+
+
+# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
+if test "${enable_sim_hostendian+set}" = set; then
+  enableval="$enable_sim_hostendian"
+  case "${enableval}" in
+  no)	 sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
+  b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
+  l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
+  *)	 { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
+  echo "Setting hostendian flags = $sim_hostendian" 6>&1
+fi
+else
+  
+if test "x$cross_compiling" = "xno"; then
+  echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
+echo "configure:3578: checking whether byte ordering is bigendian" >&5
+if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  ac_cv_c_bigendian=unknown
+# See if sys/param.h defines the BYTE_ORDER macro.
+cat > conftest.$ac_ext <<EOF
+#line 3585 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+#include <sys/param.h>
+int main() {
+
+#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
+ bogus endian macros
+#endif
+; return 0; }
+EOF
+if { (eval echo configure:3596: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+  rm -rf conftest*
+  # It does; now see whether it defined to BIG_ENDIAN or not.
+cat > conftest.$ac_ext <<EOF
+#line 3600 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+#include <sys/param.h>
+int main() {
+
+#if BYTE_ORDER != BIG_ENDIAN
+ not big endian
+#endif
+; return 0; }
+EOF
+if { (eval echo configure:3611: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+  rm -rf conftest*
+  ac_cv_c_bigendian=yes
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  ac_cv_c_bigendian=no
+fi
+rm -f conftest*
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+fi
+rm -f conftest*
+if test $ac_cv_c_bigendian = unknown; then
+if test "$cross_compiling" = yes; then
+    { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
+else
+  cat > conftest.$ac_ext <<EOF
+#line 3631 "configure"
+#include "confdefs.h"
+main () {
+  /* Are we little or big endian?  From Harbison&Steele.  */
+  union
+  {
+    long l;
+    char c[sizeof (long)];
+  } u;
+  u.l = 1;
+  exit (u.c[sizeof (long) - 1] == 1);
+}
+EOF
+if { (eval echo configure:3644: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+then
+  ac_cv_c_bigendian=no
+else
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -fr conftest*
+  ac_cv_c_bigendian=yes
+fi
+rm -fr conftest*
+fi
+
+fi
+fi
+
+echo "$ac_t""$ac_cv_c_bigendian" 1>&6
+if test $ac_cv_c_bigendian = yes; then
+  cat >> confdefs.h <<\EOF
+#define WORDS_BIGENDIAN 1
+EOF
+
+fi
+
+  if test $ac_cv_c_bigendian = yes; then
+    sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
+  else
+    sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
+  fi
+else
+  sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
+fi
+fi
+
+
+# Check whether --enable-build-warnings or --disable-build-warnings was given.
+if test "${enable_build_warnings+set}" = set; then
+  enableval="$enable_build_warnings"
+  build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
+case "${enableval}" in
+  yes)	;;
+  no)	build_warnings="-w";;
+  ,*)   t=`echo "${enableval}" | sed -e "s/,/ /g"`
+	build_warnings="${build_warnings} ${t}";;
+  *,)   t=`echo "${enableval}" | sed -e "s/,/ /g"`
+	build_warnings="${t} ${build_warnings}";;
+  *)	build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
+esac
+if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
+  echo "Setting warning flags = $build_warnings" 6>&1
+fi
+else
+  build_warnings=""
+fi
+
+
+default_sim_reserved_bits="1"
+# Check whether --enable-sim-reserved-bits or --disable-sim-reserved-bits was given.
+if test "${enable_sim_reserved_bits+set}" = set; then
+  enableval="$enable_sim_reserved_bits"
+  case "${enableval}" in
+  yes)	sim_reserved_bits="-DWITH_RESERVED_BITS=1";;
+  no)	sim_reserved_bits="-DWITH_RESERVED_BITS=0";;
+  *)	{ echo "configure: error: "--enable-sim-reserved-bits does not take a value"" 1>&2; exit 1; }; sim_reserved_bits="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_reserved_bits" != x""; then
+  echo "Setting reserved flags = $sim_reserved_bits" 6>&1
+fi
+else
+  sim_reserved_bits="-DWITH_RESERVED_BITS=${default_sim_reserved_bits}"
+fi
+
+
+
+
+#
+# Enable making unknown traps dump out registers
+#
+# Check whether --enable-sim-trapdump or --disable-sim-trapdump was given.
+if test "${enable_sim_trapdump+set}" = set; then
+  enableval="$enable_sim_trapdump"
+  case "${enableval}" in
+  yes) sim_trapdump="-DTRAPDUMP=1";;
+  no)  sim_trapdump="-DTRAPDUMP=0";;
+  *)   { echo "configure: error: "Unknown value $enableval passed to --enable-sim-trapdump"" 1>&2; exit 1; }; sim_trapdump="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_trapdump" != x""; then
+  echo "Setting sim_trapdump = $sim_trapdump" 6>&1
+fi
+else
+  sim_trapdump=""
+fi
+
+
+for ac_hdr in stdlib.h unistd.h string.h strings.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:3741: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+  echo $ac_n "(cached) $ac_c" 1>&6
+else
+  cat > conftest.$ac_ext <<EOF
+#line 3746 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:3751: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=yes"
+else
+  echo "$ac_err" >&5
+  echo "configure: failed program was:" >&5
+  cat conftest.$ac_ext >&5
+  rm -rf conftest*
+  eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+  echo "$ac_t""yes" 1>&6
+    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+  cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+ 
+else
+  echo "$ac_t""no" 1>&6
+fi
+done
+
+
+
+
+
+trap '' 1 2 15
+cat > confcache <<\EOF
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs.  It is not useful on other systems.
+# If it contains results you don't want to keep, you may remove or edit it.
+#
+# By default, configure uses ./config.cache as the cache file,
+# creating it if it does not exist already.  You can give configure
+# the --cache-file=FILE option to use a different cache file; that is
+# what configure does when it calls configure scripts in
+# subdirectories, so they share the cache.
+# Giving --cache-file=/dev/null disables caching, for debugging configure.
+# config.status only pays attention to the cache file if you give it the
+# --recheck option to rerun configure.
+#
+EOF
+# The following way of writing the cache mishandles newlines in values,
+# but we know of no workaround that is simple, portable, and efficient.
+# So, don't put newlines in cache variables' values.
+# Ultrix sh set writes to stderr and can't be redirected directly,
+# and sets the high bit in the cache file unless we assign to the vars.
+(set) 2>&1 |
+  case `(ac_space=' '; set) 2>&1 | grep ac_space` in
+  *ac_space=\ *)
+    # `set' does not quote correctly, so add quotes (double-quote substitution
+    # turns \\\\ into \\, and sed turns \\ into \).
+    sed -n \
+      -e "s/'/'\\\\''/g" \
+      -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
+    ;;
+  *)
+    # `set' quotes correctly as required by POSIX, so do not add quotes.
+    sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
+    ;;
+  esac >> confcache
+if cmp -s $cache_file confcache; then
+  :
+else
+  if test -w $cache_file; then
+    echo "updating cache $cache_file"
+    cat confcache > $cache_file
+  else
+    echo "not updating unwritable cache $cache_file"
+  fi
+fi
+rm -f confcache
+
+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+
+test "x$prefix" = xNONE && prefix=$ac_default_prefix
+# Let make expand exec_prefix.
+test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
+
+# Any assignment to VPATH causes Sun make to only execute
+# the first set of double-colon rules, so remove it if not needed.
+# If there is a colon in the path, we need to keep it.
+if test "x$srcdir" = x.; then
+  ac_vpsub='/^[ 	]*VPATH[ 	]*=[^:]*$/d'
+fi
+
+trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
+
+DEFS=-DHAVE_CONFIG_H
+
+# Without the "./", some shells look in PATH for config.status.
+: ${CONFIG_STATUS=./config.status}
+
+echo creating $CONFIG_STATUS
+rm -f $CONFIG_STATUS
+cat > $CONFIG_STATUS <<EOF
+#! /bin/sh
+# Generated automatically by configure.
+# Run this file to recreate the current configuration.
+# This directory was configured as follows,
+# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
+#
+# $0 $ac_configure_args
+#
+# Compiler output produced by configure, useful for debugging
+# configure, is in ./config.log if it exists.
+
+ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
+for ac_option
+do
+  case "\$ac_option" in
+  -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+    echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
+    exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
+  -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
+    echo "$CONFIG_STATUS generated by autoconf version 2.12.2"
+    exit 0 ;;
+  -help | --help | --hel | --he | --h)
+    echo "\$ac_cs_usage"; exit 0 ;;
+  *) echo "\$ac_cs_usage"; exit 1 ;;
+  esac
+done
+
+ac_given_srcdir=$srcdir
+ac_given_INSTALL="$INSTALL"
+
+trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
+EOF
+cat >> $CONFIG_STATUS <<EOF
+
+# Protect against being on the right side of a sed subst in config.status.
+sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
+ s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
+$ac_vpsub
+$extrasub
+s%@sim_environment@%$sim_environment%g
+s%@sim_alignment@%$sim_alignment%g
+s%@sim_assert@%$sim_assert%g
+s%@sim_bitsize@%$sim_bitsize%g
+s%@sim_endian@%$sim_endian%g
+s%@sim_hostendian@%$sim_hostendian%g
+s%@sim_float@%$sim_float%g
+s%@sim_scache@%$sim_scache%g
+s%@sim_default_model@%$sim_default_model%g
+s%@sim_hw_cflags@%$sim_hw_cflags%g
+s%@sim_hw_objs@%$sim_hw_objs%g
+s%@sim_hw@%$sim_hw%g
+s%@sim_inline@%$sim_inline%g
+s%@sim_packages@%$sim_packages%g
+s%@sim_regparm@%$sim_regparm%g
+s%@sim_reserved_bits@%$sim_reserved_bits%g
+s%@sim_smp@%$sim_smp%g
+s%@sim_stdcall@%$sim_stdcall%g
+s%@sim_xor_endian@%$sim_xor_endian%g
+s%@build_warnings@%$build_warnings%g
+s%@SHELL@%$SHELL%g
+s%@CFLAGS@%$CFLAGS%g
+s%@CPPFLAGS@%$CPPFLAGS%g
+s%@CXXFLAGS@%$CXXFLAGS%g
+s%@DEFS@%$DEFS%g
+s%@LDFLAGS@%$LDFLAGS%g
+s%@LIBS@%$LIBS%g
+s%@exec_prefix@%$exec_prefix%g
+s%@prefix@%$prefix%g
+s%@program_transform_name@%$program_transform_name%g
+s%@bindir@%$bindir%g
+s%@sbindir@%$sbindir%g
+s%@libexecdir@%$libexecdir%g
+s%@datadir@%$datadir%g
+s%@sysconfdir@%$sysconfdir%g
+s%@sharedstatedir@%$sharedstatedir%g
+s%@localstatedir@%$localstatedir%g
+s%@libdir@%$libdir%g
+s%@includedir@%$includedir%g
+s%@oldincludedir@%$oldincludedir%g
+s%@infodir@%$infodir%g
+s%@mandir@%$mandir%g
+s%@host@%$host%g
+s%@host_alias@%$host_alias%g
+s%@host_cpu@%$host_cpu%g
+s%@host_vendor@%$host_vendor%g
+s%@host_os@%$host_os%g
+s%@target@%$target%g
+s%@target_alias@%$target_alias%g
+s%@target_cpu@%$target_cpu%g
+s%@target_vendor@%$target_vendor%g
+s%@target_os@%$target_os%g
+s%@build@%$build%g
+s%@build_alias@%$build_alias%g
+s%@build_cpu@%$build_cpu%g
+s%@build_vendor@%$build_vendor%g
+s%@build_os@%$build_os%g
+s%@CC@%$CC%g
+s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
+s%@INSTALL_DATA@%$INSTALL_DATA%g
+s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
+s%@HDEFINES@%$HDEFINES%g
+s%@AR@%$AR%g
+s%@RANLIB@%$RANLIB%g
+s%@SET_MAKE@%$SET_MAKE%g
+s%@CPP@%$CPP%g
+s%@ALLOCA@%$ALLOCA%g
+s%@USE_NLS@%$USE_NLS%g
+s%@MSGFMT@%$MSGFMT%g
+s%@GMSGFMT@%$GMSGFMT%g
+s%@XGETTEXT@%$XGETTEXT%g
+s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
+s%@CATALOGS@%$CATALOGS%g
+s%@CATOBJEXT@%$CATOBJEXT%g
+s%@DATADIRNAME@%$DATADIRNAME%g
+s%@GMOFILES@%$GMOFILES%g
+s%@INSTOBJEXT@%$INSTOBJEXT%g
+s%@INTLDEPS@%$INTLDEPS%g
+s%@INTLLIBS@%$INTLLIBS%g
+s%@INTLOBJS@%$INTLOBJS%g
+s%@POFILES@%$POFILES%g
+s%@POSUB@%$POSUB%g
+s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
+s%@GT_NO@%$GT_NO%g
+s%@GT_YES@%$GT_YES%g
+s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
+s%@l@%$l%g
+s%@MAINT@%$MAINT%g
+s%@sim_bswap@%$sim_bswap%g
+s%@sim_cflags@%$sim_cflags%g
+s%@sim_debug@%$sim_debug%g
+s%@sim_stdio@%$sim_stdio%g
+s%@sim_trace@%$sim_trace%g
+s%@sim_profile@%$sim_profile%g
+s%@EXEEXT@%$EXEEXT%g
+s%@M4@%$M4%g
+s%@sim_trapdump@%$sim_trapdump%g
+
+CEOF
+EOF
+
+cat >> $CONFIG_STATUS <<\EOF
+
+# Split the substitutions into bite-sized pieces for seds with
+# small command number limits, like on Digital OSF/1 and HP-UX.
+ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
+ac_file=1 # Number of current file.
+ac_beg=1 # First line for current file.
+ac_end=$ac_max_sed_cmds # Line after last line for current file.
+ac_more_lines=:
+ac_sed_cmds=""
+while $ac_more_lines; do
+  if test $ac_beg -gt 1; then
+    sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
+  else
+    sed "${ac_end}q" conftest.subs > conftest.s$ac_file
+  fi
+  if test ! -s conftest.s$ac_file; then
+    ac_more_lines=false
+    rm -f conftest.s$ac_file
+  else
+    if test -z "$ac_sed_cmds"; then
+      ac_sed_cmds="sed -f conftest.s$ac_file"
+    else
+      ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
+    fi
+    ac_file=`expr $ac_file + 1`
+    ac_beg=$ac_end
+    ac_end=`expr $ac_end + $ac_max_sed_cmds`
+  fi
+done
+if test -z "$ac_sed_cmds"; then
+  ac_sed_cmds=cat
+fi
+EOF
+
+cat >> $CONFIG_STATUS <<EOF
+
+CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
+EOF
+cat >> $CONFIG_STATUS <<\EOF
+for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
+  # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+  case "$ac_file" in
+  *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+       ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+  *) ac_file_in="${ac_file}.in" ;;
+  esac
+
+  # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
+
+  # Remove last slash and all that follows it.  Not all systems have dirname.
+  ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+  if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+    # The file is in a subdirectory.
+    test ! -d "$ac_dir" && mkdir "$ac_dir"
+    ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
+    # A "../" for each directory in $ac_dir_suffix.
+    ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
+  else
+    ac_dir_suffix= ac_dots=
+  fi
+
+  case "$ac_given_srcdir" in
+  .)  srcdir=.
+      if test -z "$ac_dots"; then top_srcdir=.
+      else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
+  /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
+  *) # Relative path.
+    srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
+    top_srcdir="$ac_dots$ac_given_srcdir" ;;
+  esac
+
+  case "$ac_given_INSTALL" in
+  [/$]*) INSTALL="$ac_given_INSTALL" ;;
+  *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
+  esac
+
+  echo creating "$ac_file"
+  rm -f "$ac_file"
+  configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
+  case "$ac_file" in
+  *Makefile*) ac_comsub="1i\\
+# $configure_input" ;;
+  *) ac_comsub= ;;
+  esac
+
+  ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+  sed -e "$ac_comsub
+s%@configure_input@%$configure_input%g
+s%@srcdir@%$srcdir%g
+s%@top_srcdir@%$top_srcdir%g
+s%@INSTALL@%$INSTALL%g
+" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
+fi; done
+rm -f conftest.s*
+
+# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
+# NAME is the cpp macro being defined and VALUE is the value it is being given.
+#
+# ac_d sets the value in "#define NAME VALUE" lines.
+ac_dA='s%^\([ 	]*\)#\([ 	]*define[ 	][ 	]*\)'
+ac_dB='\([ 	][ 	]*\)[^ 	]*%\1#\2'
+ac_dC='\3'
+ac_dD='%g'
+# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
+ac_uA='s%^\([ 	]*\)#\([ 	]*\)undef\([ 	][ 	]*\)'
+ac_uB='\([ 	]\)%\1#\2define\3'
+ac_uC=' '
+ac_uD='\4%g'
+# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
+ac_eA='s%^\([ 	]*\)#\([ 	]*\)undef\([ 	][ 	]*\)'
+ac_eB='$%\1#\2define\3'
+ac_eC=' '
+ac_eD='%g'
+
+if test "${CONFIG_HEADERS+set}" != set; then
+EOF
+cat >> $CONFIG_STATUS <<EOF
+  CONFIG_HEADERS="config.h:config.in"
+EOF
+cat >> $CONFIG_STATUS <<\EOF
+fi
+for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
+  # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+  case "$ac_file" in
+  *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+       ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+  *) ac_file_in="${ac_file}.in" ;;
+  esac
+
+  echo creating $ac_file
+
+  rm -f conftest.frag conftest.in conftest.out
+  ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+  cat $ac_file_inputs > conftest.in
+
+EOF
+
+# Transform confdefs.h into a sed script conftest.vals that substitutes
+# the proper values into config.h.in to produce config.h.  And first:
+# Protect against being on the right side of a sed subst in config.status.
+# Protect against being in an unquoted here document in config.status.
+rm -f conftest.vals
+cat > conftest.hdr <<\EOF
+s/[\\&%]/\\&/g
+s%[\\$`]%\\&%g
+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
+s%ac_d%ac_u%gp
+s%ac_u%ac_e%gp
+EOF
+sed -n -f conftest.hdr confdefs.h > conftest.vals
+rm -f conftest.hdr
+
+# This sed command replaces #undef with comments.  This is necessary, for
+# example, in the case of _POSIX_SOURCE, which is predefined and required
+# on some systems where configure will not decide to define it.
+cat >> conftest.vals <<\EOF
+s%^[ 	]*#[ 	]*undef[ 	][ 	]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
+EOF
+
+# Break up conftest.vals because some shells have a limit on
+# the size of here documents, and old seds have small limits too.
+
+rm -f conftest.tail
+while :
+do
+  ac_lines=`grep -c . conftest.vals`
+  # grep -c gives empty output for an empty file on some AIX systems.
+  if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
+  # Write a limited-size here document to conftest.frag.
+  echo '  cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
+  sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
+  echo 'CEOF
+  sed -f conftest.frag conftest.in > conftest.out
+  rm -f conftest.in
+  mv conftest.out conftest.in
+' >> $CONFIG_STATUS
+  sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
+  rm -f conftest.vals
+  mv conftest.tail conftest.vals
+done
+rm -f conftest.vals
+
+cat >> $CONFIG_STATUS <<\EOF
+  rm -f conftest.frag conftest.h
+  echo "/* $ac_file.  Generated automatically by configure.  */" > conftest.h
+  cat conftest.in >> conftest.h
+  rm -f conftest.in
+  if cmp -s $ac_file conftest.h 2>/dev/null; then
+    echo "$ac_file is unchanged"
+    rm -f conftest.h
+  else
+    # Remove last slash and all that follows it.  Not all systems have dirname.
+      ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+      if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+      # The file is in a subdirectory.
+      test ! -d "$ac_dir" && mkdir "$ac_dir"
+    fi
+    rm -f $ac_file
+    mv conftest.h $ac_file
+  fi
+fi; done
+
+EOF
+
+cat >> $CONFIG_STATUS <<EOF
+ac_sources="$sim_link_files"
+ac_dests="$sim_link_links"
+EOF
+
+cat >> $CONFIG_STATUS <<\EOF
+srcdir=$ac_given_srcdir
+while test -n "$ac_sources"; do
+  set $ac_dests; ac_dest=$1; shift; ac_dests=$*
+  set $ac_sources; ac_source=$1; shift; ac_sources=$*
+
+  echo "linking $srcdir/$ac_source to $ac_dest"
+
+  if test ! -r $srcdir/$ac_source; then
+    { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
+  fi
+  rm -f $ac_dest
+
+  # Make relative symlinks.
+  # Remove last slash and all that follows it.  Not all systems have dirname.
+  ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
+  if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
+    # The dest file is in a subdirectory.
+    test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
+    ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
+    # A "../" for each directory in $ac_dest_dir_suffix.
+    ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
+  else
+    ac_dest_dir_suffix= ac_dots=
+  fi
+
+  case "$srcdir" in
+  [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
+  *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
+  esac
+
+  # Make a symlink if possible; otherwise try a hard link.
+  if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
+    ln $srcdir/$ac_source $ac_dest; then :
+  else
+    { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
+  fi
+done
+EOF
+cat >> $CONFIG_STATUS <<EOF
+
+EOF
+cat >> $CONFIG_STATUS <<\EOF
+case "x$CONFIG_FILES" in
+ xMakefile*)
+   echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
+   rm -f Makesim1.tmp Makesim2.tmp Makefile
+   sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
+   sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
+   sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
+	-e '/^## COMMON_POST_/ r Makesim2.tmp' \
+	<Makefile.sim >Makefile
+   rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
+   ;;
+ esac
+ case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
+
+exit 0
+EOF
+chmod +x $CONFIG_STATUS
+rm -fr confdefs* $ac_clean_files
+test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
+
+
diff --git a/sim/d30v/configure.in b/sim/d30v/configure.in
new file mode 100644
index 0000000..440aac5
--- /dev/null
+++ b/sim/d30v/configure.in
@@ -0,0 +1,40 @@
+dnl Process this file with autoconf to produce a configure script.
+sinclude(../common/aclocal.m4)
+AC_PREREQ(2.5)dnl
+AC_INIT(Makefile.in)
+
+SIM_AC_COMMON
+
+dnl Find a versionn of m4 to use as a preprocessor
+AC_PATH_PROGS(M4, gm4 gnum4 m4, m4)
+
+dnl Options available in this module
+SIM_AC_OPTION_INLINE(0)
+SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
+SIM_AC_OPTION_ALIGNMENT(STRICT_ALIGNMENT)
+SIM_AC_OPTION_HOSTENDIAN
+SIM_AC_OPTION_WARNINGS
+SIM_AC_OPTION_RESERVED_BITS(1)
+
+AC_SUBST(M4)
+
+#
+# Enable making unknown traps dump out registers
+#
+AC_ARG_ENABLE(sim-trapdump,
+[  --enable-sim-trapdump		Make unknown traps dump the registers],
+[case "${enableval}" in
+  yes) sim_trapdump="-DTRAPDUMP=1";;
+  no)  sim_trapdump="-DTRAPDUMP=0";;
+  *)   AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-trapdump"); sim_trapdump="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_trapdump" != x""; then
+  echo "Setting sim_trapdump = $sim_trapdump" 6>&1
+fi],[sim_trapdump=""])dnl
+AC_SUBST(sim_trapdump)
+
+dnl For UNIX emulation
+AC_CHECK_HEADERS(stdlib.h unistd.h string.h strings.h)
+
+
+SIM_AC_OUTPUT
diff --git a/sim/d30v/cpu.c b/sim/d30v/cpu.c
new file mode 100644
index 0000000..c14a951
--- /dev/null
+++ b/sim/d30v/cpu.c
@@ -0,0 +1,172 @@
+/* Mitsubishi Electric Corp. D30V Simulator.
+   Copyright (C) 1997, Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+This file is part of GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+
+#ifndef _CPU_C_
+#define _CPU_C_
+
+#include "sim-main.h"
+
+
+int
+is_wrong_slot (SIM_DESC sd,
+	       address_word cia,
+	       itable_index index)
+{
+  switch (STATE_CPU (sd, 0)->unit)
+    {
+    case memory_unit:
+      return !itable[index].option[itable_option_mu];
+    case integer_unit:
+      return !itable[index].option[itable_option_iu];
+    case any_unit:
+      return 0;
+    default:
+      sim_engine_abort (sd, STATE_CPU (sd, 0), cia,
+			"internal error - is_wrong_slot - bad switch");
+      return -1;
+    }
+}
+
+int
+is_condition_ok (SIM_DESC sd,
+		 address_word cia,
+		 int cond)
+{
+  switch (cond)
+    {
+    case 0x0:
+      return 1;
+    case 0x1:
+      return PSW_VAL(PSW_F0);
+    case 0x2:
+      return !PSW_VAL(PSW_F0);
+    case 0x3:
+      return PSW_VAL(PSW_F1);
+    case 0x4:
+      return !PSW_VAL(PSW_F1);
+    case 0x5:
+      return PSW_VAL(PSW_F0) && PSW_VAL(PSW_F1);
+    case 0x6:
+      return PSW_VAL(PSW_F0) && !PSW_VAL(PSW_F1);
+    case 0x7:
+      sim_engine_abort (sd, STATE_CPU (sd, 0), cia,
+			"is_condition_ok - bad instruction condition bits");
+      return 0;
+    default:
+      sim_engine_abort (sd, STATE_CPU (sd, 0), cia,
+			"internal error - is_condition_ok - bad switch");
+      return -1;
+    }
+}
+
+/* If --trace-call, trace calls, remembering the current state of
+   registers.  */
+
+typedef struct _call_stack {
+  struct _call_stack *prev;
+  registers regs;
+} call_stack;
+
+static call_stack *call_stack_head = (call_stack *)0;
+static int call_depth = 0;
+
+void call_occurred (SIM_DESC sd,
+		    sim_cpu *cpu,
+		    address_word cia,
+		    address_word nia)
+{
+  call_stack *ptr = ZALLOC (call_stack);
+  ptr->regs = cpu->regs;
+  ptr->prev = call_stack_head;
+  call_stack_head = ptr;
+
+  trace_one_insn (sd, cpu, nia, 1, "", 0, "call",
+		  "Depth %3d, Return 0x%.8lx, Args 0x%.8lx 0x%.8lx",
+		  ++call_depth, (unsigned long)cia+8, (unsigned long)GPR[2],
+		  (unsigned long)GPR[3]);
+}
+
+/* If --trace-call, trace returns, checking if any saved register was changed.  */
+
+void return_occurred (SIM_DESC sd,
+		      sim_cpu *cpu,
+		      address_word cia,
+		      address_word nia)
+{
+  char buffer[1024];
+  char *buf_ptr = buffer;
+  call_stack *ptr = call_stack_head;
+  int regno;
+  char *prefix = ", Registers that differ: ";
+
+  *buf_ptr = '\0';
+  for (regno = 34; regno <= 63; regno++) {
+    if (cpu->regs.general_purpose[regno] != ptr->regs.general_purpose[regno]) {
+      sprintf (buf_ptr, "%sr%d", prefix, regno);
+      buf_ptr += strlen (buf_ptr);
+      prefix = " ";
+    }
+  }
+
+  if (cpu->regs.accumulator[1] != ptr->regs.accumulator[1]) {
+    sprintf (buf_ptr, "%sa1", prefix);
+    buf_ptr += strlen (buf_ptr);
+    prefix = " ";
+  }
+
+  trace_one_insn (sd, cpu, cia, 1, "", 0, "return",
+		  "Depth %3d, Return 0x%.8lx, Ret. 0x%.8lx 0x%.8lx%s",
+		  call_depth--, (unsigned long)nia, (unsigned long)GPR[2],
+		  (unsigned long)GPR[3], buffer);
+
+  call_stack_head = ptr->prev;
+  zfree (ptr);
+}
+
+
+/* Read/write functions for system call interface.  */
+int
+d30v_read_mem (host_callback *cb,
+	       struct cb_syscall *sc,
+	       unsigned long taddr,
+	       char *buf,
+	       int bytes)
+{
+  SIM_DESC sd = (SIM_DESC) sc->p1;
+  sim_cpu *cpu = STATE_CPU (sd, 0);
+
+  return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
+}
+
+int
+d30v_write_mem (host_callback *cb,
+		struct cb_syscall *sc,
+		unsigned long taddr,
+		const char *buf,
+		int bytes)
+{
+  SIM_DESC sd = (SIM_DESC) sc->p1;
+  sim_cpu *cpu = STATE_CPU (sd, 0);
+
+  return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
+}
+
+#endif /* _CPU_C_ */
diff --git a/sim/d30v/cpu.h b/sim/d30v/cpu.h
new file mode 100644
index 0000000..6190e61
--- /dev/null
+++ b/sim/d30v/cpu.h
@@ -0,0 +1,242 @@
+/* Mitsubishi Electric Corp. D30V Simulator.
+   Copyright (C) 1997, Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+This file is part of GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+
+#ifndef _CPU_H_
+#define _CPU_H_
+
+enum {
+  NR_GENERAL_PURPOSE_REGISTERS = 64,
+  NR_CONTROL_REGISTERS = 64,
+  NR_ACCUMULATORS = 2,
+  STACK_POINTER_GPR = 63,
+  NR_STACK_POINTERS = 2,
+};
+
+enum {
+  processor_status_word_cr = 0,
+  backup_processor_status_word_cr = 1,
+  program_counter_cr = 2,
+  backup_program_counter_cr = 3,
+  debug_backup_processor_status_word_cr = 4,
+  debug_backup_program_counter_cr = 5,
+  reserved_6_cr = 6,
+  repeat_count_cr = 7,
+  repeat_start_address_cr = 8,
+  repeat_end_address_cr = 9,
+  modulo_start_address_cr = 10,
+  modulo_end_address_cr = 11,
+  instruction_break_address_cr = 14,
+  eit_vector_base_cr = 15,
+};
+
+
+enum {
+  PSW_SM = 0,
+  PSW_EA = 2,
+  PSW_DB = 3,
+  PSW_DS = 4,
+  PSW_IE = 5,
+  PSW_RP = 6,
+  PSW_MD = 7,
+  PSW_F0 = 17,
+  PSW_F1 = 19,
+  PSW_F2 = 21,
+  PSW_F3 = 23,
+  PSW_S = 25,
+  PSW_V = 27,
+  PSW_VA = 29,
+  PSW_C = 31,
+};
+
+/* aliases for PSW flag numbers (F0..F7) */
+enum
+{
+  PSW_S_FLAG = 4,
+};
+
+typedef struct _registers {
+  unsigned32 general_purpose[NR_GENERAL_PURPOSE_REGISTERS];
+  /* keep track of the stack pointer */
+  unsigned32 sp[NR_STACK_POINTERS]; /* swap with SP */
+  unsigned32 current_sp;
+  unsigned32 control[NR_CONTROL_REGISTERS];
+  unsigned64 accumulator[NR_ACCUMULATORS];
+} registers;
+
+typedef enum _cpu_units {
+  memory_unit,
+  integer_unit,
+  any_unit,
+} cpu_units;
+
+/* In order to support parallel instructions, which one instruction can be
+   writing to a register that is used as input to another, queue up the
+   writes to the end of the instruction boundaries.  */
+
+#define MAX_WRITE32	16
+#define MAX_WRITE64	2
+
+struct _write32 {
+  int num;				/* # of 32-bit writes queued up */
+  unsigned32 value[MAX_WRITE32];	/* value to write */
+  unsigned32 mask[MAX_WRITE32];		/* mask to use */
+  unsigned32 *ptr[MAX_WRITE32];		/* address to write to */
+};
+
+struct _write64 {
+  int num;				/* # of 64-bit writes queued up */
+  unsigned64 value[MAX_WRITE64];	/* value to write */
+  unsigned64 *ptr[MAX_WRITE64];		/* address to write to */
+};
+
+struct _sim_cpu {
+  cpu_units unit;
+  registers regs;
+  sim_cpu_base base;
+  int trace_call_p;			/* Whether to do call tracing.  */
+  int trace_trap_p;			/* If unknown traps dump out the regs */
+  int trace_action;			/* trace bits at end of instructions */
+  int left_kills_right_p;               /* left insn kills insn in right slot of -> */
+  int did_trap;				/* we did a trap & need to finish it */
+  struct _write32 write32;		/* queued up 32-bit writes */
+  struct _write64 write64;		/* queued up 64-bit writes */
+};
+
+#define PC	(STATE_CPU (sd, 0)->regs.control[program_counter_cr])
+#define PSW 	(STATE_CPU (sd, 0)->regs.control[processor_status_word_cr])
+#define PSWL    (*AL2_4(&PSW))
+#define PSWH    (*AH2_4(&PSW))
+#define DPSW 	(STATE_CPU (sd, 0)->regs.control[debug_backup_processor_status_word_cr])
+#define DPC 	(STATE_CPU (sd, 0)->regs.control[debug_backup_program_counter_cr])
+#define bPC 	(STATE_CPU (sd, 0)->regs.control[backup_program_counter_cr])
+#define bPSW 	(STATE_CPU (sd, 0)->regs.control[backup_processor_status_word_cr])
+#define RPT_C 	(STATE_CPU (sd, 0)->regs.control[repeat_count_cr])
+#define RPT_S 	(STATE_CPU (sd, 0)->regs.control[repeat_start_address_cr])
+#define RPT_E 	(STATE_CPU (sd, 0)->regs.control[repeat_end_address_cr])
+#define MOD_S 	(STATE_CPU (sd, 0)->regs.control[modulo_start_address_cr])
+#define MOD_E 	(STATE_CPU (sd, 0)->regs.control[modulo_end_address_cr])
+#define IBA 	(STATE_CPU (sd, 0)->regs.control[instruction_break_address_cr])
+#define EIT_VB	(STATE_CPU (sd, 0)->regs.control[eit_vector_base_cr])
+#define GPR	(STATE_CPU (sd, 0)->regs.general_purpose)
+#define GPR_SET(N,VAL) (GPR[(N)] = (VAL))
+#define ACC	(STATE_CPU (sd, 0)->regs.accumulator)
+#define CREG	(STATE_CPU (sd, 0)->regs.control)
+#define SP      (GPR[STACK_POINTER_GPR])
+#define TRACE_CALL_P (STATE_CPU (sd, 0)->trace_call_p)
+#define TRACE_TRAP_P (STATE_CPU (sd, 0)->trace_trap_p)
+#define TRACE_ACTION (STATE_CPU (sd, 0)->trace_action)
+#define     TRACE_ACTION_CALL	0x00000001	/* call occurred */
+#define     TRACE_ACTION_RETURN	0x00000002	/* return occurred */
+
+#define WRITE32 (STATE_CPU (sd, 0)->write32)
+#define WRITE32_NUM	 (WRITE32.num)
+#define WRITE32_PTR(N)	 (WRITE32.ptr[N])
+#define WRITE32_MASK(N)	 (WRITE32.mask[N])
+#define WRITE32_VALUE(N) (WRITE32.value[N])
+#define WRITE32_QUEUE(PTR, VALUE) WRITE32_QUEUE_MASK (PTR, VALUE, 0xffffffff)
+
+#define WRITE32_QUEUE_MASK(PTR, VALUE, MASK)				\
+do {									\
+  int _num = WRITE32_NUM;						\
+  if (_num >= MAX_WRITE32)						\
+    sim_engine_abort (sd, STATE_CPU (sd, 0), cia,			\
+		      "Too many queued 32-bit writes");			\
+  WRITE32_PTR(_num) = PTR;						\
+  WRITE32_VALUE(_num) = VALUE;						\
+  WRITE32_MASK(_num) = MASK;						\
+  WRITE32_NUM = _num+1;							\
+} while (0)
+
+#define DID_TRAP	(STATE_CPU (sd, 0)->did_trap)
+
+#define WRITE64 (STATE_CPU (sd, 0)->write64)
+#define WRITE64_NUM	 (WRITE64.num)
+#define WRITE64_PTR(N)	 (WRITE64.ptr[N])
+#define WRITE64_VALUE(N) (WRITE64.value[N])
+#define WRITE64_QUEUE(PTR, VALUE)					\
+do {									\
+  int _num = WRITE64_NUM;						\
+  if (_num >= MAX_WRITE64)						\
+    sim_engine_abort (sd, STATE_CPU (sd, 0), cia,			\
+		      "Too many queued 64-bit writes");			\
+  WRITE64_PTR(_num) = PTR;						\
+  WRITE64_VALUE(_num) = VALUE;						\
+  WRITE64_NUM = _num+1;							\
+} while (0)
+
+#define DPSW_VALID	0xbf005555
+#define PSW_VALID	0xb7005555
+#define EIT_VALID	0xfffff000	/* From page 7-4 of D30V/MPEG arch. manual  */
+#define EIT_VB_DEFAULT	0xfffff000	/* Value of the EIT_VB register after reset */
+
+/* Verify that the instruction is in the correct slot */
+
+#define IS_WRONG_SLOT is_wrong_slot(sd, cia, MY_INDEX)
+extern int is_wrong_slot
+(SIM_DESC sd,
+ address_word cia,
+ itable_index index);
+
+#define IS_CONDITION_OK is_condition_ok(sd, cia, CCC)
+extern int is_condition_ok
+(SIM_DESC sd,
+ address_word cia,
+ int cond);
+
+#define SIM_HAVE_BREAKPOINTS	/* Turn on internal breakpoint module */
+
+/* Internal breakpoint instruction is syscall 5 */
+#define SIM_BREAKPOINT {0x0e, 0x00, 0x00, 0x05}
+#define SIM_BREAKPOINT_SIZE (4)
+
+/* Call occurred */
+extern void call_occurred
+(SIM_DESC sd,
+ sim_cpu *cpu,
+ address_word cia,
+ address_word nia);
+
+/* Return occurred */
+extern void return_occurred
+(SIM_DESC sd,
+ sim_cpu *cpu,
+ address_word cia,
+ address_word nia);
+
+/* Whether to do call tracing.  */
+extern int d30v_call_trace_p;
+
+/* Read/write functions for system call interface.  */
+extern int d30v_read_mem
+(host_callback *cb,
+ struct cb_syscall *sc,
+ unsigned long taddr,
+ char *buf,
+ int bytes);
+
+extern int d30v_write_mem
+(host_callback *cb,
+ struct cb_syscall *sc,
+ unsigned long taddr,
+ const char *buf,
+ int bytes);
+
+#endif /* _CPU_H_ */
diff --git a/sim/d30v/d30v-insns b/sim/d30v/d30v-insns
new file mode 100644
index 0000000..6dc4f6b
--- /dev/null
+++ b/sim/d30v/d30v-insns
@@ -0,0 +1,2422 @@
+//  -*- C -*-
+//  Mitsubishi Electric Corp. D30V Simulator.
+//  Copyright (C) 1997, Free Software Foundation, Inc.
+//  Contributed by Cygnus Solutions Inc.
+//
+//  This file is part of GDB, the GNU debugger.
+//
+//  This program is free software; you can redistribute it and/or modify
+//  it under the terms of the GNU General Public License as published by
+//  the Free Software Foundation; either version 2 of the License, or
+//  (at your option) any later version.
+//
+//  This program is distributed in the hope that it will be useful,
+//  but WITHOUT ANY WARRANTY; without even the implied warranty of
+//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//  GNU General Public License for more details.
+//
+//  You should have received a copy of the GNU General Public License
+//  along with this program; if not, write to the Free Software
+//  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+
+
+define( _BRA,  `1.*,CCC,000')
+define( _LOGIC, `1.*,CCC,001')
+define( _IMEM, `1.*,CCC,010')
+define( _IALU1, `1.*,CCC,100')
+define(_IALU2, `1.*,CCC,101')
+
+
+
+define(_IMM6, `6.IMM_6S')
+define(_IMM12, `12.IMM_12S')
+define(_IMM18, `18.IMM_18S')
+define(_IMM32, `6.IMM_6L,*,000,8.IMM_8L,00,18.IMM_18L')
+
+
+
+// The following is called when ever an illegal instruction is
+// encountered
+::internal::illegal
+	sim_io_eprintf (sd, "illegal instruction at 0x%lx\n", cia);
+	sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL);
+
+// The following is called when ever an instruction in the wrong
+// slot is encountered.
+::internal::wrong_slot
+	sim_io_eprintf (sd, "wrong slot at 0x%lx\n", cia);
+	sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL);
+
+
+
+// Something illegal that can be used to contact the simulator emul
+// library.
+define(_EMUL, `1.*,CCC,111')
+
+void::function::do_emul:int imm
+	/* temp hack - later replace with real interface */
+	enum {
+	  param1 = 2, param2, param3, param4
+	};
+	switch (imm) {
+	case 0:
+	  {
+	    sim_engine_abort (SD, CPU, cia, "UNIX call emulation unsupported");
+	    break;
+	  }
+	case 1:
+	  /* Trap 1 - prints a string */
+	  {
+	    address_word str = GPR[param1];
+	    char chr;
+	    while (1) {
+	      chr = MEM (unsigned, str, 1);
+	    if (chr == '\0') break;
+	      sim_io_write_stdout (sd, &chr, sizeof chr);
+	      str++;
+	    }
+	    break;
+	  }
+	case 3:
+	  /* Trap 3 - writes a character */
+	  {
+	    char chr = GPR[param1];
+	    sim_io_write_stdout (sd, &chr, sizeof chr);
+	    break;
+	  }
+	case 4:
+	  /* Trap 4 exits with status in [param1] */
+	  {
+	    sim_engine_halt (SD, CPU, NULL, cia, sim_exited, GPR[param1]);
+	    break;
+	  }
+	case 5:
+	  /* Trap 5 breakpoints.  If the breakpoint system knows about this, it
+	     won't return.  Otherwise, we fall through to treat this as an
+	     unknown instruction.  */
+	  {
+	    sim_handle_breakpoint (SD, CPU, cia);
+	  /* Fall through to default case.*/
+	  }
+	default:
+	  sim_engine_abort (SD, CPU, cia, "Unknown monitor call %d", imm);
+	}
+
+_EMUL,00000,00,6.*,6.*,IMM_6S:EMUL:short,emul:iu,mu:EMUL
+"syscall <imm>"
+	do_emul (_SD, imm);
+_BRA,00000,00,6.**,6.**,_IMM32:BRA:long:iu,mu:EMUL long
+"syscall <imm>"
+	do_emul (_SD, imm);
+
+// ABS
+
+_IALU1,01000,00,6.RA,6.RB,6.**:IALU1:short:iu,mu:ABS
+"abs r<RA>, r<RB>"
+	WRITE32_QUEUE (Ra, abs(Rb));
+
+
+
+// ADD
+
+void::function::do_add:unsigned32 *ra, unsigned32 rb, unsigned32 imm
+	ALU_BEGIN(rb);
+	ALU_ADDC(imm);
+	ALU_END(ra);
+
+_IALU1,00000,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD
+"add r<RA>, r<RB>, r<RC>"
+	do_add (_SD, Ra, Rb, Rc);
+_IALU1,00000,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD imm
+"add r<RA>, r<RB>, <imm>"
+	do_add (_SD, Ra, Rb, imm);
+_IALU1,00000,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD imm long
+"add r<RA>, r<RB>, <imm>"
+	do_add (_SD, Ra, Rb, imm);
+
+
+
+// ADD2H
+
+void::function::do_add2h:signed32 *ra, signed32 rb, signed32 imm
+	unsigned16 ah2 = VH2_4(rb) + VH2_4(imm);
+	unsigned16 al2 = VL2_4(rb) + VL2_4(imm);
+	WRITE32_QUEUE (ra, (ah2 << 16) | al2);
+
+_IALU1,00001,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD2H
+"add2h r<RA>, r<RB>, r<RC>"
+	do_add2h (_SD, Ra, Rb, Rc);
+_IALU1,00001,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD2H imm
+"add2h r<RA>, r<RB>, <imm>"
+	do_add2h (_SD, Ra, Rb, immHL);
+_IALU1,00001,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD2H imm long
+"add2h r<RA>, r<RB>, <imm>"
+	do_add2h (_SD, Ra, Rb, imm);
+
+
+
+// ADDC
+
+void::function::do_addc:unsigned32 *ra, unsigned32 rb, unsigned32 imm
+	ALU_BEGIN(rb);
+	ALU_ADDC_C(imm, ALU_CARRY);
+	ALU_END(ra);
+
+_IALU1,00100,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDC
+"addc r<RA>, r<RB>, r<RC>"
+	do_addc (_SD, Ra, Rb, Rc);
+_IALU1,00100,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDC imm
+"addc r<RA>, r<RB>, <imm>"
+	do_addc (_SD, Ra, Rb, imm);
+_IALU1,00100,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDC imm long
+"addc r<RA>, r<RB>, <imm>"
+	do_addc (_SD, Ra, Rb, imm);
+
+
+
+// ADDHppp
+
+void::function::do_addh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src
+	switch (ppp) {
+	case 0x0: /* LLL */
+	  {
+	  ALU16_BEGIN(VL2_4(rb));
+	  ALU16_ADDC(VL2_4(src));
+	  ALU16_END(ra, 0);
+	  }
+	  break;
+	case 0x1: /* LLH */
+	  {
+	  ALU16_BEGIN(VL2_4(rb));
+	  ALU16_ADDC(VH2_4(src));
+	  ALU16_END(ra, 0);
+	  }
+	  break;
+	case 0x2: /* LHL */
+	  {
+	  ALU16_BEGIN(VH2_4(rb));
+	  ALU16_ADDC(VL2_4(src));
+	  ALU16_END(ra, 0);
+	  }
+	  break;
+	case 0x3: /* LHH */
+	  {
+	  ALU16_BEGIN(VH2_4(rb));
+	  ALU16_ADDC(VH2_4(src));
+	  ALU16_END(ra, 0);
+	  }
+	  break;
+	case 0x4: /* HLL */
+	  {
+	  ALU16_BEGIN(VL2_4(rb));
+	  ALU16_ADDC(VL2_4(src));
+	  ALU16_END(ra, 1);
+	  }
+	  break;
+	case 0x5: /* HLH */
+	  {
+	  ALU16_BEGIN(VL2_4(rb));
+	  ALU16_ADDC(VH2_4(src));
+	  ALU16_END(ra, 1);
+	  }
+	  break;
+	case 0x6: /* HHL */
+	  {
+	  ALU16_BEGIN(VH2_4(rb));
+	  ALU16_ADDC(VL2_4(src));
+	  ALU16_END(ra, 1);
+	  }
+	  break;
+	case 0x7: /* HHH */
+	  {	
+	  ALU16_BEGIN(VH2_4(rb));
+	  ALU16_ADDC(VH2_4(src));
+	  ALU16_END(ra, 1);
+	  }
+	  break;
+	default:
+	  sim_engine_abort (SD, CPU, cia, "do_addh_ppp - internal error - bad switch");
+	}
+::%s::ppp:int ppp
+	switch (ppp)
+	  {
+	  case 0x0: return "lll";
+	  case 0x1: return "llh";
+	  case 0x2: return "lhl";
+	  case 0x3: return "lhh";
+	  case 0x4: return "hll";
+	  case 0x5: return "hlh";
+	  case 0x6: return "hhl";
+	  case 0x7: return "hhh";
+	  default: return "?";
+	  }
+
+_IALU1,10,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDHppp
+"addh%s<ppp> r<RA>, r<RB>, r<RC>"
+	do_addh_ppp(_SD, ppp, Ra, Rb, Rc);
+_IALU1,10,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDHppp imm
+"addh%s<ppp> r<RA>, r<RB>, <imm>"
+	do_addh_ppp(_SD, ppp, Ra, Rb, immHL);
+_IALU1,10,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDHppp imm long
+"addh%s<ppp> r<RA>, r<RB>, <imm>"
+	do_addh_ppp(_SD, ppp, Ra, Rb, imm);
+
+
+
+// ADDS
+
+void::function::do_adds:unsigned32 *ra, unsigned32 rb, unsigned32 imm
+	ALU_BEGIN(rb);
+	ALU_ADDC(EXTRACTED32(imm, 0, 0));
+	ALU_END(ra);
+
+_IALU1,00110,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS
+"adds r<RA>, r<RB>, r<RC>"
+	do_adds (_SD, Ra, Rb, Rc);
+_IALU1,00110,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS imm
+"adds r<RA>, r<RB>, <imm>"
+	do_adds (_SD, Ra, Rb, imm);
+_IALU1,00110,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS imm long
+"adds r<RA>, r<RB>, <imm>"
+	do_adds (_SD, Ra, Rb, imm);
+
+
+
+// ADDS2H
+
+void::function::do_adds2h:unsigned32 *ra, unsigned32 rb, unsigned32 immHL
+	unsigned16 high = VH2_4(rb) + EXTRACTED32(immHL, 0, 0);
+	unsigned16 low = VL2_4(rb) + EXTRACTED32(immHL, 16, 16);
+	WRITE32_QUEUE (ra, (high << 16) | low);
+
+_IALU1,00111,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS2H
+"adds2h r<RA>, r<RB>, r<RC>"
+	do_adds2h (_SD, Ra, Rb, Rc);
+_IALU1,00111,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS2H imm
+"adds2h r<RA>, r<RB>, <imm>"
+	do_adds2h (_SD, Ra, Rb, immHL);
+_IALU1,00111,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS2H imm long
+"adds2h r<RA>, r<RB>, <imm>"
+	do_adds2h (_SD, Ra, Rb, imm);
+
+
+
+// AND
+
+_LOGIC,11000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:AND
+"and r<RA>, r<RB>, r<RC>"
+	WRITE32_QUEUE (Ra, Rb & Rc);
+_LOGIC,11000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:AND imm
+"and r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, Rb & imm);
+_LOGIC,11000,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:AND imm long
+"and r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, Rb & imm);
+
+
+// ANDFG
+
+_LOGIC,01000,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:Logical AND Flags
+"andfg f<FA>, f<FB>, f<FC>"
+	PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & PSW_FLAG_VAL(FC));
+_LOGIC,01000,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:Logical AND Flags imm
+"andfg f<FA>, f<FB>, <imm_6>"
+	PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & (imm_6 & 1));
+
+
+
+// AVG
+
+void::function::do_avg:unsigned32 *ra, unsigned32 rb, unsigned32 imm
+	WRITE32_QUEUE (ra, ((signed64)(signed32)rb + (signed64)(signed32)imm + 1) >> 1);
+
+_IALU1,01010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG
+"avg r<RA>, r<RB>, r<RC>"
+	do_avg (_SD, Ra, Rb, Rc);
+_IALU1,01010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG imm
+"avg r<RA>, r<RB>, <imm>"
+	do_avg (_SD, Ra, Rb, imm);
+_IALU1,01010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG imm long
+"avg r<RA>, r<RB>, <imm>"
+	do_avg (_SD, Ra, Rb, imm);
+
+
+
+// AVG2H
+
+void::function::do_avg2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm
+	unsigned16 high = ((signed32)(signed16)VH2_4(rb) + (signed32)(signed16)VH2_4(imm) + 1) >> 1;
+	unsigned16 low  = ((signed32)(signed16)VL2_4(rb) + (signed32)(signed16)VL2_4(imm) + 1) >> 1;
+	WRITE32_QUEUE (ra, (high << 16) | low);
+
+_IALU1,01011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG2H
+"avg2h r<RA>, r<RB>, r<RC>"
+	do_avg2h (_SD, Ra, Rb, Rc);
+_IALU1,01011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG2H imm
+"avg2h r<RA>, r<RB>, <imm>"
+	do_avg2h (_SD, Ra, Rb, immHL);
+_IALU1,01011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG2H imm long
+"avg2h r<RA>, r<RB>, <imm>"
+	do_avg2h (_SD, Ra, Rb, imm);
+
+
+
+// BCLR
+
+_LOGIC,00011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BCLR
+"bclr r<RA>, r<RB>, r<RC>"
+	WRITE32_QUEUE(Ra, Rb & ~BIT32((Rc) % 32));
+_LOGIC,00011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BCLR imm
+"bclr r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE(Ra, Rb & ~BIT32((imm) % 32));
+
+
+
+// BNOT
+
+_LOGIC,00001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BNOT
+"bnot r<RA>, r<RB>, r<RC>"
+	WRITE32_QUEUE (Ra, Rb ^ BIT32((Rc) % 32));
+_LOGIC,00001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BNOT imm
+"bnot r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, Rb ^ BIT32((imm) % 32));
+
+
+
+// BRA
+
+_BRA,00000,00,6.**,6.**,6.RC:BRA:short:mu:BRA
+"bra r<RC>"
+	nia = cia + pcdisp;
+_BRA,00000,10,_IMM18:BRA:short:mu:BRA imm
+"bra <pcdisp>"
+	nia = cia + pcdisp;
+_BRA,00000,10,6.**,6.**,_IMM32:BRA:long:mu:BRA imm long
+"bra <pcdisp>"
+	nia = cia + pcdisp;
+
+
+
+// BRATNZ
+
+_BRA,00100,01,6.RA,6.**,6.RC:BRA:short:mu:BRATNZ
+"bratnz r<RC>"
+	if (*Ra != 0)
+	  nia = cia + pcdisp;
+_BRA,00100,11,6.RA,_IMM12:BRA:short:mu:BRATNZ imm
+"bratnz <pcdisp>"
+	if (*Ra != 0)
+	  nia = cia + pcdisp;
+_BRA,00100,11,6.RA,6.**,_IMM32:BRA:long:mu:BRATNZ imm long
+"bratnz <pcdisp>"
+	if (*Ra != 0)
+	  nia = cia + pcdisp;
+
+
+
+// BRATZR
+
+_BRA,00100,00,6.RA,6.**,6.RC:BRA:short:mu:BRATZR
+"bratzr r<RC>"
+	if (val_Ra == 0)
+	  nia = cia + pcdisp;
+_BRA,00100,10,6.RA,_IMM12:BRA:short:mu:BRATZR imm
+"bratzr <pcdisp>"
+	if (val_Ra == 0)
+	  nia = cia + pcdisp;
+_BRA,00100,10,6.RA,6.**,_IMM32:BRA:long:mu:BRATZR imm long
+"bratzr <pcdisp>"
+	if (val_Ra == 0)
+	  nia = cia + pcdisp;
+
+
+
+// BSET
+
+_LOGIC,00010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BSET
+"bset r<RA>, r<RB>, r<RC>"
+	WRITE32_QUEUE (Ra, Rb | BIT32((Rc) % 32));
+_LOGIC,00010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BSET imm
+"bset r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, Rb | BIT32((imm) % 32));
+
+
+
+// BSR
+
+_BRA,00010,00,6.**,6.**,6.RC:BRA:short:mu:BSR
+"bsr r<RC>"
+	if (cia == RPT_E && PSW_VAL (PSW_RP))
+	  WRITE32_QUEUE (&GPR[62], RPT_S);
+	else
+	  WRITE32_QUEUE (&GPR[62], cia + 8);
+	nia = cia + pcdisp;
+	if (TRACE_CALL_P)
+	  TRACE_ACTION |= TRACE_ACTION_CALL;
+_BRA,00010,10,_IMM18:BRA:short:mu:BSR imm
+"bsr <pcdisp>"
+	if (cia == RPT_E && PSW_VAL (PSW_RP))
+	  WRITE32_QUEUE (&GPR[62], RPT_S);
+	else
+	  WRITE32_QUEUE (&GPR[62], cia + 8);
+	nia = cia + pcdisp;
+	if (TRACE_CALL_P)
+	  TRACE_ACTION |= TRACE_ACTION_CALL;
+_BRA,00010,10,6.**,6.**,_IMM32:BRA:long:mu:BSR imm long
+"bsr <pcdisp>"
+	if (cia == RPT_E && PSW_VAL (PSW_RP))
+	  WRITE32_QUEUE (&GPR[62], RPT_S);
+	else
+	  WRITE32_QUEUE (&GPR[62], cia + 8);
+	nia = cia + pcdisp;
+	if (TRACE_CALL_P)
+	  TRACE_ACTION |= TRACE_ACTION_CALL;
+
+
+// BSRTNZ
+
+_BRA,00110,01,6.RA,6.**,6.RC:BRA:short:mu:BSRTNZ
+"bsrtnz r<RC>"
+	if (val_Ra != 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = cia + pcdisp;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+
+_BRA,00110,11,6.RA,_IMM12:BRA:short:mu:BSRTNZ imm
+"bsrtnz <pcdisp>"
+	if (val_Ra != 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = cia + pcdisp;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+
+_BRA,00110,11,6.RA,6.**,_IMM32:BRA:long:mu:BSRTNZ imm long
+"bsrtnz <pcdisp>"
+	if (val_Ra != 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = cia + pcdisp;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+
+
+// BSRTZR
+
+_BRA,00110,00,6.RA,6.**,6.RC:BRA:short:mu:BSRTZR
+"bsrtzr r<RC>"
+	if (val_Ra == 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = cia + pcdisp;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+
+_BRA,00110,10,6.RA,_IMM12:BRA:short:mu:BSRTZR imm
+"bsrtzr <pcdisp>"
+	if (val_Ra == 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = cia + pcdisp;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+
+_BRA,00110,10,6.RA,6.**,_IMM32:BRA:long:mu:BSRTZR imm long
+"bsrtzr <pcdisp>"
+	if (val_Ra == 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = cia + pcdisp;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+
+
+// BTST
+
+_LOGIC,00000,00,***,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:BTST
+"btst f<FA>, r<RB>, r<RC>"
+	int bit = (Rc) % 32;
+	PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit));
+_LOGIC,00000,10,***,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:BTST imm
+"btst f<FA>, r<RB>, <imm>"
+	int bit = imm % 32;
+	PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit));
+
+
+
+// CMPcc
+
+void::function::do_cmp_cc:int cc, int fa, signed32 rb, signed32 rc
+	int value = 0;
+	switch (cc) {
+	case 0: /* EQ */
+	  value = (rb == rc);
+	  break;
+	case 1: /* NE */
+	  value = (rb != rc);
+	  break;
+	case 2: /* GT */
+	  value = (rb > rc);
+	  break;
+	case 3: /* GE */
+	  value = (rb >= rc);
+	  break;
+	case 4: /* LT */
+	  value = (rb < rc);
+	  break;
+	case 5: /* LE */
+	  value = (rb <= rc);
+	  break;
+	case 6: /* PS */
+	  value = ((rb >= 0) && (rc >= 0));
+	  break;
+	case 7: /* NG */
+	  value = ((rb < 0) && (rc < 0));
+	  break;
+	default:
+	  sim_engine_abort (SD, CPU, cia, "do_cmp_cc - internal error - bad switch (%d)", cc);
+	}
+	PSW_FLAG_SET_QUEUE(fa, value);
+
+::%s::ccc:int ccc
+	switch (ccc)
+	  {
+	  case 0: return "eq";
+	  case 1: return "ne";
+	  case 2: return "gt";
+	  case 3: return "ge";
+	  case 4: return "lt";
+	  case 5: return "le";
+	  case 6: return "ps";
+	  case 7: return "ng";
+	  default: return "?";
+	  }
+
+_LOGIC,01100,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPcc
+"cmp%s<ccc> f<FA>, r<RB>, r<RC>"
+	do_cmp_cc(_SD, ccc, FA, Rb, Rc);
+_LOGIC,01100,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPcc imm
+"cmp%s<ccc> f<FA>, r<RB>, <imm>"
+	do_cmp_cc(_SD, ccc, FA, Rb, imm);
+_LOGIC,01100,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPcc imm long
+"cmp%s<ccc> f<FA>, r<RB>, <imm>"
+	do_cmp_cc(_SD, ccc, FA, Rb, imm);
+
+
+
+// CMPUcc
+
+void::function::do_cmpu_cc:int cc, int fa, unsigned32 rb, unsigned32 rc
+	int value = 0;
+	switch (cc) {
+	case 2: /* GT */
+	  value = (rb > rc);
+	  break;
+	case 3: /* GE */
+	  value = (rb >= rc);
+	  break;
+	case 4: /* LT */
+	  value = (rb < rc);
+	  break;
+	case 5: /* LE */
+	  value = (rb <= rc);
+	  break;
+	default:
+	  sim_engine_abort (SD, CPU, cia, "do_cmpu_cc - internal error - bad switch (%d)", cc);
+	}
+	PSW_FLAG_SET_QUEUE(fa, value);
+
+_LOGIC,01101,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPUcc
+"cmpu%s<ccc> f<FA>, r<RB>, r<RC>"
+	do_cmpu_cc(_SD, ccc, FA, Rb, Rc);
+_LOGIC,01101,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPUcc imm
+"cmpu%s<ccc> f<FA>, r<RB>, <imm>"
+	do_cmpu_cc(_SD, ccc, FA, Rb, imm_6u);
+_LOGIC,01101,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPUcc imm long
+"cmpu%s<ccc> f<FA>, r<RB>, <imm>"
+	do_cmpu_cc(_SD, ccc, FA, Rb, imm);
+
+
+
+// DBRA
+
+void::function::do_dbra:address_word pcdisp, unsigned32 ra
+	PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, 1);
+	WRITE32_QUEUE (&RPT_S, cia + pcdisp);
+	WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
+
+_BRA,10000,00,6.RA,6.**,6.RC:BRA:short:mu:DBRA
+"dbra r<RA>, r<RC>"
+	do_dbra(_SD, pcdisp, val_Ra);
+_BRA,10000,10,6.RA,_IMM12:BRA:short:mu:DBRA imm
+"dbra r<RA>, <pcdisp>"
+	do_dbra(_SD, pcdisp, val_Ra);
+_BRA,10000,10,6.RA,6.**,_IMM32:BRA:long:mu:DBRA imm long
+"dbra r<RA>, <pcdisp>"
+	do_dbra(_SD, pcdisp, val_Ra);
+
+
+
+// DBRAI
+
+void::function::do_dbrai:address_word pcdisp, unsigned32 imm
+	PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, 1);
+	WRITE32_QUEUE (&RPT_S, cia + pcdisp);
+	WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
+
+_BRA,10100,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBRAI
+"dbrai <IMM_6>, r<RC>"
+	do_dbrai(_SD, pcdisp, IMM_6);
+_BRA,10100,10,6.IMM_6,_IMM12:BRA:short:mu:DBRAI imm
+"dbrai <IMM_6>, <pcdisp>"
+	do_dbrai(_SD, pcdisp, IMM_6);
+_BRA,10100,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBRAI imm long
+"dbrai <IMM_6>, <pcdisp>"
+	do_dbrai(_SD, pcdisp, IMM_6);
+
+
+
+// DBSR
+
+void::function::do_dbsr:address_word pcdisp, unsigned32 ra
+	PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, 1);
+	WRITE32_QUEUE (&RPT_S, cia + pcdisp);
+	WRITE32_QUEUE (&RPT_E, cia + ra);
+	WRITE32_QUEUE (&GPR[62], cia + ra + 8);
+
+_BRA,10010,00,6.RA,6.**,6.RC:BRA:short:mu:DBSR
+"dbsr r<RA>, r<RC>"
+	do_dbsr(_SD, pcdisp, val_Ra);
+_BRA,10010,10,6.RA,_IMM12:BRA:short:mu:DBSR imm
+"dbsr r<RA>, <pcdisp>"
+	do_dbsr(_SD, pcdisp, val_Ra);
+_BRA,10010,10,6.RA,6.**,_IMM32:BRA:long:mu:DBSR imm long
+"dbsr r<RA>, <pcdisp>"
+	do_dbsr(_SD, pcdisp, val_Ra);
+
+
+
+// DBSRI
+
+void::function::do_dbsri:address_word pcdisp, unsigned32 imm
+	PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, 1);
+	WRITE32_QUEUE (&RPT_S, cia + pcdisp);
+	WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
+	WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8);
+
+_BRA,10110,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBSRI
+"dbsri <IMM_6>, r<RC>"
+	do_dbsri(_SD, pcdisp, IMM_6);
+_BRA,10110,10,6.IMM_6,_IMM12:BRA:short:mu:DBSRI imm
+"dbsri <IMM_6>, <pcdisp>"
+	do_dbsri(_SD, pcdisp, IMM_6);
+_BRA,10110,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBSRI imm long
+"dbsri <IMM_6>, <pcdisp>"
+	do_dbsri(_SD, pcdisp, IMM_6);
+
+
+
+// DBT
+
+
+_BRA,01011,00,6.**,6.**,6.**:BRA:short:mu:DBT
+"dbt"
+	if (cia == RPT_E && PSW_VAL (PSW_RP))
+	  {
+	    WRITE32_QUEUE (&DPC, RPT_S);
+	    if (RPT_C == 0)
+	      PSW_SET (PSW_RP, 0);
+	  }
+	else
+	  WRITE32_QUEUE (&DPC, cia + 8);
+	DID_TRAP = 2;
+	nia = 0xfffff120; /* debug_trap_address */
+
+// DJMP
+
+void::function::do_djmp:address_word pcdisp, unsigned32 ra
+	PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, 1);
+	WRITE32_QUEUE (&RPT_S, pcdisp);
+	WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
+
+_BRA,10001,00,6.RA,6.**,6.RC:BRA:short:mu:DJMP
+"djmp r<RA>, r<RC>"
+	do_djmp(_SD, pcdisp, val_Ra);
+_BRA,10001,10,6.RA,_IMM12:BRA:short:mu:DJMP imm
+"djmp r<RA>, <pcdisp>"
+	do_djmp(_SD, pcdisp, val_Ra);
+_BRA,10001,10,6.RA,6.**,_IMM32:BRA:long:mu:DJMP imm long
+"djmp r<RA>, <pcdisp>"
+	do_djmp(_SD, pcdisp, val_Ra);
+
+
+
+// DJMPI
+
+void::function::do_djmpi:address_word pcdisp, unsigned32 imm
+	PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, 1);
+	WRITE32_QUEUE (&RPT_S, pcdisp);
+	WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
+
+_BRA,10101,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJMPI
+"djmpi <IMM_6>, r<RC>"
+	do_djmpi(_SD, pcdisp, IMM_6);
+_BRA,10101,10,6.IMM_6,_IMM12:BRA:short:mu:DJMPI imm
+"djmpi <IMM_6>, <pcdisp>"
+	do_djmpi(_SD, pcdisp, IMM_6);
+_BRA,10101,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJMPI imm long
+"djmpi <IMM_6>, <pcdisp>"
+	do_djmpi(_SD, pcdisp, IMM_6);
+
+
+
+// DJSR
+
+void::function::do_djsr:address_word pcdisp, unsigned32 ra
+	PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, 1);
+	WRITE32_QUEUE (&RPT_S, pcdisp);
+	WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
+	WRITE32_QUEUE (&GPR[62], cia + (ra & ~0x7) + 8);
+
+_BRA,10011,00,6.RA,6.**,6.RC:BRA:short:mu:DJSR
+"djsr r<RA>, r<RC>"
+	do_djsr(_SD, pcdisp, val_Ra);
+_BRA,10011,10,6.RA,_IMM12:BRA:short:mu:DJSR imm
+"djsr r<RA>, <pcdisp>"
+	do_djsr(_SD, pcdisp, val_Ra);
+_BRA,10011,10,6.RA,6.**,_IMM32:BRA:long:mu:DJSR imm long
+"djsr r<RA>, <pcdisp>"
+	do_djsr(_SD, pcdisp, val_Ra);
+
+
+
+// DJSRI
+
+void::function::do_djsri:address_word pcdisp, unsigned32 imm
+	PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, 1);
+	WRITE32_QUEUE (&RPT_S, pcdisp);
+	WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
+	WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8);
+
+_BRA,10111,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJSRI
+"djsri <IMM_6>, r<RC>"
+	do_djsri(_SD, pcdisp, IMM_6);
+_BRA,10111,10,6.IMM_6,_IMM12:BRA:short:mu:DJSRI imm
+"djsri <IMM_6>, <pcdisp>"
+	do_djsri(_SD, pcdisp, IMM_6);
+_BRA,10111,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJSRI imm long
+"djsri <IMM_6>, <pcdisp>"
+	do_djsri(_SD, pcdisp, IMM_6);
+
+
+
+// JMP
+
+_BRA,00001,00,6.**,6.**,6.RC:BRA:short:mu:JMP
+"jmp r<RC>"
+	nia = pcaddr;
+	if (RC == 62 && TRACE_CALL_P)
+	  TRACE_ACTION |= TRACE_ACTION_RETURN;
+_BRA,00001,10,_IMM18:BRA:short:mu:JMP imm
+"jmp <pcdisp>"
+	nia = pcaddr;
+_BRA,00001,10,6.**,6.**,_IMM32:BRA:long:mu:JMP imm long
+"jmp <pcdisp>"
+	nia = pcaddr;
+
+
+
+// JMPTNZ
+
+_BRA,00101,01,6.RA,6.**,6.RC:BRA:short:mu:JMPTNZ
+"jmptnz r<RC>"
+	if (val_Ra != 0)
+	  nia = pcaddr;
+_BRA,00101,11,6.RA,_IMM12:BRA:short:mu:JMPTNZ imm
+"jmptnz <pcdisp>"
+	if (val_Ra != 0)
+	  nia = pcaddr;
+_BRA,00101,11,6.RA,6.**,_IMM32:BRA:long:mu:JMPTNZ imm long
+"jmptnz <pcdisp>"
+	if (val_Ra != 0)
+	  nia = pcaddr;
+
+
+
+// JMPTZR
+
+_BRA,00101,00,6.RA,6.**,6.RC:BRA:short:mu:JMPTZR
+"jmptzr r<RC>"
+	if (val_Ra == 0)
+	  nia = pcaddr;
+_BRA,00101,10,6.RA,_IMM12:BRA:short:mu:JMPTZR imm
+"jmptzr <pcdisp>"
+	if (val_Ra == 0)
+	  nia = pcaddr;
+_BRA,00101,10,6.RA,6.**,_IMM32:BRA:long:mu:JMPTZR imm long
+"jmptzr <pcdisp>"
+	if (val_Ra == 0)
+	  nia = pcaddr;
+
+
+
+// JOINpp 
+
+void::function::do_join_pp:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src
+	switch (pp) {
+	case 0x0: /* LL */
+	  WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VL2_4(src));
+	  break;
+	case 0x1: /* LH */
+	  WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VH2_4(src));
+	  break;
+	case 0x2: /* HL */
+	  WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VL2_4(src));
+	  break;
+	case 0x3: /* HH */
+	  WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VH2_4(src));
+	  break;
+	}
+
+::%s::pp:int pp
+	switch (pp)
+	  {
+	  case 0x0: return "ll";
+	  case 0x1: return "lh";
+	  case 0x2: return "hl";
+	  case 0x3: return "hh";
+	  default: return "?";
+	  }
+
+_IALU1,011,pp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:JOINpp
+"join%s<pp> r<RA>, r<RB>, r<RC>"
+	do_join_pp(_SD, pp, Ra, Rb, Rc);
+_IALU1,011,pp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:JOINpp imm
+"join%s<pp> r<RA>, r<RB>, <imm>"
+	do_join_pp(_SD, pp, Ra, Rb, immHL);
+_IALU1,011,pp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:JOINpp imm long
+"join%s<pp> r<RA>, r<RB>, <imm>"
+	do_join_pp(_SD, pp, Ra, Rb, immHL);
+
+
+
+// JSR
+
+_BRA,00011,00,6.**,6.**,6.RC:BRA:short:mu:JSR
+"jsr r<RC>"
+	if (cia == RPT_E && PSW_VAL (PSW_RP))
+	  WRITE32_QUEUE (&GPR[62], RPT_S);
+	else
+	  WRITE32_QUEUE (&GPR[62], cia + 8);
+	if (TRACE_CALL_P)
+	  TRACE_ACTION |= TRACE_ACTION_CALL;
+	return pcaddr;
+_BRA,00011,10,_IMM18:BRA:short:mu:JSR imm
+"jsr <pcdisp>"
+	if (cia == RPT_E && PSW_VAL (PSW_RP))
+	  WRITE32_QUEUE (&GPR[62], RPT_S);
+	else
+	  WRITE32_QUEUE (&GPR[62], cia + 8);
+	if (TRACE_CALL_P)
+	  TRACE_ACTION |= TRACE_ACTION_CALL;
+	return pcaddr;
+_BRA,00011,10,6.**,6.**,_IMM32:BRA:long:mu:JSR imm long
+"jsr <pcdisp>"
+	if (cia == RPT_E && PSW_VAL (PSW_RP))
+	  WRITE32_QUEUE (&GPR[62], RPT_S);
+	else
+	  WRITE32_QUEUE (&GPR[62], cia + 8);
+	if (TRACE_CALL_P)
+	  TRACE_ACTION |= TRACE_ACTION_CALL;
+	return pcaddr;
+
+
+// JSRTNZ
+
+_BRA,00111,01,6.RA,6.**,6.RC:BRA:short:mu:JSRTNZ
+"jsrtnz r<RC>"
+	if (val_Ra != 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = pcaddr;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+_BRA,00111,11,6.RA,_IMM12:BRA:short:mu:JSRTNZ imm
+"jsrtnz <pcdisp>"
+	if (val_Ra != 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = pcaddr;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+_BRA,00111,11,6.RA,6.**,_IMM32:BRA:long:mu:JSRTNZ imm long
+"jsrtnz <pcdisp>"
+	if (val_Ra != 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = pcaddr;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+
+
+
+// JSRTZR
+
+_BRA,00111,00,6.RA,6.**,6.RC:BRA:short:mu:JSRTZR
+"jsrtzr r<RC>"
+	if (val_Ra == 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = pcaddr;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+_BRA,00111,10,6.RA,_IMM12:BRA:short:mu:JSRTZR imm
+"jsrtzr <pcdisp>"
+	if (val_Ra == 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = pcaddr;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+_BRA,00111,10,6.RA,6.**,_IMM32:BRA:long:mu:JSRTZR imm long
+"jsrtzr <pcdisp>"
+	if (val_Ra == 0) {
+	  if (cia == RPT_E && PSW_VAL (PSW_RP))
+	    WRITE32_QUEUE (&GPR[62], RPT_S);
+	  else
+	    WRITE32_QUEUE (&GPR[62], cia + 8);
+	  nia = pcaddr;
+	  if (TRACE_CALL_P)
+	    TRACE_ACTION |= TRACE_ACTION_CALL;
+	}
+
+
+
+// Post increment
+
+void::function::do_incr:int x, unsigned32 *rb, int delta
+	unsigned32 next_rb;
+	if (x == 1)
+	  next_rb = *rb + delta;
+	else if (x == 3)
+	  next_rb = *rb - delta;
+	else
+	  next_rb = *rb; /* value not used */
+	/* HW erratum: check value after incrementing */
+	if (next_rb == MOD_E
+	    && (x == 1 || x == 3)
+	    && (PSW_VAL(PSW_MD))) {
+	  WRITE32_QUEUE (rb, MOD_S);
+	}
+	else if (x == 1 || x == 3)
+	  WRITE32_QUEUE (rb, next_rb);
+
+// LD2H
+
+int::function::make_even_reg:int reg, const char *name
+	if (reg & 1)
+	  sim_engine_abort (SD, CPU, cia,
+			    "0x%lx:%s odd register (r%d) used in multi-word load/mulx2h",
+			    cia, name, reg);
+	return reg;
+
+void::function::do_ld2h:int ra, unsigned32 rb, unsigned32 src
+	signed32 mem;
+	ra = make_even_reg(_SD, ra, "LD2H");
+	mem = MEM(signed, rb + src, 4);
+	if (ra != 0)
+	{
+	  WRITE32_QUEUE (&GPR[ra + 0], SEXT32(EXTRACTED32(mem, 0, 15), 16));
+	  WRITE32_QUEUE (&GPR[ra + 1], SEXT32(EXTRACTED32(mem, 16, 31), 16));
+	}
+
+::%s::XX:int XX
+	switch (XX)
+	  {
+	  case 0: return "";
+	  case 1: return "+";
+	  case 3: return "-";
+	  default: return "?";
+	  }
+
+_IMEM,00011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD2H
+"ld2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ld2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ld2h(_SD, RA, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 4);
+_IMEM,00011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD2H long
+"ld2h r<RA>, @(r<RB>, <imm>)"
+	do_ld2h(_SD, RA, Rb, imm);
+
+
+
+// LD2W
+
+void::function::do_ld2w:int ra, unsigned32 rb, unsigned32 src
+	unsigned64 mem;
+	ra = make_even_reg(_SD, ra, "LD2W");
+	mem = MEM(unsigned, rb + src, 8);
+	if (ra != 0)
+	{
+	  WRITE32_QUEUE (&GPR[ra + 0], EXTRACTED64 (mem, 0, 31));
+	  WRITE32_QUEUE (&GPR[ra + 1], EXTRACTED64 (mem, 32, 63));
+	}
+
+_IMEM,00110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:L2W
+"ld2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ld2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ld2w(_SD, RA, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 8);
+_IMEM,00110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:L2W long
+"ld2w r<RA>, @(r<RB>, <imm>)"
+	do_ld2w(_SD, RA, Rb, imm);
+
+
+
+// LD4BH
+
+void::function::do_ld4bh:unsigned32 ra, unsigned32 rb, unsigned32 src
+	unsigned16 l1, l2, h1, h2;
+	unsigned32 mem;
+	ra = make_even_reg(_SD, ra, "LD4BH");
+	mem = MEM(unsigned, rb + src, 4);
+	h1 = SEXT16(EXTRACTED32(mem, 0, 7), 8);
+	l1 = SEXT16(EXTRACTED32(mem, 8, 15), 8);
+	h2 = SEXT16(EXTRACTED32(mem, 16, 23), 8);
+	l2 = SEXT16(EXTRACTED32(mem, 24, 31), 8);
+	if (ra != 0)
+	{
+	  WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1);
+	  WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2);
+	}
+
+_IMEM,00101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BH
+"ld4bh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ld4bh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ld4bh(_SD, RA, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 4);
+_IMEM,00101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BH long
+"ld4bh r<RA>, @(r<RB>, <imm>)"
+	do_ld4bh(_SD, RA, Rb, imm);
+
+
+
+// LD4BHU
+
+void::function::do_ld4bhu:unsigned32 ra, unsigned32 rb, unsigned32 src
+	unsigned16 l1, l2, h1, h2;
+	unsigned32 mem;
+	ra = make_even_reg(_SD, ra, "LD4BH");
+	mem = MEM(signed, rb + src, 4);
+	h1 = EXTRACTED32(mem, 0, 7);
+	l1 = EXTRACTED32(mem, 8, 15);
+	h2 = EXTRACTED32(mem, 16, 23);
+	l2 = EXTRACTED32(mem, 24, 31);
+	if (ra != 0)
+	{
+	  WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1);
+	  WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2);
+	}
+
+_IMEM,01101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BHU
+"ld4hbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ld4hbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ld4bhu(_SD, RA, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 4);
+_IMEM,01101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BHU long
+"ld4hbu r<RA>, @(r<RB>, <imm>)"
+	do_ld4bhu(_SD, RA, Rb, imm);
+
+
+
+// LDB
+
+void::function::do_ldb:unsigned32 *ra, unsigned32 rb, unsigned32 src
+	WRITE32_QUEUE (ra, MEM(signed, rb + src, 1));
+
+_IMEM,00000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDB
+"ldb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ldb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ldb(_SD, Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 1);
+_IMEM,00000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDB long
+"ldb r<RA>, @(r<RB>, <imm>)"
+	do_ldb(_SD, Ra, Rb, imm);
+
+
+
+// LDBU
+
+void::function::do_ldbu:unsigned32 *ra, unsigned32 rb, unsigned32 src
+	WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 1));
+
+_IMEM,01001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDBU
+"ldbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ldbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ldbu(_SD, Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 1);
+_IMEM,01001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDBU long
+"ldbu r<RA>, @(r<RB>, <imm>)"
+	do_ldbu(_SD, Ra, Rb, imm);
+
+
+
+// LDH
+
+void::function::do_ldh:unsigned32 *ra, unsigned32 rb, unsigned32 src
+	WRITE32_QUEUE (ra, MEM(signed, rb + src, 2));
+
+_IMEM,00010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDH
+"ldh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ldh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ldh(_SD, Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 2);
+_IMEM,00010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDH long
+"ldh r<RA>, @(r<RB>, <imm>)"
+	do_ldh(_SD, Ra, Rb, imm);
+
+
+
+// LDHH
+
+void::function::do_ldhh:unsigned32 *ra, unsigned32 rb, unsigned32 src
+	WRITE32_QUEUE (ra, MEM(signed, rb + src, 2) << 16);
+
+_IMEM,00001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHH
+"ldhh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ldhh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ldhh(_SD, Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 2);
+_IMEM,00001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHH long
+"ldhh r<RA>, @(r<RB>, <imm>)"
+	do_ldhh(_SD, Ra, Rb, imm);
+
+
+
+// LDHU
+
+void::function::do_ldhu:unsigned32 *ra, unsigned32 rb, unsigned32 src
+	WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 2));
+
+_IMEM,01010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHU
+"ldhu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ldhu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ldhu(_SD, Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 2);
+_IMEM,01010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHU long
+"ldhu r<RA>, @(r<RB>, <imm>)"
+	do_ldhu(_SD, Ra, Rb, imm);
+
+
+
+// LDW
+
+void::function::do_ldw:unsigned32 *ra, unsigned32 rb, unsigned32 src
+	WRITE32_QUEUE (ra, MEM(signed, rb + src, 4));
+
+_IMEM,00100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDW
+"ldw r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"ldw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_ldw(_SD, Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 4);
+_IMEM,00100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDW long
+"ldw r<RA>, @(r<RB>, <imm>)"
+	do_ldw(_SD, Ra, Rb, imm);
+
+
+
+// MACa
+
+void::function::do_mac:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
+	unsigned64 accum = *aa;
+	accum += (signed64) (rb) * (signed64) (src);
+	WRITE64_QUEUE (aa, accum);
+	WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63));
+
+_IALU2,10100,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACa
+"mac<AA> r<RA>, r<RB>, r<RC>"
+	do_mac(_SD, Aa, Ra, Rb, Rc);	
+_IALU2,10100,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACa imm
+"mac<AA> r<RA>, r<RB>, <imm>"
+	do_mac(_SD, Aa, Ra, Rb, imm);
+
+
+
+// MACSa
+
+void::function::do_macs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
+	unsigned64 accum = *aa;
+	accum += ((signed64) (rb) * (signed64) (src)) << 1;
+	WRITE64_QUEUE (aa, accum);
+	WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31));
+
+_IALU2,10101,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACSa
+"macs<AA> r<RA>, r<RB>, r<RC>"
+	do_macs(_SD, Aa, Ra, Rb, Rc);	
+_IALU2,10101,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACSa imm
+"macs<AA> r<RA>, r<RB>, <imm>"
+	do_macs(_SD, Aa, Ra, Rb, imm);
+
+
+
+// MODDEC | MODINC
+
+_IMEM,00111,11,6.**,6.RB,_IMM6:IMEM:short:mu:MODDEC
+"moddec r<RB>, <imm>"
+	do_incr(_SD, 3/*0b11*/, &GPR[RB], imm_5);	
+_IMEM,00111,01,6.**,6.RB,_IMM6:IMEM:short:mu:MODINC
+"modinc r<RB>, <imm>"
+	do_incr(_SD, 1/*0b01*/, &GPR[RB], imm_5);	
+
+
+
+// MSUBa
+
+void::function::do_msub:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
+	unsigned64 accum = *aa;
+	accum -= (signed64) (rb) * (signed64) (src);
+	WRITE64_QUEUE (aa, accum);
+	WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63));
+
+_IALU2,10110,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBa
+"msub<AA> r<RA>, r<RB>, r<RC>"
+	do_msub(_SD, Aa, Ra, Rb, Rc);	
+_IALU2,10110,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBa imm
+"msub<AA> r<RA>, r<RB>, <imm>"
+	do_msub(_SD, Aa, Ra, Rb, imm);
+
+
+
+// MSUBSa
+
+void::function::do_msubs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
+	unsigned64 accum = *aa;
+	accum -= ((signed64) (rb) * (signed64) (src)) << 1;
+	WRITE64_QUEUE (aa, accum);
+	WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31));
+
+_IALU2,10111,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBSa
+"msubs<AA> r<RA>, r<RB>, r<RC>"
+	do_msubs(_SD, Aa, Ra, Rb, Rc);	
+_IALU2,10111,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBSa imm
+"msubs<AA> r<RA>, r<RB>, <imm>"
+	do_msubs(_SD, Aa, Ra, Rb, imm);
+
+
+
+// MUL
+
+void::function::do_mul:unsigned32 *ra, unsigned32 rb, unsigned32 src
+	WRITE32_QUEUE (ra, rb * src);
+
+_IALU2,10000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL
+"mul r<RA>, r<RB>, r<RC>"
+	do_mul(_SD, Ra, Rb, Rc);	
+_IALU2,10000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL imm
+"mul r<RA>, r<RB>, <imm>"
+	do_mul(_SD, Ra, Rb, imm);
+
+
+
+// MUL2H
+
+void::function::do_mul2h:unsigned32 *ra, unsigned32 rb, unsigned32 src
+	unsigned16 high = VH2_4(rb) * VH2_4(src);
+	unsigned16 low  = VL2_4(rb) * VL2_4(src);
+	WRITE32_QUEUE (ra, (high << 16) | low);
+
+_IALU2,00000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL2H
+"mul2h r<RA>, r<RB>, r<RC>"
+	do_mul2h(_SD, Ra, Rb, Rc);	
+_IALU2,00000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL2H imm
+"mul2h r<RA>, r<RB>, <imm>"
+	do_mul2h(_SD, Ra, Rb, immHL);
+
+
+
+// MULX
+
+void::function::do_mulx:unsigned64 *aa, signed32 rb, signed32 src
+	WRITE64_QUEUE (aa, (signed64) (rb) * (signed64) (src));
+
+_IALU2,11000,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULX
+"mulx a<AA>, r<RB>, r<RC>"
+	do_mulx(_SD, Aa, Rb, Rc);	
+_IALU2,11000,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULX imm
+"mulx a<AA>, r<RB>, <imm>"
+	do_mulx(_SD, Aa, Rb, imm);
+
+
+// MULX2H
+
+void::function::do_mulx2h:int ra, signed32 rb, signed32 src, int high
+	signed32 result = rb * src;
+	if (!high)
+	  {
+	    ra = make_even_reg(_SD, ra, "MULX2H");
+	    if (ra != 0)
+	      WRITE32_QUEUE (&GPR[ra+1], result);
+	  }
+	else if (ra != 0)
+	  {
+	      WRITE32_QUEUE (&GPR[ra+0], result);
+	  }
+
+_IALU2,00001,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULX2H
+"mul2h r<RA>, r<RB>, r<RC>"
+	do_mulx2h(_SD, RA, RbH, RcH, 1);
+	do_mulx2h(_SD, RA, RbL, RcL, 0);
+_IALU2,00001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULX2H imm
+"mul2h r<RA>, r<RB>, <imm>"
+	do_mulx2h(_SD, RA, RbH, imm, 1);
+	do_mulx2h(_SD, RA, RbL, imm, 0);
+
+// MULHXpp
+
+void::function::do_mulhx:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src
+	signed32 value = 0;
+	switch (pp) {
+	case 0: /* LL */
+	  value = SEXT32(VL2_4(rb), 16) * SEXT32(VL2_4(src), 16);
+	  break;
+	case 1: /* LH */
+	  value = SEXT32(VL2_4(rb), 16) * SEXT32(VH2_4(src), 16);
+	  break;
+	case 2: /* HL */
+	  value = SEXT32(VH2_4(rb), 16) * SEXT32(VL2_4(src), 16);
+	  break;
+	case 3: /* HH */
+	  value = SEXT32(VH2_4(rb), 16) * SEXT32(VH2_4(src), 16);
+	  break;
+	default:
+	  sim_engine_abort (SD, CPU, cia, "do_mulhx - internal error - bad switch");
+	}
+	WRITE32_QUEUE (ra, value);
+
+_IALU2,001,pp,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULHXpp
+"mulhx%s<pp> r<RA>, r<RB>, r<RC>"
+	do_mulhx(_SD, pp, Ra, Rb, Rc);	
+_IALU2,001,pp,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULHXpp imm
+"mulhx%s<pp> r<RA>, r<RB>, <imm>"
+	do_mulhx(_SD, pp, Ra, Rb, immHL);
+
+
+
+// MULXS
+
+void::function::do_mulxs:unsigned64 *aa, signed32 rb, signed32 src
+	WRITE64_QUEUE (aa, ((signed64) (rb) * (signed64) (src)) << 1);
+
+_IALU2,11001,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULXS
+"mulxs a<AA>, r<RB>, r<RC>"
+	do_mulxs(_SD, Aa, Rb, Rc);	
+_IALU2,11001,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULXS imm
+"mulxs a<AA>, r<RB>, <imm>"
+	do_mulxs(_SD, Aa, Rb, imm);
+
+
+
+// MVFACC
+
+void::function::do_mvfacc:unsigned32 *ra, unsigned64 ab, unsigned32 src
+	while (src > 63) src -= 64;
+	WRITE32_QUEUE (ra, ((signed64)ab) >> src);
+
+_IALU2,11111,00,6.RA,5.*,1.AB,6.RC:IALU2:short:iu:MVFACC
+"mvfacc r<RA>, a<AB>, r<RC>"
+	do_mvfacc(_SD, Ra, *Ab, Rc);	
+_IALU2,11111,10,6.RA,5.*,1.AB,_IMM6:IALU2:short:iu:MVFACC imm
+"mvfacc r<RA>, a<AB>, <imm>"
+	do_mvfacc(_SD, Ra, *Ab, imm_6u);
+
+
+
+// MVFSYS
+
+_BRA,11110,00,6.RA,6.CR,6.ID:BRA:short:mu:MVFSYS
+"mvfsys r<RA>, cr<CR>"
+	switch (ID) {
+	case 0:
+	  if (CR >= NR_CONTROL_REGISTERS)
+	    sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR");
+	  else
+	    WRITE32_QUEUE (Ra, (CPU)->regs.control[CR]);
+	  break;
+	case 1:
+	  WRITE32_QUEUE (Ra, PSWL);
+	  break;
+	case 2:
+	  WRITE32_QUEUE (Ra, EXTRACTED32(PSWH, 16, 31));
+	  break;
+	case 3:
+	  WRITE32_QUEUE (Ra, PSW_FLAG_VAL(CR));
+	  break;
+	default:
+	  sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID");
+	}
+
+
+
+// MVTACC
+
+_IALU2,01111,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MVTACC
+"mvtacc a<AA>, r<RB>, r<RC>"
+	WRITE64_QUEUE (Aa, INSERTED64(RbU, 0, 31) | (RcU));
+
+
+
+// MVTSYS
+
+_BRA,01110,00,6.CR,6.RB,6.ID:BRA:short:mu:MVTSYS
+"mvtsys cr<CR>, r<RB>"
+	switch (ID) {
+	case 0:			/* control register */
+	  if (CR >= NR_CONTROL_REGISTERS)
+	    sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR");
+	  else
+	    {
+	      unsigned32 value = Rb;
+	      if (CR == processor_status_word_cr)
+		{
+		  unsigned32 ds = PSW & BIT32 (PSW_DS);	/* preserve ds */
+		  value = ds | (value & PSW_VALID);
+		  CPU->left_kills_right_p = 1;
+		}
+	      else if (CR == backup_processor_status_word_cr
+		       || CR == debug_backup_processor_status_word_cr)
+		value &= DPSW_VALID;
+	      else if (CR == eit_vector_base_cr)
+		value &= EIT_VALID;
+	      WRITE32_QUEUE (&(CPU)->regs.control[CR], value);
+	    }
+	  break;
+	case 1:			/* PSWL */
+	  WRITE32_QUEUE_MASK (&PSW, EXTRACTED32(Rb, 16, 31),
+			      PSW_VALID & 0x0000ffff);
+	  CPU->left_kills_right_p = 1;
+	  break;
+	case 2:			/* PSWH */
+	  {
+	    unsigned32 ds = PSW & BIT32 (PSW_DS);	/* preserve ds */
+	    WRITE32_QUEUE_MASK (&PSW, (EXTRACTED32(Rb, 16, 31) << 16) | ds,
+				(PSW_VALID | ds) & 0xffff0000);
+	    CPU->left_kills_right_p = 1;
+	  }
+	  break;
+	case 3:			/* FLAG */
+	  PSW_FLAG_SET_QUEUE(CR, Rb & 1);
+	  CPU->left_kills_right_p = 1;
+	  break;
+	default:
+	  sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID");
+	}
+
+
+
+// NOP
+
+_BRA,01111,00,6.**,6.**,6.**:BRA:short:iu,mu:NOP
+"nop"
+	/* NOP */;
+
+
+// NOT
+
+_LOGIC,11001,00,6.RA,6.RB,6.*:LOGIC:short:iu,mu:NOT
+"not r<RA>, r<RB>"
+	WRITE32_QUEUE (Ra, ~Rb);
+
+
+
+// NOTFG
+
+_LOGIC,01001,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:NOTFG
+"notfg f<FA>, f<FB>"
+	PSW_FLAG_SET_QUEUE(FA, !PSW_FLAG_VAL(FB));
+
+
+// OR
+
+_LOGIC,11010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:OR
+"or r<RA>, r<RB>, r<RC>"
+	WRITE32_QUEUE (Ra, Rb | Rc);
+_LOGIC,11010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:OR imm
+"or r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, Rb | imm);
+_LOGIC,11010,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:OR imm long
+"or r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, Rb | imm);
+
+
+
+// ORFG
+
+_LOGIC,01010,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:ORFG
+"orfg f<FA>, f<FB>, f<FC>"
+	PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | PSW_FLAG_VAL(FC));
+_LOGIC,01010,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:ORFG imm
+"orfg f<FA>, f<FB>, <imm>"
+	PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | (imm_6 & 1));
+
+
+
+// REIT
+
+_BRA,01000,00,6.**,6.**,6.**:BRA:short:mu:REIT
+"reit"
+	WRITE32_QUEUE (&PSW, bPSW);
+	nia = bPC;
+
+
+
+
+// REPEAT
+
+void::function::do_repeat:unsigned32 count, address_word pcaddr
+	if (count == 0)
+	  sim_engine_abort (SD, CPU, cia, "REPEAT with ra=0 and REPEATI with imm = 0 is forbidden.");
+	if (count > 1)
+	  PSW_SET_QUEUE (PSW_RP, 1);
+	WRITE32_QUEUE (&RPT_C, count - 1);
+	WRITE32_QUEUE (&RPT_S, cia + 8);
+	WRITE32_QUEUE (&RPT_E, cia + pcaddr);
+
+_BRA,11000,00,6.RA,6.**,6.RC:BRA:short:mu:REPEAT
+"repeat r<RA>, r<RC>"
+	do_repeat(_SD, val_Ra, pcaddr);
+_BRA,11000,10,6.RA,_IMM12:BRA:short:mu:REPEAT imm
+"repeat r<RA>, <pcaddr>"
+	do_repeat(_SD, val_Ra, pcaddr);
+_BRA,11000,10,6.RA,6.**,_IMM32:BRA:long:mu:REPEAT imm long
+"repeat r<RA>, <pcaddr>"
+	do_repeat(_SD, val_Ra, pcaddr);
+
+
+
+
+// REPEATI
+
+_BRA,11010,00,6.IMM_6,6.**,6.RC:BRA:short:mu:REPEATI
+"repeati <IMM_6>, r<RC>"
+	do_repeat(_SD, IMM_6, pcaddr);
+_BRA,11010,10,6.IMM_6,_IMM12:BRA:short:mu:REPEATI imm
+"repeati <IMM_6>, <pcaddr>"
+	do_repeat(_SD, IMM_6, pcaddr);
+_BRA,11010,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:REPEATI imm long
+"repeati <IMM_6>, <pcaddr>"
+	do_repeat(_SD, IMM_6, pcaddr);
+
+
+
+
+// RTD
+
+_BRA,01010,00,6.*,6.*,6.*:BRA:short:mu:RTD
+"rtd"
+	WRITE32_QUEUE (&PSW, DPSW);
+	nia = DPC;
+
+
+
+
+// ROT
+
+_LOGIC,10100,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT
+"rot r<RA>, r<RB>, r<RC>"
+	WRITE32_QUEUE (Ra, ROT32(Rb, Rc & 0x1f));
+_LOGIC,10100,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT imm
+"rot r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, ROT32(Rb, imm & 0x1f));
+
+
+
+
+// ROT2H
+
+void::function::do_rot2h:unsigned32 *ra, unsigned32 rb, signed32 src
+	unsigned16 high = ROTR16(VH2_4(rb), VH2_4(src) & 0xf);
+	unsigned16 low  = ROTR16(VL2_4(rb), VL2_4(src) & 0xf);
+	WRITE32_QUEUE (ra, (high << 16) | low);
+
+_LOGIC,10101,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT2H
+"rot2h r<RA>, r<RB>, r<RC>"
+	do_rot2h(_SD, Ra, Rb, Rc);
+_LOGIC,10101,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT2H imm
+"rot2h r<RA>, r<RB>, <imm>"
+	do_rot2h(_SD, Ra, Rb, immHL);
+
+
+
+
+// SAT
+
+void::function::do_sat:signed32 *ra, signed32 rb, signed32 src
+	int bits = LSMASKED32(src, 4, 0); /* 5 */
+	signed32 sat = LSMASK32(bits, 0) >> 2;
+	signed32 nsat = ~sat;
+	signed32 value;
+	if (bits != src)
+	  sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", cia);
+	if (bits == 0)
+	  value = rb;
+	else if (rb >= sat)
+	  value = sat;
+	else if (rb <= nsat)
+	  value = nsat;
+	else
+	  value = rb;
+	WRITE32_QUEUE (ra, value);
+
+_IALU2,01000,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT
+"sat r<RA>, r<RB>, r<RC>"
+	do_sat(_SD, Ra, Rb, Rc);
+_IALU2,01000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT imm
+"sat r<RA>, r<RB>, <imm>"
+	do_sat(_SD, Ra, Rb, imm_5);
+
+
+
+
+// SAT2H
+
+void::function::do_sath:signed32 *ra, signed32 rb, signed32 src, int high, int updates_f4
+	int bits = LSMASKED32(src, 4, 0); /* 5 */
+	signed32 sat = LSMASK32(bits, 0) >> 2;
+	signed32 nsat = ~sat;
+	signed32 value;
+	if (bits != src)
+	  sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", cia);
+	if (bits == 0)
+	  value = rb;
+	else if (rb >= sat)
+	  value = sat;
+	else if (rb <= nsat)
+	  value = nsat;
+	else
+	  value = rb;
+	if (high)
+	  WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
+	else
+	  WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
+	if (updates_f4)
+	  {
+	    /* if MU instruction was a MVTSYS (lkr), unqueue register writes now */
+	    if(STATE_CPU (sd, 0)->left_kills_right_p)
+	      unqueue_writes (sd, STATE_CPU (sd, 0), cia);
+	    PSW_FLAG_SET_QUEUE(PSW_S_FLAG, PSW_FLAG_VAL(PSW_S_FLAG) ^ (value & 1));
+	  }
+
+_IALU2,01001,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT2H
+"sat2h r<RA>, r<RB>, r<RC>"
+	do_sath(_SD, Ra, RbH, RcH, 1, 0);
+	do_sath(_SD, Ra, RbL, RcL, 0, 0);
+_IALU2,01001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT2H imm
+"sat2h r<RA>, r<RB>, <imm>"
+	do_sath(_SD, Ra, RbH, imm_5, 1, 0);
+	do_sath(_SD, Ra, RbL, imm_5, 0, 0);
+
+
+
+
+// SATHp
+
+::%s::p:int p
+	switch (p)
+	  {
+	  case 0: return "l";
+	  case 1: return "h";
+	  default: return "?";
+	  }
+
+_IALU2,1110,p,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATHP
+"sath%s<p> r<RA>, r<RB>, r<RC>"
+	do_sath(_SD, Ra, Rb, Rc, p, 1);
+_IALU2,1110,p,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATHP imm
+"sath%s<p> r<RA>, r<RB>, <imm>"
+	do_sath(_SD, Ra, Rb, imm_5, p, 1);
+
+
+
+// SATZ
+
+void::function::do_satz:signed32 *ra, signed32 rb, signed32 src
+	if (rb < 0)
+	  WRITE32_QUEUE (ra, 0);
+	else
+	  do_sat (_SD, ra, rb, src);
+
+_IALU2,01010,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ
+"satz r<RA>, r<RB>, r<RC>"
+	do_satz(_SD, Ra, Rb, Rc);
+_IALU2,01010,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ imm
+"satz r<RA>, r<RB>, <imm>"
+	do_satz(_SD, Ra, Rb, imm_5);
+
+
+
+
+// SATZ2H
+
+void::function::do_satzh:signed32 *ra, signed16 rb, signed32 src, int high
+	int bits = LSMASKED32(src, 3, 0); /*4*/
+	signed16 sat = LSMASK16(bits, 0) >> 2;
+	signed16 nsat = 0;
+	signed16 value;
+	if (bits != src)
+	  sim_io_eprintf (sd, "warning: 0x%lx:SATZ2H bit overflow\n", cia);
+	if (bits == 0 && rb > sat)
+	  value = rb;
+	else if (rb > sat)
+	  value = sat;
+	else if (rb < nsat)
+	  value = nsat;
+	else
+	  value = rb;
+	if (high)
+	  WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
+	else
+	  WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
+
+
+_IALU2,01011,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ2H
+"satz2h r<RA>, r<RB>, r<RC>"
+	do_satzh(_SD, Ra, RbH, RcH, 1);
+	do_satzh(_SD, Ra, RbL, RcL, 0);
+_IALU2,01011,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ2H imm
+"satz2h r<RA>, r<RB>, <imm>"
+	do_satzh(_SD, Ra, RbH, imm, 1);
+	do_satzh(_SD, Ra, RbL, imm, 0);
+
+
+
+
+// SRA
+
+void::function::do_sra:unsigned32 *ra, unsigned32 rb, signed32 src
+	unsigned32 value;
+	while (src > 31) src -= 32;
+	while (src < -32) src += 32;
+	if (src >= 0)
+	  value = (signed32)rb >> src;
+	else if (src == -32)
+	  value = 0;
+	else
+	  value = rb << -src;
+	WRITE32_QUEUE (ra, value);
+
+_LOGIC,10000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA
+"sra r<RA>, r<RB>, r<RC>"
+	do_sra(_SD, Ra, Rb, Rc);
+_LOGIC,10000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA imm
+"sra r<RA>, r<RB>, <imm>"
+	do_sra(_SD, Ra, Rb, imm);
+
+
+
+
+// SRAHp
+
+void::function::do_srah:unsigned32 *ra, unsigned32 rb, int src, int high
+	unsigned32 value;
+	while (src > 31) src -= 32;
+	while (src < -32) src += 32;
+	if (src >= 0)
+	  value = (signed32)rb >> src;
+	else if (src == -32)
+	  value = 0;
+	else
+	  value = rb << -src;
+	if (high)
+	  WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
+	else
+	  WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
+
+_LOGIC,0010,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRAHP
+"srah%s<p> r<RA>, r<RB>, r<RC>"
+	do_srah(_SD, Ra, Rb, Rc, p);
+_LOGIC,0010,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRAHP imm
+"srah%s<p> r<RA>, r<RB>, <imm>"
+	do_srah(_SD, Ra, Rb, imm, p);
+
+
+
+
+// SRA2H
+
+_LOGIC,10001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA2H
+"sra2h r<RA>, r<RB>, r<RC>"
+	signed32 srcH = RcH;
+	signed32 srcL = RcL;
+	while (srcH > 15) srcH -= 16;
+	while (srcH < -16) srcH += 16;
+	while (srcL > 15) srcL -= 16;
+	while (srcL < -16) srcL += 16;
+	do_srah(_SD, Ra, RbH, srcH, 1);
+	do_srah(_SD, Ra, RbL, srcL, 0);
+_LOGIC,10001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA2H imm
+"sra2h r<RA>, r<RB>, <imm>"
+	signed32 src = imm;
+	while (src > 15) src -= 16;
+	while (src < -16) src += 16;
+	do_srah(_SD, Ra, RbH, src, 1);
+	do_srah(_SD, Ra, RbL, src, 0);
+
+
+
+
+// SRC
+
+void::function::do_src:unsigned32 *ra, unsigned32 rb, int src
+	unsigned32 value;
+	unsigned64 operand;
+	unsigned64 shifted;
+	while (src > 31) src -= 32;
+	while (src < -32) src += 32;
+	if (src >= 0)
+	  {
+	    operand = (INSERTED64(rb, 0, 31) | INSERTED64(*ra, 32, 63));
+	    shifted = operand >> src;
+	    value = EXTRACTED64(shifted, 32, 63);
+	  }
+	else
+	  {
+	    operand = (INSERTED64(*ra, 0, 31) | INSERTED64(rb, 32, 63));
+	    shifted = operand << -src;
+	    value = EXTRACTED64(shifted, 0, 31);
+	  }
+	WRITE32_QUEUE (ra, value);
+
+_LOGIC,10110,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRC
+"src r<RA>, r<RB>, r<RC>"
+	do_src(_SD, Ra, Rb, Rc);
+_LOGIC,10110,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRC imm
+"src r<RA>, r<RB>, <imm>"
+	do_src(_SD, Ra, Rb, imm);
+
+
+
+
+// SRL
+
+void::function::do_srl:unsigned32 *ra, unsigned32 rb, int src
+	unsigned32 value;
+	while (src > 31) src -= 32;
+	while (src < -32) src += 32;
+	if (src >= 0)
+	  value = (unsigned32)rb >> src;
+	else if (src == -32)
+	  value = 0;
+	else
+	  value = (unsigned32)rb << -src;
+	WRITE32_QUEUE (ra, value);
+
+_LOGIC,10010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL
+"srl r<RA>, r<RB>, r<RC>"
+	do_srl(_SD, Ra, Rb, Rc);
+_LOGIC,10010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL imm
+"srl r<RA>, r<RB>, <imm>"
+	do_srl(_SD, Ra, Rb, imm);
+
+
+
+
+// SRLHp
+
+void::function::do_srlh:unsigned32 *ra, unsigned32 rb, int src, int high
+	unsigned32 value;
+	while (src > 31) src -= 32;
+	while (src < -32) src += 32;
+	if (src >= 0)
+	  value = rb >> src;
+	else if (src == -32)
+	  value = 0;
+	else
+	  value = rb << -src;
+	if (high)
+	  WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
+	else
+	  WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
+
+_LOGIC,0011,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRLHP
+"srlh%s<p> r<RA>, r<RB>, r<RC>"
+	do_srlh(_SD, Ra, Rb, Rc, p);
+_LOGIC,0011,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRLHP imm
+"srlh%s<p> r<RA>, r<RB>, <imm>"
+	do_srlh(_SD, Ra, Rb, imm, p);
+
+
+// SRL2H
+
+_LOGIC,10011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL2H
+"srl2h r<RA>, r<RB>, r<RC>"
+	signed32 srcH = RcH;
+	signed32 srcL = RcL;
+	while (srcH > 15) srcH -= 16;
+	while (srcH < -16) srcH += 16;
+	while (srcL > 15) srcL -= 16;
+	while (srcL < -16) srcL += 16;
+	do_srlh(_SD, Ra, RbHU, srcH, 1);
+	do_srlh(_SD, Ra, RbLU, srcL, 0);
+_LOGIC,10011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL2H imm
+"srl2h r<RA>, r<RB>, <imm>"
+	signed32 src = imm;
+	while (src > 15) src -= 16;
+	while (src < -16) src += 16;
+	do_srlh(_SD, Ra, RbHU, src, 1);
+	do_srlh(_SD, Ra, RbLU, src, 0);
+
+
+
+
+// ST2H
+
+void::function::get_even_reg:int *reg, unsigned32 *r0, const char *name
+	if (*reg & 1)
+	  sim_engine_abort (SD, CPU, cia,
+			    "0x%lx:%s odd register (r%d) used in multi-word store",
+			    (long) cia, name, *reg);
+	if (*reg == 0)
+	  *r0 = 0;
+	else
+	  *r0 = GPR[*reg];
+
+void::function::do_st2h:int ra, unsigned32 rb, unsigned32 src
+	unsigned32 val_ra;
+	unsigned32 mem;
+	get_even_reg(_SD, &ra, &val_ra, "ST2H");
+	mem = INSERTED32(val_ra, 0, 15) |
+	      INSERTED32(GPR[ra + 1], 16, 31);
+	STORE(rb + src, 4, mem);
+
+_IMEM,10011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2H
+"st2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"st2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_st2h(_SD, RA, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 4);
+_IMEM,10011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2H long
+"st2h r<RA>, @(r<RB>, <imm>)"
+	do_st2h(_SD, RA, Rb, imm);
+
+
+
+// ST2W
+
+void::function::do_st2w:int ra, unsigned32 rb, unsigned32 src
+	unsigned32 val_ra;
+	unsigned64 mem;
+	get_even_reg(_SD, &ra, &val_ra, "ST2W");
+	mem = INSERTED64(val_ra, 0, 31) | INSERTED64(GPR[ra + 1], 32, 63);
+	STORE(rb + src, 8, mem);
+
+_IMEM,10110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2W
+"st2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"st2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_st2w(_SD, RA, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 8);
+_IMEM,10110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2W long
+"st2w r<RA>, @(r<RB>, <imm>)"
+	do_st2w(_SD, RA, Rb, imm);
+
+
+
+// ST4HB
+
+void::function::do_st4hb:int ra, unsigned32 rb, unsigned32 src
+	unsigned32 val_ra;
+	unsigned32 mem;
+	get_even_reg(_SD, &ra, &val_ra, "ST4HB");
+	mem = INSERTED32(EXTRACTED32(val_ra, 8, 15), 0, 7) |
+	      INSERTED32(EXTRACTED32(val_ra, 24, 31), 8, 15) |
+	      INSERTED32(EXTRACTED32(GPR[ra + 1], 8, 15), 16, 23) |
+	      INSERTED32(EXTRACTED32(GPR[ra + 1], 24, 31), 24, 31);
+	STORE(rb + src, 4, mem);
+
+_IMEM,10101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST4HB
+"st4hb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"st4hb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_st4hb(_SD, RA, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 4);
+_IMEM,10101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST4HB long
+"st4hb r<RA>, @(r<RB>, <imm>)"
+	do_st4hb(_SD, RA, Rb, imm);
+
+
+
+// STB
+
+void::function::do_stb:unsigned32 ra, unsigned32 rb, unsigned32 src
+	STORE(rb + src, 1, EXTRACTED32(ra, 24, 31));
+
+_IMEM,10000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STB
+"stb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"stb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_stb(_SD, val_Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 1);
+_IMEM,10000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STB long
+"stb r<RA>, @(r<RB>, <imm>)"
+	do_stb(_SD, val_Ra, Rb, imm);
+
+
+
+// STH
+
+void::function::do_sth:unsigned32 ra, unsigned32 rb, unsigned32 src
+	STORE(rb + src, 2, EXTRACTED32(ra, 16, 31));
+
+_IMEM,10010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STH
+"sth r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"sth r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_sth(_SD, val_Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 2);
+_IMEM,10010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STH long
+"sth r<RA>, @(r<RB>, <imm>)"
+	do_sth(_SD, val_Ra, Rb, imm);
+
+
+
+// STHH
+
+void::function::do_sthh:unsigned32 ra, unsigned32 rb, unsigned32 src
+	STORE(rb + src, 2, EXTRACTED32(ra, 0, 15));
+
+_IMEM,10001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STHH
+"sthh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"sthh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_sthh(_SD, val_Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 2);
+_IMEM,10001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STHH long
+"sthh r<RA>, @(r<RB>, <imm>)"
+	do_sthh(_SD, val_Ra, Rb, imm);
+
+
+
+// STW
+
+void::function::do_stw:unsigned32 ra, unsigned32 rb, unsigned32 src
+	STORE(rb + src, 4, ra);
+
+_IMEM,10100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STW
+"stw r<RA>, @(r<RB>, <SRC_6>)":XX == 0
+"stw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
+	do_stw(_SD, val_Ra, Rb, src);
+	do_incr(_SD, XX, &GPR[RB], 4);
+_IMEM,10100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STW long
+"stw r<RA>, @(r<RB>, <imm>)"
+	do_stw(_SD, val_Ra, Rb, imm);
+
+
+
+// SUB
+
+void::function::do_sub:unsigned32 *ra, unsigned32 rb, unsigned32 imm
+	ALU_BEGIN(rb);
+	ALU_SUBB(imm);
+	ALU_END(ra);
+
+_IALU1,00010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB
+"sub r<RA>, r<RB>, r<RC>"
+	do_sub (_SD, Ra, Rb, Rc);
+_IALU1,00010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB imm
+"sub r<RA>, r<RB>, <imm>"
+	do_sub (_SD, Ra, Rb, imm);
+_IALU1,00010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB imm long
+"sub r<RA>, r<RB>, <imm>"
+	do_sub (_SD, Ra, Rb, imm);
+
+
+
+// SUB2H
+
+void::function::do_sub2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm
+	unsigned16 high = VH2_4(rb) - VH2_4(imm);
+	unsigned16 low  = VL2_4(rb) - VL2_4(imm);
+	WRITE32_QUEUE (ra, (high << 16) | low);
+
+_IALU1,00011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB2H
+"sub2h r<RA>, r<RB>, r<RC>"
+	do_sub2h (_SD, Ra, Rb, Rc);
+_IALU1,00011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB2H imm
+"sub2h r<RA>, r<RB>, <imm>"
+	do_sub2h (_SD, Ra, Rb, immHL);
+_IALU1,00011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB2H imm long
+"sub2h r<RA>, r<RB>, <imm>"
+	do_sub2h (_SD, Ra, Rb, imm);
+
+
+
+// SUBB
+
+void::function::do_subb:unsigned32 *ra, unsigned32 rb, unsigned32 imm
+	ALU_BEGIN(rb);
+	ALU_SUBB_B(imm, ALU_CARRY);
+	ALU_END(ra);
+	
+_IALU1,00101,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBB
+"subb r<RA>, r<RB>, r<RC>"
+	do_subb (_SD, Ra, Rb, Rc);
+_IALU1,00101,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBB imm
+"subb r<RA>, r<RB>, <imm>"
+	do_subb (_SD, Ra, Rb, imm);
+_IALU1,00101,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBB imm long
+"subb r<RA>, r<RB>, <imm>"
+	do_subb (_SD, Ra, Rb, imm);
+
+
+
+// SUBHppp
+
+void::function::do_subh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src
+	switch (ppp) {
+	case 0x0: /* LLL */
+	  {
+	  ALU16_BEGIN(VL2_4(rb));
+	  ALU16_SUBB(VL2_4(src));
+	  ALU16_END(ra, 0);
+	  }
+	  break;
+	case 0x1: /* LLH */
+	  {
+	  ALU16_BEGIN(VL2_4(rb));
+	  ALU16_SUBB(VH2_4(src));
+	  ALU16_END(ra, 0);
+	  }
+	  break;
+	case 0x2: /* LHL */
+	  {
+	  ALU16_BEGIN(VH2_4(rb));
+	  ALU16_SUBB(VL2_4(src));
+	  ALU16_END(ra, 0);
+	  }
+	  break;
+	case 0x3: /* LHH */
+	  {
+	  ALU16_BEGIN(VH2_4(rb));
+	  ALU16_SUBB(VH2_4(src));
+	  ALU16_END(ra, 0);
+	  }
+	  break;
+	case 0x4: /* HLL */
+	  {
+	  ALU16_BEGIN(VL2_4(rb));
+	  ALU16_SUBB(VL2_4(src));
+	  ALU16_END(ra, 1);
+	  }
+	  break;
+	case 0x5: /* HLH */
+	  {
+	  ALU16_BEGIN(VL2_4(rb));
+	  ALU16_SUBB(VH2_4(src));
+	  ALU16_END(ra, 1);
+	  }
+	  break;
+	case 0x6: /* HHL */
+	  {
+	  ALU16_BEGIN(VH2_4(rb));
+	  ALU16_SUBB(VL2_4(src));
+	  ALU16_END(ra, 1);
+	  }
+	  break;
+	case 0x7: /* HHH */
+	  {
+	  ALU16_BEGIN(VH2_4(rb));
+	  ALU16_SUBB(VH2_4(src));
+	  ALU16_END(ra, 1);
+	  }
+	  break;
+	default:
+	  sim_engine_abort (SD, CPU, cia, "do_subh_ppp - internal error - bad switch");
+	}
+
+_IALU1,11,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBHppp
+"subh%s<ppp> r<RA>, r<RB>, r<RC>"
+	do_subh_ppp(_SD, ppp, Ra, Rb, Rc);
+_IALU1,11,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBHppp imm
+"subh%s<ppp> r<RA>, r<RB>, <imm>"
+	do_subh_ppp(_SD, ppp, Ra, Rb, immHL);
+_IALU1,11,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBHppp imm long
+"subh%s<ppp> r<RA>, r<RB>, <imm>"
+	do_subh_ppp(_SD, ppp, Ra, Rb, imm);
+
+
+
+// TRAP
+
+address_word::function::do_trap:address_word trap_vector, address_word nia
+	/* Steal trap 31 for doing system calls */
+	/* System calls are defined in libgloss/d30v/syscall.h.  */
+	if (trap_vector == EIT_VB + 0x20 + (31 << 3))
+	  {
+	    enum { PARM1 = 2, PARM2, PARM3, PARM4, FUNC };
+	    if (GPR[FUNC] == 1)		/* exit */
+	      {
+	        sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia, sim_exited,
+		  	         GPR[PARM1]);
+	        return -1; /* dummy */
+	      }
+	    else
+	      {
+		CB_SYSCALL syscall;
+
+		CB_SYSCALL_INIT (&syscall);
+		syscall.arg1 = GPR[PARM1];
+		syscall.arg2 = GPR[PARM2];
+		syscall.arg3 = GPR[PARM3];
+		syscall.arg4 = GPR[PARM4];
+		syscall.func = GPR[FUNC];
+		syscall.p1 = (PTR) SD;
+		syscall.read_mem = d30v_read_mem;
+		syscall.write_mem = d30v_write_mem;
+
+		WRITE32_QUEUE (&GPR[PARM1],
+			       ((cb_syscall (STATE_CALLBACK (SD), &syscall)
+				 == CB_RC_OK)
+				? syscall.result
+				: -syscall.errcode));
+		return nia;
+	      }
+	  }
+	else if (TRACE_TRAP_P)
+	  {
+	    int reg, i;
+	    sim_io_eprintf (sd, "\nTrap %ld:\n", (long) ((trap_vector - (EIT_VB + 0x20)) >> 3));
+	    for (reg = 0; reg < NR_GENERAL_PURPOSE_REGISTERS; reg += 8)
+	      {
+		sim_io_eprintf (sd, "r%.2d  - r%.2d: ", reg, reg+7);
+		for (i = 0; i < 8; i++)
+		  sim_io_eprintf (sd, " 0x%.8lx", (long) GPR[reg+i]);
+		sim_io_eprintf (sd, "\n");
+	      }
+
+	    for (reg = 0; reg < 16; reg += 8)
+	      {
+		sim_io_eprintf (sd, "cr%.2d - cr%.2d:", reg, reg+7);
+		for (i = 0; i < 8; i++)
+		  sim_io_eprintf (sd, " 0x%.8lx", (long) CREG[reg+i]);
+		sim_io_eprintf (sd, "\n");
+	      }
+
+	    sim_io_eprintf (sd, "a0   - a1:  ");
+	    for (reg = 0; reg < NR_ACCUMULATORS; reg++)
+	      sim_io_eprintf (sd, " 0x%.8lx 0x%.8lx",
+			      (long)EXTRACTED64(ACC[reg], 0, 31),
+			      (long)EXTRACTED64(ACC[reg], 32, 63));
+	    sim_io_eprintf (sd, "\n");
+
+	    sim_io_eprintf (sd, "f0   - f7:  ");
+	    sim_io_eprintf (sd, "     (f0) %d", (int) PSW_VAL(PSW_F0));
+	    sim_io_eprintf (sd, "     (f1) %d", (int) PSW_VAL(PSW_F1));
+	    sim_io_eprintf (sd, "     (f2) %d", (int) PSW_VAL(PSW_F2));
+	    sim_io_eprintf (sd, "     (f3) %d", (int) PSW_VAL(PSW_F3));
+	    sim_io_eprintf (sd, "      (s) %d", (int) PSW_VAL(PSW_S));
+	    sim_io_eprintf (sd, "      (v) %d", (int) PSW_VAL(PSW_V));
+	    sim_io_eprintf (sd, "     (va) %d", (int) PSW_VAL(PSW_VA));
+	    sim_io_eprintf (sd, "      (c) %d\n", (int) PSW_VAL(PSW_C));
+
+	    sim_io_eprintf (sd, "pswh:       ");
+	    sim_io_eprintf (sd, "     (sm) %d", (int) PSW_VAL(PSW_SM));
+	    sim_io_eprintf (sd, "     (ea) %d", (int) PSW_VAL(PSW_EA));
+	    sim_io_eprintf (sd, "     (ie) %d", (int) PSW_VAL(PSW_IE));
+	    sim_io_eprintf (sd, "     (rp) %d", (int) PSW_VAL(PSW_RP));
+	    sim_io_eprintf (sd, "     (md) %d", (int) PSW_VAL(PSW_MD));
+
+	    if (PSW_VAL(PSW_DB))
+	      sim_io_eprintf (sd, "     (db) %d", (int) PSW_VAL(PSW_DB));
+
+	    if (PSW_VAL(PSW_DS))
+	      sim_io_eprintf (sd, "     (ds) %d", (int) PSW_VAL(PSW_DS));
+
+	    sim_io_eprintf (sd, "\n");
+	    return nia;
+	  }
+	else
+	  {
+	    if(PSW_VAL(PSW_RP) && RPT_E == cia)
+	      {
+		WRITE32_QUEUE (&bPC, RPT_S);
+		if (RPT_C == 0)
+		  PSW_SET (PSW_RP, 0);
+	      }
+	    else
+	      WRITE32_QUEUE (&bPC, cia + 8);
+	    DID_TRAP = 1;
+	    return trap_vector;
+	  }
+
+_BRA,01001,00,6.**,6.**,6.RC:BRA:short:mu:TRAP
+"trap r<RC>"
+	nia = do_trap (_SD, EIT_VB + 0x20 + MASKED32(Rc, 24, 28), nia);
+_BRA,01001,10,6.**,6.**,_IMM6:BRA:short:mu:TRAP imm
+"trap <imm>"
+	nia = do_trap (_SD, EIT_VB + 0x20 + (imm_5 << 3), nia);
+
+
+
+// XOR
+
+_LOGIC,11011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:XOR
+"xor r<RA>, r<RB>, r<RC>"
+	WRITE32_QUEUE (Ra, Rb ^ Rc);
+_LOGIC,11011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:XOR imm
+"xor r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, Rb ^ imm);
+_LOGIC,11011,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:XOR imm long
+"xor r<RA>, r<RB>, <imm>"
+	WRITE32_QUEUE (Ra, Rb ^ imm);
+
+
+
+// XORFG
+
+_LOGIC,01011,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:XORFG
+"xorfg f<FA>, f<FB>, f<FC>"
+	PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ PSW_FLAG_VAL(FC));
+_LOGIC,01011,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:XORFG imm
+"xorfg f<FA>, f<FB>, <imm_6>"
+	PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ (imm_6 & 1));
+
+
+
diff --git a/sim/d30v/dc-short b/sim/d30v/dc-short
new file mode 100644
index 0000000..1451dfa
--- /dev/null
+++ b/sim/d30v/dc-short
@@ -0,0 +1,22 @@
+//
+//  Mitsubishi Electric Corp. D30V Simulator.
+//  Copyright (C) 1997, Free Software Foundation, Inc.
+//  Contributed by Cygnus Solutions Inc.
+//
+//  This file is part of GDB, the GNU debugger.
+//
+//  This program is free software; you can redistribute it and/or modify
+//  it under the terms of the GNU General Public License as published by
+//  the Free Software Foundation; either version 2 of the License, or
+//  (at your option) any later version.
+//
+//  This program is distributed in the hope that it will be useful,
+//  but WITHOUT ANY WARRANTY; without even the implied warranty of
+//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//  GNU General Public License for more details.
+//
+//  You should have received a copy of the GNU General Public License
+//  along with this program; if not, write to the Free Software
+//  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+switch: 4: 13: 4: 13
diff --git a/sim/d30v/engine.c b/sim/d30v/engine.c
new file mode 100644
index 0000000..402a2f5
--- /dev/null
+++ b/sim/d30v/engine.c
@@ -0,0 +1,493 @@
+/*  This file is part of the program psim.
+
+    Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
+    Copyright (C) 1996, 1997, Free Software Foundation
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ 
+    */
+
+
+#ifndef ENGINE_C
+#define ENGINE_C
+
+#include "sim-main.h"
+
+#include <stdio.h>
+#include <ctype.h>
+
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+
+static void
+do_stack_swap (SIM_DESC sd)
+{
+  sim_cpu *cpu = STATE_CPU (sd, 0);
+  unsigned new_sp = (PSW_VAL(PSW_SM) != 0);
+  if (cpu->regs.current_sp != new_sp)
+    {
+      cpu->regs.sp[cpu->regs.current_sp] = SP;
+      cpu->regs.current_sp = new_sp;
+      SP = cpu->regs.sp[cpu->regs.current_sp];
+    }
+}
+
+#if WITH_TRACE
+/* Implement ALU tracing of 32-bit registers.  */
+static void
+trace_alu32 (SIM_DESC sd,
+	     sim_cpu *cpu,
+	     address_word cia,
+	     unsigned32 *ptr)
+{
+  unsigned32 value = *ptr;
+
+  if (ptr >= &GPR[0] && ptr <= &GPR[NR_GENERAL_PURPOSE_REGISTERS])
+    trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu",
+		    "Set register r%-2d = 0x%.8lx (%ld)",
+		    ptr - &GPR[0], (long)value, (long)value);
+
+  else if (ptr == &PSW || ptr == &bPSW || ptr == &DPSW)
+    trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu",
+		    "Set register %s = 0x%.8lx%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
+		    (ptr == &PSW) ? "psw" : ((ptr == &bPSW) ? "bpsw" : "dpsw"),
+		    (long)value,
+		    (value & (0x80000000 >> PSW_SM)) ? ", sm" : "",
+		    (value & (0x80000000 >> PSW_EA)) ? ", ea" : "",
+		    (value & (0x80000000 >> PSW_DB)) ? ", db" : "",
+		    (value & (0x80000000 >> PSW_DS)) ? ", ds" : "",
+		    (value & (0x80000000 >> PSW_IE)) ? ", ie" : "",
+		    (value & (0x80000000 >> PSW_RP)) ? ", rp" : "",
+		    (value & (0x80000000 >> PSW_MD)) ? ", md" : "",
+		    (value & (0x80000000 >> PSW_F0)) ? ", f0" : "",
+		    (value & (0x80000000 >> PSW_F1)) ? ", f1" : "",
+		    (value & (0x80000000 >> PSW_F2)) ? ", f2" : "",
+		    (value & (0x80000000 >> PSW_F3)) ? ", f3" : "",
+		    (value & (0x80000000 >> PSW_S))  ? ", s"  : "",
+		    (value & (0x80000000 >> PSW_V))  ? ", v"  : "",
+		    (value & (0x80000000 >> PSW_VA)) ? ", va" : "",
+		    (value & (0x80000000 >> PSW_C))  ? ", c"  : "");
+
+  else if (ptr >= &CREG[0] && ptr <= &CREG[NR_CONTROL_REGISTERS])
+    trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu",
+		    "Set register cr%d = 0x%.8lx (%ld)",
+		    ptr - &CREG[0], (long)value, (long)value);
+}
+
+/* Implement ALU tracing of 32-bit registers.  */
+static void
+trace_alu64 (SIM_DESC sd,
+	     sim_cpu *cpu,
+	     address_word cia,
+	     unsigned64 *ptr)
+{
+  unsigned64 value = *ptr;
+
+  if (ptr >= &ACC[0] && ptr <= &ACC[NR_ACCUMULATORS])
+    trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu",
+		    "Set register a%-2d = 0x%.8lx 0x%.8lx",
+		    ptr - &ACC[0],
+		    (unsigned long)(unsigned32)(value >> 32),
+		    (unsigned long)(unsigned32)value);
+
+}
+#endif
+
+/* Process all of the queued up writes in order now */
+void
+unqueue_writes (SIM_DESC sd,
+		sim_cpu *cpu,
+		address_word cia)
+{
+  int i, num;
+  int did_psw = 0;
+  unsigned32 *psw_addr = &PSW;
+
+  num = WRITE32_NUM;
+  for (i = 0; i < num; i++)
+    {
+      unsigned32 mask = WRITE32_MASK (i);
+      unsigned32 *ptr = WRITE32_PTR (i);
+      unsigned32 value = (*ptr & ~mask) | (WRITE32_VALUE (i) & mask);
+      int j;
+
+      if (ptr == psw_addr)
+       {
+	  /* If MU instruction was not a MVTSYS (lkr), resolve PSW
+             contention in favour of IU. */
+	  if(! STATE_CPU (sd, 0)->left_kills_right_p)
+	    {
+	      /* Detect contention in parallel writes to the same PSW flags.
+		 The hardware allows the updates from IU to prevail over
+		 those from MU. */
+	      
+	      unsigned32 flag_bits =
+		BIT32 (PSW_F0) | BIT32 (PSW_F1) |
+		BIT32 (PSW_F2) | BIT32 (PSW_F3) |
+		BIT32 (PSW_S) | BIT32 (PSW_V) |
+		BIT32 (PSW_VA) | BIT32 (PSW_C);
+	      unsigned32 my_flag_bits = mask & flag_bits;
+	      
+	      for (j = i + 1; j < num; j++)
+		if (WRITE32_PTR (j) == psw_addr && /* write to PSW */
+		    WRITE32_MASK (j) & my_flag_bits)  /* some of the same flags */
+		  {
+		    /* Recompute local mask & value, to suppress this
+		       earlier write to the same flag bits. */
+		    
+		    unsigned32 new_mask = mask & ~(WRITE32_MASK (j) & my_flag_bits);
+		    
+		    /* There is a special case for the VA (accumulated
+		       overflow) flag, in that it is only included in the
+		       second instruction's mask if the overflow
+		       occurred.  Yet the hardware still suppresses the
+		       first instruction's update to VA.  So we kludge
+		       this by inferring PSW_V -> PSW_VA for the second
+		       instruction. */
+		    
+		    if (WRITE32_MASK (j) & BIT32 (PSW_V))
+		      {
+			new_mask &= ~BIT32 (PSW_VA);
+		      }
+		    
+		    value = (*ptr & ~new_mask) | (WRITE32_VALUE (i) & new_mask);
+		  }
+	    }
+	  
+         did_psw = 1;
+       }
+
+      *ptr = value;
+
+#if WITH_TRACE
+      if (TRACE_ALU_P (cpu))
+	trace_alu32 (sd, cpu, cia, ptr);
+#endif
+    }
+
+  num = WRITE64_NUM;
+  for (i = 0; i < num; i++)
+    {
+      unsigned64 *ptr = WRITE64_PTR (i);
+      *ptr = WRITE64_VALUE (i);
+
+#if WITH_TRACE
+      if (TRACE_ALU_P (cpu))
+	trace_alu64 (sd, cpu, cia, ptr);
+#endif
+    }
+
+  WRITE32_NUM = 0;
+  WRITE64_NUM = 0;
+
+  if (DID_TRAP == 1) /* ordinary trap */
+    {
+      bPSW = PSW;
+      PSW &= (BIT32 (PSW_DB) | BIT32 (PSW_SM));
+      did_psw = 1;
+    }
+  else if (DID_TRAP == 2) /* debug trap */
+    {
+      DPSW = PSW;
+      PSW &= BIT32 (PSW_DS);
+      PSW |= BIT32 (PSW_DS);
+      did_psw = 1;
+    }
+  DID_TRAP = 0;
+
+  if (did_psw)
+    do_stack_swap (sd);
+}
+
+
+/* SIMULATE INSTRUCTIONS, various different ways of achieving the same
+   thing */
+
+static address_word
+do_long (SIM_DESC sd,
+	 l_instruction_word instruction,
+	 address_word cia)
+{
+  address_word nia = l_idecode_issue(sd,
+				     instruction,
+				     cia);
+
+  unqueue_writes (sd, STATE_CPU (sd, 0), cia);
+  return nia;
+}
+
+static address_word
+do_2_short (SIM_DESC sd,
+	    s_instruction_word insn1,
+	    s_instruction_word insn2,
+	    cpu_units unit,
+	    address_word cia)
+{
+  address_word nia;
+
+  /* run the first instruction */
+  STATE_CPU (sd, 0)->unit = unit;
+  STATE_CPU (sd, 0)->left_kills_right_p = 0;
+  nia = s_idecode_issue(sd,
+			insn1,
+			cia);
+
+  unqueue_writes (sd, STATE_CPU (sd, 0), cia);
+
+  /* Only do the second instruction if the PC has not changed */
+  if ((nia == INVALID_INSTRUCTION_ADDRESS) &&
+      (! STATE_CPU (sd, 0)->left_kills_right_p)) {
+    STATE_CPU (sd, 0)->unit = any_unit;
+    nia = s_idecode_issue (sd,
+			   insn2,
+			   cia);
+
+    unqueue_writes (sd, STATE_CPU (sd, 0), cia);
+  }
+
+  STATE_CPU (sd, 0)->left_kills_right_p = 0;
+  return nia;
+}
+
+static address_word
+do_parallel (SIM_DESC sd,
+	     s_instruction_word left_insn,
+	     s_instruction_word right_insn,
+	     address_word cia)
+{
+  address_word nia_left;
+  address_word nia_right;
+  address_word nia;
+
+  /* run the first instruction */
+  STATE_CPU (sd, 0)->unit = memory_unit;
+  STATE_CPU (sd, 0)->left_kills_right_p = 0;
+  nia_left = s_idecode_issue(sd,
+			     left_insn,
+			     cia);
+
+  /* run the second instruction */
+  STATE_CPU (sd, 0)->unit = integer_unit;
+  nia_right = s_idecode_issue(sd,
+			      right_insn,
+			      cia);
+
+  /* merge the PC's */
+  if (nia_left == INVALID_INSTRUCTION_ADDRESS) {
+    if (nia_right == INVALID_INSTRUCTION_ADDRESS)
+      nia = INVALID_INSTRUCTION_ADDRESS;
+    else
+      nia = nia_right;
+  }
+  else {
+    if (nia_right == INVALID_INSTRUCTION_ADDRESS)
+      nia = nia_left;
+    else {
+      sim_engine_abort (sd, STATE_CPU (sd, 0), cia, "parallel jumps");
+      nia = INVALID_INSTRUCTION_ADDRESS;
+    }
+  }
+
+  unqueue_writes (sd, STATE_CPU (sd, 0), cia);
+  return nia;
+}
+
+
+typedef enum {
+  p_insn = 0,
+  long_insn = 3,
+  l_r_insn = 1,
+  r_l_insn = 2,
+} instruction_types;
+
+STATIC_INLINE instruction_types
+instruction_type(l_instruction_word insn)
+{
+  int fm0 = MASKED64(insn, 0, 0) != 0;
+  int fm1 = MASKED64(insn, 32, 32) != 0;
+  return ((fm0 << 1) | fm1);
+}
+
+
+
+void
+sim_engine_run (SIM_DESC sd,
+		int last_cpu_nr,
+		int nr_cpus,
+		int siggnal)
+{
+  while (1)
+    {
+      address_word cia = PC;
+      address_word nia;
+      l_instruction_word insn = IMEM(cia);
+      int rp_was_set;
+      int rpt_c_was_nonzero;
+
+      /* Before executing the instruction, we need to test whether or
+	 not RPT_C is greater than zero, and save that state for use
+	 after executing the instruction.  In particular, we need to
+	 not care whether the instruction changes RPT_C itself. */
+
+      rpt_c_was_nonzero = (RPT_C > 0);
+
+      /* Before executing the instruction, we need to check to see if
+	 we have to decrement RPT_C, the repeat count register.  Do this
+	 if PC == RPT_E, but only if we are in an active repeat block. */
+
+      if (PC == RPT_E &&
+	  (RPT_C > 0 || PSW_VAL (PSW_RP) != 0))
+	{
+	  RPT_C --;
+	}
+      
+      /* Now execute the instruction at PC */
+
+      switch (instruction_type (insn))
+	{
+	case long_insn:
+	  nia = do_long (sd, insn, cia);
+	  break;
+	case r_l_insn:
+	  /* L <- R */
+	  nia = do_2_short (sd, insn, insn >> 32, integer_unit, cia);
+	  break;
+	case l_r_insn:
+	  /* L -> R */
+	  nia = do_2_short (sd, insn >> 32, insn, memory_unit, cia);
+	  break;
+	case p_insn:
+	  nia = do_parallel (sd, insn >> 32, insn, cia);
+	  break;
+	default:
+	  sim_engine_abort (sd, STATE_CPU (sd, 0), cia,
+			    "internal error - engine_run_until_stop - bad switch");
+	  nia = -1;
+	}
+
+      if (TRACE_ACTION)
+	{
+	  if (TRACE_ACTION & TRACE_ACTION_CALL)
+	    call_occurred (sd, STATE_CPU (sd, 0), cia, nia);
+
+	  if (TRACE_ACTION & TRACE_ACTION_RETURN)
+	    return_occurred (sd, STATE_CPU (sd, 0), cia, nia);
+
+	  TRACE_ACTION = 0;
+	}
+
+      /* Check now to see if we need to reset the RP bit in the PSW.
+	 There are three conditions for this, the RP bit is already
+	 set (just a speed optimization), the instruction we just
+	 executed is the last instruction in the loop, and the repeat
+	 count is currently zero. */
+
+      rp_was_set = PSW_VAL (PSW_RP);
+      if (rp_was_set && (PC == RPT_E) && RPT_C == 0)
+	{
+	  PSW_SET (PSW_RP, 0);
+	}
+
+      /* Now update the PC.  If we just executed a jump instruction,
+	 that takes precedence over everything else.  Next comes
+	 branching back to RPT_S as a result of a loop.  Finally, the
+	 default is to simply advance to the next inline
+	 instruction. */
+
+      if (nia != INVALID_INSTRUCTION_ADDRESS)
+	{
+	  PC = nia;
+	}
+      else if (rp_was_set && rpt_c_was_nonzero && (PC == RPT_E))
+	{
+	  PC = RPT_S;
+	}
+      else
+	{
+	  PC = cia + 8;
+	}
+
+      /* Check for DDBT (debugger debug trap) condition.  Do this after
+	 the repeat block checks so the excursion to the trap handler does
+	 not alter looping state. */
+
+      if (cia == IBA && PSW_VAL (PSW_DB))
+	{
+	  DPC = PC;
+	  PSW_SET (PSW_EA, 1);
+	  DPSW = PSW;
+	  /* clear all bits in PSW except SM */
+	  PSW &= BIT32 (PSW_SM);
+	  /* add DS bit */
+	  PSW |= BIT32 (PSW_DS);
+	  /* dispatch to DDBT handler */
+	  PC = 0xfffff128; /* debugger_debug_trap_address */
+	}
+
+      /* process any events */
+      /* FIXME - should L->R or L<-R insns count as two cycles? */
+      if (sim_events_tick (sd))
+	{
+	  sim_events_process (sd);
+	}
+    }  
+}
+
+
+/* d30v external interrupt handler.
+
+   Note: This should be replaced by a proper interrupt delivery
+   mechanism.  This interrupt mechanism discards later interrupts if
+   an earlier interrupt hasn't been delivered.
+
+   Note: This interrupt mechanism does not reset its self when the
+   simulator is re-opened. */
+
+void
+d30v_interrupt_event (SIM_DESC sd,
+		      void *data)
+{
+  if (PSW_VAL (PSW_IE))
+    /* interrupts not masked */
+    {
+      /* scrub any pending interrupt */
+      if (sd->pending_interrupt != NULL)
+	sim_events_deschedule (sd, sd->pending_interrupt);
+      /* deliver */
+      bPSW = PSW;
+      bPC = PC;
+      PSW = 0;
+      PC = 0xfffff138; /* external interrupt */
+      do_stack_swap (sd);
+    }
+  else if (sd->pending_interrupt == NULL)
+    /* interrupts masked and no interrupt pending */
+    {
+      sd->pending_interrupt = sim_events_schedule (sd, 1,
+						   d30v_interrupt_event,
+						   data);
+    }
+}
+
+#endif
diff --git a/sim/d30v/ic-d30v b/sim/d30v/ic-d30v
new file mode 100644
index 0000000..50a184f
--- /dev/null
+++ b/sim/d30v/ic-d30v
@@ -0,0 +1,80 @@
+# Instruction cache rules
+#
+#   This file is part of the program psim.
+#
+#   Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
+#
+#   This program is free software; you can redistribute it and/or modify
+#   it under the terms of the GNU General Public License as published by
+#   the Free Software Foundation; either version 2 of the License, or
+#   (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be useful,
+#   but WITHOUT ANY WARRANTY; without even the implied warranty of
+#   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#   GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program; if not, write to the Free Software
+#   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+compute:RA:RA::
+compute:RA:Ra:signed32 *:(&GPR[RA])
+compute:RA:RaH:signed16 *:AH2_4(Ra)
+compute:RA:RaL:signed16 *:AL2_4(Ra)
+compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA])
+#
+compute:RB:RB::
+compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB])
+compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB])
+compute:RB:RbH:signed16:VH2_4(Rb)
+compute:RB:RbL:signed16:VL2_4(Rb)
+compute:RB:RbHU:unsigned16:VH2_4(Rb)
+compute:RB:RbLU:unsigned16:VL2_4(Rb)
+#
+compute:RC:RC::
+compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC])
+compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC])
+compute:RC:RcH:signed16:VH2_4(Rc)
+compute:RC:RcL:signed16:VL2_4(Rc)
+#
+#
+compute:IMM_6S:IMM_6S::
+compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6)
+# NB - for short imm[HL] are the same value
+compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31))
+compute:IMM_6S:immH:signed32:imm
+compute:IMM_6S:immL:signed32:imm
+compute:IMM_6S:imm_6:signed32:IMM_6S
+compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0)
+compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f)
+#
+compute:RC:pcdisp:signed32:(Rc & ~0x7)
+compute:RC:pcaddr:signed32:pcdisp
+#
+compute:IMM_18S:IMM_18S::
+compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3)
+compute:IMM_18S:pcaddr:signed32:pcdisp
+compute:IMM_12S:IMM_12S::
+compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3)
+compute:IMM_12S:pcaddr:signed32:pcdisp
+#
+compute:IMM_8L:IMM_8L::
+compute:IMM_18L:IMM_18L::
+compute:IMM_6L:IMM_6L::
+compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L)
+compute:IMM_6L:immHL:signed32:imm
+compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15)
+compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31)
+compute:IMM_6L:pcdisp:signed32:(imm & ~0x7)
+compute:IMM_6L:pcaddr:signed32:pcdisp
+#
+#
+compute:SRC_6:SRC_6::
+compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6])
+#
+#
+compute:AA:AA::
+compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA)
+compute:AB:AB::
+compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB)
diff --git a/sim/d30v/sim-calls.c b/sim/d30v/sim-calls.c
new file mode 100644
index 0000000..d319529
--- /dev/null
+++ b/sim/d30v/sim-calls.c
@@ -0,0 +1,364 @@
+/*  This file is part of the program psim.
+
+    Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
+    Copyright (C) 1997, Free Software Foundation
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ 
+    */
+
+
+#include <stdarg.h>
+#include <ctype.h>
+
+#include "sim-main.h"
+#include "sim-options.h"
+
+#include "bfd.h"
+#include "sim-utils.h"
+
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+
+static unsigned long extmem_size = 1024*1024*8;	/* 8 meg is the maximum listed in the arch. manual */
+
+static const char * get_insn_name (sim_cpu *, int);
+
+#define SIM_ADDR unsigned
+
+
+#define OPTION_TRACE_CALL	200
+#define OPTION_TRACE_TRAPDUMP	201
+#define OPTION_EXTMEM_SIZE	202
+
+static SIM_RC
+d30v_option_handler (SIM_DESC sd,
+		     sim_cpu *cpu,
+		     int opt,
+		     char *arg,
+		     int command_p)
+{
+  char *suffix;
+
+  switch (opt)
+    {
+    default:
+      break;
+
+    case OPTION_TRACE_CALL:
+      if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0)
+	TRACE_CALL_P = 1;
+      else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0)
+	TRACE_CALL_P = 0;
+      else
+	{
+	  sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg);
+	  return SIM_RC_FAIL;
+	}
+      return SIM_RC_OK;
+
+    case OPTION_TRACE_TRAPDUMP:
+      if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0)
+	TRACE_TRAP_P = 1;
+      else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0)
+	TRACE_TRAP_P = 0;
+      else
+	{
+	  sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg);
+	  return SIM_RC_FAIL;
+	}
+      return SIM_RC_OK;
+
+    case OPTION_EXTMEM_SIZE:
+      if (arg == NULL || !isdigit (*arg))
+	{
+	  sim_io_eprintf (sd, "Invalid memory size `%s'", arg);
+	  return SIM_RC_FAIL;
+	}
+
+      suffix = arg;
+      extmem_size = strtol (arg, &suffix, 0);
+      if (*suffix == 'm' || *suffix == 'M')
+	extmem_size <<= 20;
+      else if (*suffix == 'k' || *suffix == 'K')
+	extmem_size <<= 10;
+      sim_do_commandf (sd, "memory delete 0x80000000");
+      sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size);
+
+      return SIM_RC_OK;
+    }
+
+  sim_io_eprintf (sd, "Unknown option (%d)\n", opt);
+  return SIM_RC_FAIL;
+}
+
+static const OPTION d30v_options[] =
+{
+  { {"trace-call", optional_argument, NULL, OPTION_TRACE_CALL},
+      '\0', "on|off", "Enable tracing of calls and returns, checking saved registers",
+      d30v_option_handler },
+  { {"trace-trapdump", optional_argument, NULL, OPTION_TRACE_TRAPDUMP},
+      '\0', "on|off",
+#if TRAPDUMP
+    "Traps 0..30 dump out all of the registers (defaults on)",
+#else
+    "Traps 0..30 dump out all of the registers",
+#endif
+      d30v_option_handler },
+  { {"extmem-size", required_argument, NULL, OPTION_EXTMEM_SIZE},
+    '\0', "size", "Change size of external memory, default 8 meg",
+    d30v_option_handler },
+  { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
+};
+
+/* Return name of an insn, used by insn profiling.  */
+
+static const char *
+get_insn_name (sim_cpu *cpu, int i)
+{
+  return itable[i].name;
+}
+
+/* Structures used by the simulator, for gdb just have static structures */
+
+SIM_DESC
+sim_open (SIM_OPEN_KIND kind,
+	  host_callback *callback,
+	  struct _bfd *abfd,
+	  char **argv)
+{
+  SIM_DESC sd = sim_state_alloc (kind, callback);
+
+  /* FIXME: watchpoints code shouldn't need this */
+  STATE_WATCHPOINTS (sd)->pc = &(PC);
+  STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
+  STATE_WATCHPOINTS (sd)->interrupt_handler = d30v_interrupt_event;
+
+  /* Initialize the mechanism for doing insn profiling.  */
+  CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name;
+  CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries;
+
+#ifdef TRAPDUMP
+  TRACE_TRAP_P = TRAPDUMP;
+#endif
+
+  if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
+    return 0;
+  sim_add_option_table (sd, NULL, d30v_options);
+
+  /* Memory and EEPROM */
+  /* internal instruction RAM - fixed */
+  sim_do_commandf (sd, "memory region 0,0x10000");
+  /* internal data RAM - fixed */
+  sim_do_commandf (sd, "memory region 0x20000000,0x8000");
+  /* control register dummy area */
+  sim_do_commandf (sd, "memory region 0x40000000,0x10000");
+  /* external RAM */
+  sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size);
+  /* EIT RAM */
+  sim_do_commandf (sd, "memory region 0xfffff000,0x1000");
+
+  /* getopt will print the error message so we just have to exit if this fails.
+     FIXME: Hmmm...  in the case of gdb we need getopt to call
+     print_filtered.  */
+  if (sim_parse_args (sd, argv) != SIM_RC_OK)
+    {
+      /* Uninstall the modules to avoid memory leaks,
+	 file descriptor leaks, etc.  */
+      sim_module_uninstall (sd);
+      return 0;
+    }
+
+  /* check for/establish the a reference program image */
+  if (sim_analyze_program (sd,
+			   (STATE_PROG_ARGV (sd) != NULL
+			    ? *STATE_PROG_ARGV (sd)
+			    : NULL),
+			   abfd) != SIM_RC_OK)
+    {
+      sim_module_uninstall (sd);
+      return 0;
+    }
+
+  /* establish any remaining configuration options */
+  if (sim_config (sd) != SIM_RC_OK)
+    {
+      sim_module_uninstall (sd);
+      return 0;
+    }
+
+  if (sim_post_argv_init (sd) != SIM_RC_OK)
+    {
+      /* Uninstall the modules to avoid memory leaks,
+	 file descriptor leaks, etc.  */
+      sim_module_uninstall (sd);
+      return 0;
+    }
+
+  return sd;
+}
+
+
+void
+sim_close (SIM_DESC sd, int quitting)
+{
+  /* Uninstall the modules to avoid memory leaks,
+     file descriptor leaks, etc.  */
+  sim_module_uninstall (sd);
+}
+
+
+SIM_RC
+sim_create_inferior (SIM_DESC sd,
+		     struct _bfd *abfd,
+		     char **argv,
+		     char **envp)
+{
+  /* clear all registers */
+  memset (&STATE_CPU (sd, 0)->regs, 0, sizeof (STATE_CPU (sd, 0)->regs));
+  EIT_VB = EIT_VB_DEFAULT;
+  STATE_CPU (sd, 0)->unit = any_unit;
+  sim_module_init (sd);
+  if (abfd != NULL)
+    PC = bfd_get_start_address (abfd);
+  else
+    PC = 0xfffff000; /* reset value */
+  return SIM_RC_OK;
+}
+
+void
+sim_do_command (SIM_DESC sd, char *cmd)
+{
+  if (sim_args_command (sd, cmd) != SIM_RC_OK)
+    sim_io_printf (sd, "Unknown command `%s'\n", cmd);
+}
+
+/* The following register definitions were ripped off from
+   gdb/config/tm-d30v.h.  If any of those defs changes, this table needs to
+   be updated.  */
+
+#define NUM_REGS 86
+
+#define R0_REGNUM	0
+#define FP_REGNUM	11
+#define LR_REGNUM 	62
+#define SP_REGNUM 	63
+#define SPI_REGNUM	64	/* Interrupt stack pointer */
+#define SPU_REGNUM	65	/* User stack pointer */
+#define CREGS_START	66
+
+#define PSW_REGNUM 	(CREGS_START + 0) /* psw, bpsw, or dpsw??? */
+#define    PSW_SM 0x80000000	/* Stack mode: 0 == interrupt (SPI),
+					       1 == user (SPU) */
+#define BPSW_REGNUM	(CREGS_START + 1) /* Backup PSW (on interrupt) */
+#define PC_REGNUM 	(CREGS_START + 2) /* pc, bpc, or dpc??? */
+#define BPC_REGNUM 	(CREGS_START + 3) /* Backup PC (on interrupt) */
+#define DPSW_REGNUM	(CREGS_START + 4) /* Backup PSW (on debug trap) */
+#define DPC_REGNUM 	(CREGS_START + 5) /* Backup PC (on debug trap) */
+#define RPT_C_REGNUM	(CREGS_START + 7) /* Loop count */
+#define RPT_S_REGNUM	(CREGS_START + 8) /* Loop start address*/
+#define RPT_E_REGNUM	(CREGS_START + 9) /* Loop end address */
+#define MOD_S_REGNUM	(CREGS_START + 10)
+#define MOD_E_REGNUM	(CREGS_START + 11)
+#define IBA_REGNUM	(CREGS_START + 14) /* Instruction break address */
+#define EIT_VB_REGNUM	(CREGS_START + 15) /* Vector base address */
+#define INT_S_REGNUM	(CREGS_START + 16) /* Interrupt status */
+#define INT_M_REGNUM	(CREGS_START + 17) /* Interrupt mask */
+#define A0_REGNUM 	84
+#define A1_REGNUM 	85
+
+int
+sim_fetch_register (sd, regno, buf, length)
+     SIM_DESC sd;
+     int regno;
+     unsigned char *buf;
+     int length;
+{
+  if (regno < A0_REGNUM)
+    {
+      unsigned32 reg;
+
+      if (regno <= R0_REGNUM + 63)
+	reg = sd->cpu[0].regs.general_purpose[regno];
+      else if (regno <= SPU_REGNUM)
+	reg = sd->cpu[0].regs.sp[regno - SPI_REGNUM];
+      else
+	reg = sd->cpu[0].regs.control[regno - CREGS_START];
+
+      buf[0] = reg >> 24;
+      buf[1] = reg >> 16;
+      buf[2] = reg >> 8;
+      buf[3] = reg;
+    }
+  else if (regno < NUM_REGS)
+    {
+      unsigned32 reg;
+
+      reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM] >> 32;
+
+      buf[0] = reg >> 24;
+      buf[1] = reg >> 16;
+      buf[2] = reg >> 8;
+      buf[3] = reg;
+
+      reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM];
+
+      buf[4] = reg >> 24;
+      buf[5] = reg >> 16;
+      buf[6] = reg >> 8;
+      buf[7] = reg;
+    }
+  else
+    abort ();
+  return -1;
+}
+
+int
+sim_store_register (sd, regno, buf, length)
+     SIM_DESC sd;
+     int regno;
+     unsigned char *buf;
+     int length;
+{
+  if (regno < A0_REGNUM)
+    {
+      unsigned32 reg;
+
+      reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
+
+      if (regno <= R0_REGNUM + 63)
+	sd->cpu[0].regs.general_purpose[regno] = reg;
+      else if (regno <= SPU_REGNUM)
+	sd->cpu[0].regs.sp[regno - SPI_REGNUM] = reg;
+      else
+	sd->cpu[0].regs.control[regno - CREGS_START] = reg;
+    }
+  else if (regno < NUM_REGS)
+    {
+      unsigned32 reg;
+
+      reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
+
+      sd->cpu[0].regs.accumulator[regno - A0_REGNUM] = (unsigned64)reg << 32;
+
+      reg = (buf[4] << 24) | (buf[5] << 16) | (buf[6] << 8) | buf[7];
+
+      sd->cpu[0].regs.accumulator[regno - A0_REGNUM] |= reg;
+    }
+  else
+    abort ();
+  return -1;
+}
diff --git a/sim/d30v/sim-main.h b/sim/d30v/sim-main.h
new file mode 100644
index 0000000..4db8aa0
--- /dev/null
+++ b/sim/d30v/sim-main.h
@@ -0,0 +1,82 @@
+/*  This file is part of the program psim.
+
+    Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
+    Copyright (C) 1997, 1998, Free Software Foundation
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ 
+    */
+
+
+#ifndef _SIM_MAIN_H_
+#define _SIM_MAIN_H_
+
+/* This simulator suports watchpoints */
+#define WITH_WATCHPOINTS 1
+
+#include "sim-basics.h"
+#include "sim-signal.h"
+
+/* needed */
+typedef address_word sim_cia;
+#define INVALID_INSTRUCTION_ADDRESS ((address_word) 0 - 1)
+
+/* This simulator doesn't cache anything so no saving of context is
+   needed during either of a halt or restart */
+#define SIM_ENGINE_HALT_HOOK(SD,CPU,CIA) while (0)
+#define SIM_ENGINE_RESTART_HOOK(SD,CPU,CIA) while (0)
+
+#include "sim-base.h"
+
+/* These are generated files.  */
+#include "itable.h"
+#include "s_idecode.h"
+#include "l_idecode.h"
+
+#include "cpu.h"
+#include "alu.h"
+
+
+struct sim_state {
+
+  sim_event *pending_interrupt;
+
+  /* the processors proper */
+  sim_cpu cpu[MAX_NR_PROCESSORS];
+#if (WITH_SMP)
+#define STATE_CPU(sd, n) (&(sd)->cpu[n])
+#else
+#define STATE_CPU(sd, n) (&(sd)->cpu[0])
+#endif
+
+  /* The base class.  */
+  sim_state_base base;
+
+};
+
+
+/* deliver an interrupt */
+sim_event_handler d30v_interrupt_event;
+
+
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+
+#endif /* _SIM_MAIN_H_ */
diff --git a/sim/d30v/tconfig.in b/sim/d30v/tconfig.in
new file mode 100644
index 0000000..c742b36
--- /dev/null
+++ b/sim/d30v/tconfig.in
@@ -0,0 +1,4 @@
+/* D30V target configuration file.  -*- C -*- */
+
+/* Define this to enable the intrinsic breakpoint mechanism. */
+#define SIM_HAVE_BREAKPOINTS