diff options
| author | nobody <> | 2002-09-07 00:00:05 +0000 |
|---|---|---|
| committer | nobody <> | 2002-09-07 00:00:05 +0000 |
| commit | c1aa2a27e755c883b5c49b223120dfb712ea4e28 (patch) | |
| tree | a98633075cd1f2b034b49446e83e522708d11f68 /sim/d10v/interp.c | |
| parent | 2e3c0e2427295c9cc09a8a707dfba38d50e2ba30 (diff) | |
| download | gdb-sid-20020905-branch.zip gdb-sid-20020905-branch.tar.gz gdb-sid-20020905-branch.tar.bz2 | |
This commit was manufactured by cvs2svn to create branchsid-20020905-branchpointsid-20020905-branch
'sid-20020905-branch'.
Sprout from gdb_5_3-branch 2002-09-03 22:29:15 UTC nobody 'This commit was manufactured by cvs2svn to create branch 'gdb_5_3-branch'.'
Cherrypick from master 2002-09-07 00:00:04 UTC Alan Modra <amodra@gmail.com> 'daily update':
bfd/ChangeLog
bfd/config.bfd
bfd/version.h
include/ChangeLog
include/dis-asm.h
libiberty/ChangeLog
libiberty/regex.c
opcodes/ChangeLog
opcodes/disassemble.c
opcodes/ppc-dis.c
opcodes/ppc-opc.c
Delete:
djunpack.bat
gdb/CONTRIBUTE
gdb/COPYING
gdb/ChangeLog
gdb/ChangeLog-1990
gdb/ChangeLog-1991
gdb/ChangeLog-1992
gdb/ChangeLog-1993
gdb/ChangeLog-1994
gdb/ChangeLog-1995
gdb/ChangeLog-1996
gdb/ChangeLog-1997
gdb/ChangeLog-1998
gdb/ChangeLog-1999
gdb/ChangeLog-2000
gdb/ChangeLog-2001
gdb/ChangeLog-3.x
gdb/MAINTAINERS
gdb/Makefile.in
gdb/NEWS
gdb/PROBLEMS
gdb/README
gdb/TODO
gdb/a68v-nat.c
gdb/abug-rom.c
gdb/acconfig.h
gdb/acinclude.m4
gdb/aclocal.m4
gdb/ada-exp.y
gdb/ada-lang.c
gdb/ada-lang.h
gdb/ada-lex.l
gdb/ada-tasks.c
gdb/ada-typeprint.c
gdb/ada-valprint.c
gdb/aix-thread.c
gdb/alpha-linux-tdep.c
gdb/alpha-nat.c
gdb/alpha-osf1-tdep.c
gdb/alpha-tdep.c
gdb/alpha-tdep.h
gdb/alphabsd-nat.c
gdb/alphabsd-tdep.c
gdb/alphabsd-tdep.h
gdb/alphafbsd-tdep.c
gdb/alphanbsd-tdep.c
gdb/annotate.c
gdb/annotate.h
gdb/arc-tdep.c
gdb/arch-utils.c
gdb/arch-utils.h
gdb/arm-linux-nat.c
gdb/arm-linux-tdep.c
gdb/arm-tdep.c
gdb/arm-tdep.h
gdb/armnbsd-nat.c
gdb/armnbsd-tdep.c
gdb/avr-tdep.c
gdb/ax-gdb.c
gdb/ax-gdb.h
gdb/ax-general.c
gdb/ax.h
gdb/bcache.c
gdb/bcache.h
gdb/blockframe.c
gdb/breakpoint.c
gdb/breakpoint.h
gdb/buildsym.c
gdb/buildsym.h
gdb/builtin-regs.c
gdb/builtin-regs.h
gdb/c-exp.y
gdb/c-lang.c
gdb/c-lang.h
gdb/c-typeprint.c
gdb/c-valprint.c
gdb/call-cmds.h
gdb/ch-exp.c
gdb/ch-lang.c
gdb/ch-lang.h
gdb/ch-typeprint.c
gdb/ch-valprint.c
gdb/cli-out.c
gdb/cli-out.h
gdb/cli/cli-cmds.c
gdb/cli/cli-cmds.h
gdb/cli/cli-decode.c
gdb/cli/cli-decode.h
gdb/cli/cli-dump.c
gdb/cli/cli-dump.h
gdb/cli/cli-script.c
gdb/cli/cli-script.h
gdb/cli/cli-setshow.c
gdb/cli/cli-setshow.h
gdb/cli/cli-utils.c
gdb/cli/cli-utils.h
gdb/coff-solib.c
gdb/coff-solib.h
gdb/coffread.c
gdb/command.h
gdb/complaints.c
gdb/complaints.h
gdb/completer.c
gdb/completer.h
gdb/config.in
gdb/config/alpha/alpha-linux.mh
gdb/config/alpha/alpha-linux.mt
gdb/config/alpha/alpha-osf1.mh
gdb/config/alpha/alpha-osf1.mt
gdb/config/alpha/alpha-osf2.mh
gdb/config/alpha/alpha-osf3.mh
gdb/config/alpha/alpha.mt
gdb/config/alpha/fbsd.mh
gdb/config/alpha/fbsd.mt
gdb/config/alpha/nbsd.mh
gdb/config/alpha/nbsd.mt
gdb/config/alpha/nm-fbsd.h
gdb/config/alpha/nm-linux.h
gdb/config/alpha/nm-nbsd.h
gdb/config/alpha/nm-osf.h
gdb/config/alpha/nm-osf2.h
gdb/config/alpha/nm-osf3.h
gdb/config/alpha/tm-alpha.h
gdb/config/alpha/tm-alphalinux.h
gdb/config/alpha/tm-fbsd.h
gdb/config/alpha/tm-nbsd.h
gdb/config/alpha/xm-alphalinux.h
gdb/config/alpha/xm-alphaosf.h
gdb/config/arc/arc.mt
gdb/config/arc/tm-arc.h
gdb/config/arm/embed.mt
gdb/config/arm/linux.mh
gdb/config/arm/linux.mt
gdb/config/arm/nbsd.mt
gdb/config/arm/nbsdaout.mh
gdb/config/arm/nbsdelf.mh
gdb/config/arm/nm-linux.h
gdb/config/arm/nm-nbsd.h
gdb/config/arm/nm-nbsdaout.h
gdb/config/arm/tm-arm.h
gdb/config/arm/tm-embed.h
gdb/config/arm/tm-linux.h
gdb/config/arm/tm-wince.h
gdb/config/arm/wince.mt
gdb/config/arm/xm-linux.h
gdb/config/arm/xm-nbsd.h
gdb/config/avr/avr.mt
gdb/config/cris/cris.mt
gdb/config/cris/tm-cris.h
gdb/config/d10v/d10v.mt
gdb/config/d30v/d30v.mt
gdb/config/d30v/tm-d30v.h
gdb/config/djgpp/README
gdb/config/djgpp/config.sed
gdb/config/djgpp/djcheck.sh
gdb/config/djgpp/djconfig.sh
gdb/config/djgpp/fnchange.lst
gdb/config/fr30/fr30.mt
gdb/config/fr30/tm-fr30.h
gdb/config/frv/frv.mt
gdb/config/frv/tm-frv.h
gdb/config/h8300/h8300.mt
gdb/config/h8300/tm-h8300.h
gdb/config/h8500/h8500.mt
gdb/config/h8500/tm-h8500.h
gdb/config/i386/cygwin.mh
gdb/config/i386/cygwin.mt
gdb/config/i386/embed.mt
gdb/config/i386/fbsd.mh
gdb/config/i386/fbsd.mt
gdb/config/i386/gdbserve.mt
gdb/config/i386/go32.mh
gdb/config/i386/go32.mt
gdb/config/i386/i386aix.mh
gdb/config/i386/i386aix.mt
gdb/config/i386/i386aout.mt
gdb/config/i386/i386bsd.mh
gdb/config/i386/i386bsd.mt
gdb/config/i386/i386dgux.mh
gdb/config/i386/i386gnu.mh
gdb/config/i386/i386gnu.mt
gdb/config/i386/i386lynx.mh
gdb/config/i386/i386lynx.mt
gdb/config/i386/i386m3.mh
gdb/config/i386/i386m3.mt
gdb/config/i386/i386mach.mh
gdb/config/i386/i386mk.mh
gdb/config/i386/i386mk.mt
gdb/config/i386/i386nw.mt
gdb/config/i386/i386os9k.mt
gdb/config/i386/i386sco.mh
gdb/config/i386/i386sco4.mh
gdb/config/i386/i386sco5.mh
gdb/config/i386/i386sco5.mt
gdb/config/i386/i386sol2.mh
gdb/config/i386/i386sol2.mt
gdb/config/i386/i386v.mh
gdb/config/i386/i386v.mt
gdb/config/i386/i386v32.mh
gdb/config/i386/i386v4.mh
gdb/config/i386/i386v4.mt
gdb/config/i386/i386v42mp.mh
gdb/config/i386/i386v42mp.mt
gdb/config/i386/linux.mh
gdb/config/i386/linux.mt
gdb/config/i386/nbsd.mt
gdb/config/i386/nbsdaout.mh
gdb/config/i386/nbsdelf.mh
gdb/config/i386/ncr3000.mh
gdb/config/i386/ncr3000.mt
gdb/config/i386/nm-cygwin.h
gdb/config/i386/nm-fbsd.h
gdb/config/i386/nm-go32.h
gdb/config/i386/nm-i386.h
gdb/config/i386/nm-i386aix.h
gdb/config/i386/nm-i386bsd.h
gdb/config/i386/nm-i386gnu.h
gdb/config/i386/nm-i386lynx.h
gdb/config/i386/nm-i386mach.h
gdb/config/i386/nm-i386sco.h
gdb/config/i386/nm-i386sco4.h
gdb/config/i386/nm-i386sco5.h
gdb/config/i386/nm-i386sol2.h
gdb/config/i386/nm-i386v.h
gdb/config/i386/nm-i386v4.h
gdb/config/i386/nm-i386v42mp.h
gdb/config/i386/nm-linux.h
gdb/config/i386/nm-m3.h
gdb/config/i386/nm-nbsd.h
gdb/config/i386/nm-nbsdaout.h
gdb/config/i386/nm-obsd.h
gdb/config/i386/nm-ptx4.h
gdb/config/i386/nm-symmetry.h
gdb/config/i386/nm-x86-64linux.h
gdb/config/i386/obsd.mh
gdb/config/i386/ptx.mh
gdb/config/i386/ptx.mt
gdb/config/i386/ptx4.mh
gdb/config/i386/ptx4.mt
gdb/config/i386/symmetry.mh
gdb/config/i386/symmetry.mt
gdb/config/i386/tm-cygwin.h
gdb/config/i386/tm-fbsd.h
gdb/config/i386/tm-go32.h
gdb/config/i386/tm-i386.h
gdb/config/i386/tm-i386aix.h
gdb/config/i386/tm-i386bsd.h
gdb/config/i386/tm-i386lynx.h
gdb/config/i386/tm-i386m3.h
gdb/config/i386/tm-i386mk.h
gdb/config/i386/tm-i386os9k.h
gdb/config/i386/tm-i386sol2.h
gdb/config/i386/tm-i386v4.h
gdb/config/i386/tm-i386v42mp.h
gdb/config/i386/tm-linux.h
gdb/config/i386/tm-nbsd.h
gdb/config/i386/tm-ptx.h
gdb/config/i386/tm-ptx4.h
gdb/config/i386/tm-symmetry.h
gdb/config/i386/tm-vxworks.h
gdb/config/i386/tm-x86-64linux.h
gdb/config/i386/vxworks.mt
gdb/config/i386/x86-64linux.mh
gdb/config/i386/x86-64linux.mt
gdb/config/i386/xm-cygwin.h
gdb/config/i386/xm-go32.h
gdb/config/i386/xm-i386.h
gdb/config/i386/xm-i386aix.h
gdb/config/i386/xm-i386bsd.h
gdb/config/i386/xm-i386m3.h
gdb/config/i386/xm-i386mach.h
gdb/config/i386/xm-i386mk.h
gdb/config/i386/xm-i386sco.h
gdb/config/i386/xm-i386v.h
gdb/config/i386/xm-i386v32.h
gdb/config/i386/xm-i386v4.h
gdb/config/i386/xm-nbsd.h
gdb/config/i386/xm-ptx.h
gdb/config/i386/xm-ptx4.h
gdb/config/i386/xm-symmetry.h
gdb/config/i960/mon960.mt
gdb/config/i960/nindy960.mt
gdb/config/i960/tm-i960.h
gdb/config/i960/tm-mon960.h
gdb/config/i960/tm-nindy960.h
gdb/config/i960/tm-vx960.h
gdb/config/i960/vxworks960.mt
gdb/config/ia64/aix.mh
gdb/config/ia64/aix.mt
gdb/config/ia64/ia64.mt
gdb/config/ia64/linux.mh
gdb/config/ia64/linux.mt
gdb/config/ia64/nm-aix.h
gdb/config/ia64/nm-linux.h
gdb/config/ia64/tm-aix.h
gdb/config/ia64/tm-ia64.h
gdb/config/ia64/tm-linux.h
gdb/config/ia64/xm-aix.h
gdb/config/ia64/xm-linux.h
gdb/config/m32r/m32r.mt
gdb/config/m32r/tm-m32r.h
gdb/config/m68hc11/m68hc11.mt
gdb/config/m68k/3b1.mh
gdb/config/m68k/3b1.mt
gdb/config/m68k/apollo68b.mh
gdb/config/m68k/apollo68b.mt
gdb/config/m68k/apollo68v.mh
gdb/config/m68k/cisco.mt
gdb/config/m68k/delta68.mh
gdb/config/m68k/delta68.mt
gdb/config/m68k/dpx2.mh
gdb/config/m68k/dpx2.mt
gdb/config/m68k/es1800.mt
gdb/config/m68k/hp300bsd.mh
gdb/config/m68k/hp300bsd.mt
gdb/config/m68k/hp300hpux.mh
gdb/config/m68k/hp300hpux.mt
gdb/config/m68k/linux.mh
gdb/config/m68k/linux.mt
gdb/config/m68k/m68klynx.mh
gdb/config/m68k/m68klynx.mt
gdb/config/m68k/m68kv4.mh
gdb/config/m68k/m68kv4.mt
gdb/config/m68k/monitor.mt
gdb/config/m68k/nbsdaout.mh
gdb/config/m68k/nbsdaout.mt
gdb/config/m68k/nm-apollo68b.h
gdb/config/m68k/nm-apollo68v.h
gdb/config/m68k/nm-delta68.h
gdb/config/m68k/nm-dpx2.h
gdb/config/m68k/nm-hp300bsd.h
gdb/config/m68k/nm-hp300hpux.h
gdb/config/m68k/nm-linux.h
gdb/config/m68k/nm-m68klynx.h
gdb/config/m68k/nm-nbsd.h
gdb/config/m68k/nm-nbsdaout.h
gdb/config/m68k/nm-sun2.h
gdb/config/m68k/nm-sun3.h
gdb/config/m68k/nm-sysv4.h
gdb/config/m68k/os68k.mt
gdb/config/m68k/st2000.mt
gdb/config/m68k/sun2os3.mh
gdb/config/m68k/sun2os3.mt
gdb/config/m68k/sun2os4.mh
gdb/config/m68k/sun2os4.mt
gdb/config/m68k/sun3os3.mh
gdb/config/m68k/sun3os3.mt
gdb/config/m68k/sun3os4.mh
gdb/config/m68k/sun3os4.mt
gdb/config/m68k/tm-3b1.h
gdb/config/m68k/tm-apollo68b.h
gdb/config/m68k/tm-cisco.h
gdb/config/m68k/tm-delta68.h
gdb/config/m68k/tm-dpx2.h
gdb/config/m68k/tm-es1800.h
gdb/config/m68k/tm-hp300bsd.h
gdb/config/m68k/tm-hp300hpux.h
gdb/config/m68k/tm-linux.h
gdb/config/m68k/tm-m68k.h
gdb/config/m68k/tm-m68klynx.h
gdb/config/m68k/tm-m68kv4.h
gdb/config/m68k/tm-mac.h
gdb/config/m68k/tm-monitor.h
gdb/config/m68k/tm-nbsd.h
gdb/config/m68k/tm-os68k.h
gdb/config/m68k/tm-st2000.h
gdb/config/m68k/tm-sun2.h
gdb/config/m68k/tm-sun2os4.h
gdb/config/m68k/tm-sun3.h
gdb/config/m68k/tm-sun3os4.h
gdb/config/m68k/tm-vx68.h
gdb/config/m68k/vxworks68.mt
gdb/config/m68k/xm-3b1.h
gdb/config/m68k/xm-apollo68b.h
gdb/config/m68k/xm-apollo68v.h
gdb/config/m68k/xm-delta68.h
gdb/config/m68k/xm-dpx2.h
gdb/config/m68k/xm-hp300bsd.h
gdb/config/m68k/xm-hp300hpux.h
gdb/config/m68k/xm-linux.h
gdb/config/m68k/xm-m68k.h
gdb/config/m68k/xm-m68kv4.h
gdb/config/m68k/xm-nbsd.h
gdb/config/m68k/xm-sun2.h
gdb/config/m68k/xm-sun3.h
gdb/config/m68k/xm-sun3os4.h
gdb/config/m88k/delta88.mh
gdb/config/m88k/delta88.mt
gdb/config/m88k/delta88v4.mh
gdb/config/m88k/delta88v4.mt
gdb/config/m88k/m88k.mh
gdb/config/m88k/m88k.mt
gdb/config/m88k/nm-delta88v4.h
gdb/config/m88k/nm-m88k.h
gdb/config/m88k/tm-delta88.h
gdb/config/m88k/tm-delta88v4.h
gdb/config/m88k/tm-m88k.h
gdb/config/m88k/xm-delta88.h
gdb/config/m88k/xm-delta88v4.h
gdb/config/m88k/xm-dgux.h
gdb/config/mcore/mcore.mt
gdb/config/mips/bigmips.mt
gdb/config/mips/bigmips64.mt
gdb/config/mips/decstation.mh
gdb/config/mips/decstation.mt
gdb/config/mips/embed.mt
gdb/config/mips/embed64.mt
gdb/config/mips/embedl.mt
gdb/config/mips/embedl64.mt
gdb/config/mips/irix3.mh
gdb/config/mips/irix3.mt
gdb/config/mips/irix4.mh
gdb/config/mips/irix5.mh
gdb/config/mips/irix5.mt
gdb/config/mips/irix6.mh
gdb/config/mips/irix6.mt
gdb/config/mips/linux.mh
gdb/config/mips/linux.mt
gdb/config/mips/littlemips.mh
gdb/config/mips/littlemips.mt
gdb/config/mips/mipsm3.mh
gdb/config/mips/mipsm3.mt
gdb/config/mips/mipsv4.mh
gdb/config/mips/mipsv4.mt
gdb/config/mips/nbsd.mh
gdb/config/mips/nbsd.mt
gdb/config/mips/news-mips.mh
gdb/config/mips/nm-irix3.h
gdb/config/mips/nm-irix4.h
gdb/config/mips/nm-irix5.h
gdb/config/mips/nm-irix6.h
gdb/config/mips/nm-linux.h
gdb/config/mips/nm-mips.h
gdb/config/mips/nm-nbsd.h
gdb/config/mips/nm-news-mips.h
gdb/config/mips/nm-riscos.h
gdb/config/mips/riscos.mh
gdb/config/mips/tm-bigmips.h
gdb/config/mips/tm-bigmips64.h
gdb/config/mips/tm-embed.h
gdb/config/mips/tm-embed64.h
gdb/config/mips/tm-embedl.h
gdb/config/mips/tm-embedl64.h
gdb/config/mips/tm-irix3.h
gdb/config/mips/tm-irix5.h
gdb/config/mips/tm-irix6.h
gdb/config/mips/tm-linux.h
gdb/config/mips/tm-mips.h
gdb/config/mips/tm-mips64.h
gdb/config/mips/tm-mipsm3.h
gdb/config/mips/tm-mipsv4.h
gdb/config/mips/tm-nbsd.h
gdb/config/mips/tm-tx39.h
gdb/config/mips/tm-tx39l.h
gdb/config/mips/tm-vr4100.h
gdb/config/mips/tm-vr4300.h
gdb/config/mips/tm-vr4300el.h
gdb/config/mips/tm-vr4xxx.h
gdb/config/mips/tm-vr4xxxel.h
gdb/config/mips/tm-vr5000.h
gdb/config/mips/tm-vr5000el.h
gdb/config/mips/tm-vxmips.h
gdb/config/mips/tm-wince.h
gdb/config/mips/tx39.mt
gdb/config/mips/tx39l.mt
gdb/config/mips/vr4100.mt
gdb/config/mips/vr4300.mt
gdb/config/mips/vr4300el.mt
gdb/config/mips/vr4xxx.mt
gdb/config/mips/vr4xxxel.mt
gdb/config/mips/vr5000.mt
gdb/config/mips/vr5000el.mt
gdb/config/mips/vxmips.mt
gdb/config/mips/wince.mt
gdb/config/mips/xm-irix3.h
gdb/config/mips/xm-irix4.h
gdb/config/mips/xm-irix5.h
gdb/config/mips/xm-irix6.h
gdb/config/mips/xm-linux.h
gdb/config/mips/xm-mips.h
gdb/config/mips/xm-mipsm3.h
gdb/config/mips/xm-mipsv4.h
gdb/config/mips/xm-riscos.h
gdb/config/mn10200/mn10200.mt
gdb/config/mn10200/tm-mn10200.h
gdb/config/mn10300/mn10300.mt
gdb/config/nm-gnu.h
gdb/config/nm-linux.h
gdb/config/nm-lynx.h
gdb/config/nm-m3.h
gdb/config/nm-nbsd.h
gdb/config/nm-nbsdaout.h
gdb/config/nm-sysv4.h
gdb/config/none/nm-none.h
gdb/config/none/none.mh
gdb/config/none/none.mt
gdb/config/none/tm-none.h
gdb/config/none/xm-none.h
gdb/config/ns32k/nbsdaout.mh
gdb/config/ns32k/nbsdaout.mt
gdb/config/ns32k/nm-nbsd.h
gdb/config/ns32k/nm-nbsdaout.h
gdb/config/ns32k/tm-nbsd.h
gdb/config/ns32k/tm-ns32k.h
gdb/config/ns32k/xm-nbsd.h
gdb/config/pa/hppa.mt
gdb/config/pa/hppa64.mt
gdb/config/pa/hppabsd.mh
gdb/config/pa/hppabsd.mt
gdb/config/pa/hppahpux.mh
gdb/config/pa/hppahpux.mt
gdb/config/pa/hppaosf.mh
gdb/config/pa/hppaosf.mt
gdb/config/pa/hppapro.mt
gdb/config/pa/hpux1020.mh
gdb/config/pa/hpux1020.mt
gdb/config/pa/hpux11.mh
gdb/config/pa/hpux11.mt
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sim/testsuite/sim/fr30/or.cgs
sim/testsuite/sim/fr30/orb.cgs
sim/testsuite/sim/fr30/orccr.cgs
sim/testsuite/sim/fr30/orh.cgs
sim/testsuite/sim/fr30/ret.cgs
sim/testsuite/sim/fr30/reti.cgs
sim/testsuite/sim/fr30/st.cgs
sim/testsuite/sim/fr30/stb.cgs
sim/testsuite/sim/fr30/sth.cgs
sim/testsuite/sim/fr30/stilm.cgs
sim/testsuite/sim/fr30/stm0.cgs
sim/testsuite/sim/fr30/stm1.cgs
sim/testsuite/sim/fr30/stres.cgs
sim/testsuite/sim/fr30/sub.cgs
sim/testsuite/sim/fr30/subc.cgs
sim/testsuite/sim/fr30/subn.cgs
sim/testsuite/sim/fr30/testutils.inc
sim/testsuite/sim/fr30/xchb.cgs
sim/testsuite/sim/m32r/add.cgs
sim/testsuite/sim/m32r/add3.cgs
sim/testsuite/sim/m32r/addi.cgs
sim/testsuite/sim/m32r/addv.cgs
sim/testsuite/sim/m32r/addv3.cgs
sim/testsuite/sim/m32r/addx.cgs
sim/testsuite/sim/m32r/allinsn.exp
sim/testsuite/sim/m32r/and.cgs
sim/testsuite/sim/m32r/and3.cgs
sim/testsuite/sim/m32r/bc24.cgs
sim/testsuite/sim/m32r/bc8.cgs
sim/testsuite/sim/m32r/beq.cgs
sim/testsuite/sim/m32r/beqz.cgs
sim/testsuite/sim/m32r/bgez.cgs
sim/testsuite/sim/m32r/bgtz.cgs
sim/testsuite/sim/m32r/bl24.cgs
sim/testsuite/sim/m32r/bl8.cgs
sim/testsuite/sim/m32r/blez.cgs
sim/testsuite/sim/m32r/bltz.cgs
sim/testsuite/sim/m32r/bnc24.cgs
sim/testsuite/sim/m32r/bnc8.cgs
sim/testsuite/sim/m32r/bne.cgs
sim/testsuite/sim/m32r/bnez.cgs
sim/testsuite/sim/m32r/bra24.cgs
sim/testsuite/sim/m32r/bra8.cgs
sim/testsuite/sim/m32r/cmp.cgs
sim/testsuite/sim/m32r/cmpi.cgs
sim/testsuite/sim/m32r/cmpu.cgs
sim/testsuite/sim/m32r/cmpui.cgs
sim/testsuite/sim/m32r/div.cgs
sim/testsuite/sim/m32r/divu.cgs
sim/testsuite/sim/m32r/hello.ms
sim/testsuite/sim/m32r/hw-trap.ms
sim/testsuite/sim/m32r/jl.cgs
sim/testsuite/sim/m32r/jmp.cgs
sim/testsuite/sim/m32r/ld-d.cgs
sim/testsuite/sim/m32r/ld-plus.cgs
sim/testsuite/sim/m32r/ld.cgs
sim/testsuite/sim/m32r/ld24.cgs
sim/testsuite/sim/m32r/ldb-d.cgs
sim/testsuite/sim/m32r/ldb.cgs
sim/testsuite/sim/m32r/ldh-d.cgs
sim/testsuite/sim/m32r/ldh.cgs
sim/testsuite/sim/m32r/ldi16.cgs
sim/testsuite/sim/m32r/ldi8.cgs
sim/testsuite/sim/m32r/ldub-d.cgs
sim/testsuite/sim/m32r/ldub.cgs
sim/testsuite/sim/m32r/lduh-d.cgs
sim/testsuite/sim/m32r/lduh.cgs
sim/testsuite/sim/m32r/lock.cgs
sim/testsuite/sim/m32r/machi.cgs
sim/testsuite/sim/m32r/maclo.cgs
sim/testsuite/sim/m32r/macwhi.cgs
sim/testsuite/sim/m32r/macwlo.cgs
sim/testsuite/sim/m32r/misc.exp
sim/testsuite/sim/m32r/mul.cgs
sim/testsuite/sim/m32r/mulhi.cgs
sim/testsuite/sim/m32r/mullo.cgs
sim/testsuite/sim/m32r/mulwhi.cgs
sim/testsuite/sim/m32r/mulwlo.cgs
sim/testsuite/sim/m32r/mv.cgs
sim/testsuite/sim/m32r/mvfachi.cgs
sim/testsuite/sim/m32r/mvfaclo.cgs
sim/testsuite/sim/m32r/mvfacmi.cgs
sim/testsuite/sim/m32r/mvfc.cgs
sim/testsuite/sim/m32r/mvtachi.cgs
sim/testsuite/sim/m32r/mvtaclo.cgs
sim/testsuite/sim/m32r/mvtc.cgs
sim/testsuite/sim/m32r/neg.cgs
sim/testsuite/sim/m32r/nop.cgs
sim/testsuite/sim/m32r/not.cgs
sim/testsuite/sim/m32r/or.cgs
sim/testsuite/sim/m32r/or3.cgs
sim/testsuite/sim/m32r/rac.cgs
sim/testsuite/sim/m32r/rach.cgs
sim/testsuite/sim/m32r/rem.cgs
sim/testsuite/sim/m32r/remu.cgs
sim/testsuite/sim/m32r/rte.cgs
sim/testsuite/sim/m32r/seth.cgs
sim/testsuite/sim/m32r/sll.cgs
sim/testsuite/sim/m32r/sll3.cgs
sim/testsuite/sim/m32r/slli.cgs
sim/testsuite/sim/m32r/sra.cgs
sim/testsuite/sim/m32r/sra3.cgs
sim/testsuite/sim/m32r/srai.cgs
sim/testsuite/sim/m32r/srl.cgs
sim/testsuite/sim/m32r/srl3.cgs
sim/testsuite/sim/m32r/srli.cgs
sim/testsuite/sim/m32r/st-d.cgs
sim/testsuite/sim/m32r/st-minus.cgs
sim/testsuite/sim/m32r/st-plus.cgs
sim/testsuite/sim/m32r/st.cgs
sim/testsuite/sim/m32r/stb-d.cgs
sim/testsuite/sim/m32r/stb.cgs
sim/testsuite/sim/m32r/sth-d.cgs
sim/testsuite/sim/m32r/sth.cgs
sim/testsuite/sim/m32r/sub.cgs
sim/testsuite/sim/m32r/subv.cgs
sim/testsuite/sim/m32r/subx.cgs
sim/testsuite/sim/m32r/testutils.inc
sim/testsuite/sim/m32r/trap.cgs
sim/testsuite/sim/m32r/unlock.cgs
sim/testsuite/sim/m32r/uread16.ms
sim/testsuite/sim/m32r/uread32.ms
sim/testsuite/sim/m32r/uwrite16.ms
sim/testsuite/sim/m32r/uwrite32.ms
sim/testsuite/sim/m32r/xor.cgs
sim/testsuite/sim/m32r/xor3.cgs
sim/v850/ChangeLog
sim/v850/Makefile.in
sim/v850/acconfig.h
sim/v850/config.in
sim/v850/configure
sim/v850/configure.in
sim/v850/interp.c
sim/v850/sim-main.h
sim/v850/simops.c
sim/v850/simops.h
sim/v850/v850-dc
sim/v850/v850.igen
sim/v850/v850_sim.h
sim/z8k/ChangeLog
sim/z8k/Makefile.in
sim/z8k/acconfig.h
sim/z8k/comped1.c
sim/z8k/comped2.c
sim/z8k/comped3.c
sim/z8k/compedb3.c
sim/z8k/config.in
sim/z8k/configure
sim/z8k/configure.in
sim/z8k/iface.c
sim/z8k/inlines.h
sim/z8k/mem.c
sim/z8k/mem.h
sim/z8k/quick.c
sim/z8k/sim.h
sim/z8k/support.c
sim/z8k/syscall.h
sim/z8k/tconfig.in
sim/z8k/tm.h
sim/z8k/writecode.c
texinfo/texinfo.tex
Diffstat (limited to 'sim/d10v/interp.c')
| -rw-r--r-- | sim/d10v/interp.c | 1506 |
1 files changed, 0 insertions, 1506 deletions
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c deleted file mode 100644 index 0f7295d..0000000 --- a/sim/d10v/interp.c +++ /dev/null @@ -1,1506 +0,0 @@ -#include <signal.h> -#include "sysdep.h" -#include "bfd.h" -#include "gdb/callback.h" -#include "gdb/remote-sim.h" - -#include "d10v_sim.h" -#include "gdb/sim-d10v.h" - -enum _leftright { LEFT_FIRST, RIGHT_FIRST }; - -static char *myname; -static SIM_OPEN_KIND sim_kind; -int d10v_debug; - -/* Set this to true to get the previous segment layout. */ - -int old_segment_mapping; - -host_callback *d10v_callback; -unsigned long ins_type_counters[ (int)INS_MAX ]; - -uint16 OP[4]; - -static int init_text_p = 0; -/* non-zero if we opened prog_bfd */ -static int prog_bfd_was_opened_p; -bfd *prog_bfd; -asection *text; -bfd_vma text_start; -bfd_vma text_end; - -static long hash PARAMS ((long insn, int format)); -static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size)); -static void get_operands PARAMS ((struct simops *s, uint32 ins)); -static void do_long PARAMS ((uint32 ins)); -static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright)); -static void do_parallel PARAMS ((uint16 ins1, uint16 ins2)); -static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value)); -extern void sim_set_profile PARAMS ((int n)); -extern void sim_set_profile_size PARAMS ((int n)); -static INLINE uint8 *map_memory (unsigned phys_addr); - -#ifdef NEED_UI_LOOP_HOOK -/* How often to run the ui_loop update, when in use */ -#define UI_LOOP_POLL_INTERVAL 0x14000 - -/* Counter for the ui_loop_hook update */ -static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL; - -/* Actual hook to call to run through gdb's gui event loop */ -extern int (*ui_loop_hook) PARAMS ((int signo)); -#endif /* NEED_UI_LOOP_HOOK */ - -#ifndef INLINE -#if defined(__GNUC__) && defined(__OPTIMIZE__) -#define INLINE __inline__ -#else -#define INLINE -#endif -#endif - -#define MAX_HASH 63 -struct hash_entry -{ - struct hash_entry *next; - uint32 opcode; - uint32 mask; - int size; - struct simops *ops; -}; - -struct hash_entry hash_table[MAX_HASH+1]; - -INLINE static long -hash(insn, format) - long insn; - int format; -{ - if (format & LONG_OPCODE) - return ((insn & 0x3F000000) >> 24); - else - return((insn & 0x7E00) >> 9); -} - -INLINE static struct hash_entry * -lookup_hash (ins, size) - uint32 ins; - int size; -{ - struct hash_entry *h; - - if (size) - h = &hash_table[(ins & 0x3F000000) >> 24]; - else - h = &hash_table[(ins & 0x7E00) >> 9]; - - while ((ins & h->mask) != h->opcode || h->size != size) - { - if (h->next == NULL) - { - State.exception = SIGILL; - State.pc_changed = 1; /* Don't increment the PC. */ - return NULL; - } - h = h->next; - } - return (h); -} - -INLINE static void -get_operands (struct simops *s, uint32 ins) -{ - int i, shift, bits, flags; - uint32 mask; - for (i=0; i < s->numops; i++) - { - shift = s->operands[3*i]; - bits = s->operands[3*i+1]; - flags = s->operands[3*i+2]; - mask = 0x7FFFFFFF >> (31 - bits); - OP[i] = (ins >> shift) & mask; - } - /* FIXME: for tracing, update values that need to be updated each - instruction decode cycle */ - State.trace.psw = PSW; -} - -bfd_vma -decode_pc () -{ - asection *s; - if (!init_text_p && prog_bfd != NULL) - { - init_text_p = 1; - for (s = prog_bfd->sections; s; s = s->next) - if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0) - { - text = s; - text_start = bfd_get_section_vma (prog_bfd, s); - text_end = text_start + bfd_section_size (prog_bfd, s); - break; - } - } - - return (PC << 2) + text_start; -} - -static void -do_long (ins) - uint32 ins; -{ - struct hash_entry *h; -#ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins); -#endif - h = lookup_hash (ins, 1); - if (h == NULL) - return; - get_operands (h->ops, ins); - State.ins_type = INS_LONG; - ins_type_counters[ (int)State.ins_type ]++; - (h->ops->func)(); -} - -static void -do_2_short (ins1, ins2, leftright) - uint16 ins1, ins2; - enum _leftright leftright; -{ - struct hash_entry *h; - enum _ins_type first, second; - -#ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n", - ins1, (leftright) ? "left" : "right", ins2); -#endif - - if (leftright == LEFT_FIRST) - { - first = INS_LEFT; - second = INS_RIGHT; - ins_type_counters[ (int)INS_LEFTRIGHT ]++; - } - else - { - first = INS_RIGHT; - second = INS_LEFT; - ins_type_counters[ (int)INS_RIGHTLEFT ]++; - } - - /* Issue the first instruction */ - h = lookup_hash (ins1, 0); - if (h == NULL) - return; - get_operands (h->ops, ins1); - State.ins_type = first; - ins_type_counters[ (int)State.ins_type ]++; - (h->ops->func)(); - - /* Issue the second instruction (if the PC hasn't changed) */ - if (!State.pc_changed && !State.exception) - { - /* finish any existing instructions */ - SLOT_FLUSH (); - h = lookup_hash (ins2, 0); - if (h == NULL) - return; - get_operands (h->ops, ins2); - State.ins_type = second; - ins_type_counters[ (int)State.ins_type ]++; - ins_type_counters[ (int)INS_CYCLES ]++; - (h->ops->func)(); - } - else if (!State.exception) - ins_type_counters[ (int)INS_COND_JUMP ]++; -} - -static void -do_parallel (ins1, ins2) - uint16 ins1, ins2; -{ - struct hash_entry *h1, *h2; -#ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2); -#endif - ins_type_counters[ (int)INS_PARALLEL ]++; - h1 = lookup_hash (ins1, 0); - if (h1 == NULL) - return; - h2 = lookup_hash (ins2, 0); - if (h2 == NULL) - return; - - if (h1->ops->exec_type == PARONLY) - { - get_operands (h1->ops, ins1); - State.ins_type = INS_LEFT_COND_TEST; - ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); - if (State.exe) - { - ins_type_counters[ (int)INS_COND_TRUE ]++; - get_operands (h2->ops, ins2); - State.ins_type = INS_RIGHT_COND_EXE; - ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); - } - else - ins_type_counters[ (int)INS_COND_FALSE ]++; - } - else if (h2->ops->exec_type == PARONLY) - { - get_operands (h2->ops, ins2); - State.ins_type = INS_RIGHT_COND_TEST; - ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); - if (State.exe) - { - ins_type_counters[ (int)INS_COND_TRUE ]++; - get_operands (h1->ops, ins1); - State.ins_type = INS_LEFT_COND_EXE; - ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); - } - else - ins_type_counters[ (int)INS_COND_FALSE ]++; - } - else - { - get_operands (h1->ops, ins1); - State.ins_type = INS_LEFT_PARALLEL; - ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); - if (!State.exception) - { - get_operands (h2->ops, ins2); - State.ins_type = INS_RIGHT_PARALLEL; - ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); - } - } -} - -static char * -add_commas(buf, sizeof_buf, value) - char *buf; - int sizeof_buf; - unsigned long value; -{ - int comma = 3; - char *endbuf = buf + sizeof_buf - 1; - - *--endbuf = '\0'; - do { - if (comma-- == 0) - { - *--endbuf = ','; - comma = 2; - } - - *--endbuf = (value % 10) + '0'; - } while ((value /= 10) != 0); - - return endbuf; -} - -void -sim_size (power) - int power; - -{ - int i; - for (i = 0; i < IMEM_SEGMENTS; i++) - { - if (State.mem.insn[i]) - free (State.mem.insn[i]); - } - for (i = 0; i < DMEM_SEGMENTS; i++) - { - if (State.mem.data[i]) - free (State.mem.data[i]); - } - for (i = 0; i < UMEM_SEGMENTS; i++) - { - if (State.mem.unif[i]) - free (State.mem.unif[i]); - } - /* Always allocate dmem segment 0. This contains the IMAP and DMAP - registers. */ - State.mem.data[0] = calloc (1, SEGMENT_SIZE); -} - -/* For tracing - leave info on last access around. */ -static char *last_segname = "invalid"; -static char *last_from = "invalid"; -static char *last_to = "invalid"; - -enum - { - IMAP0_OFFSET = 0xff00, - DMAP0_OFFSET = 0xff08, - DMAP2_SHADDOW = 0xff04, - DMAP2_OFFSET = 0xff0c - }; - -static void -set_dmap_register (int reg_nr, unsigned long value) -{ - uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA - + DMAP0_OFFSET + 2 * reg_nr); - WRITE_16 (raw, value); -#ifdef DEBUG - if ((d10v_debug & DEBUG_MEMORY)) - { - (*d10v_callback->printf_filtered) - (d10v_callback, "mem: dmap%d=0x%04lx\n", reg_nr, value); - } -#endif -} - -static unsigned long -dmap_register (int reg_nr) -{ - uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA - + DMAP0_OFFSET + 2 * reg_nr); - return READ_16 (raw); -} - -static void -set_imap_register (int reg_nr, unsigned long value) -{ - uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA - + IMAP0_OFFSET + 2 * reg_nr); - WRITE_16 (raw, value); -#ifdef DEBUG - if ((d10v_debug & DEBUG_MEMORY)) - { - (*d10v_callback->printf_filtered) - (d10v_callback, "mem: imap%d=0x%04lx\n", reg_nr, value); - } -#endif -} - -static unsigned long -imap_register (int reg_nr) -{ - uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA - + IMAP0_OFFSET + 2 * reg_nr); - return READ_16 (raw); -} - -enum - { - HELD_SPI_IDX = 0, - HELD_SPU_IDX = 1 - }; - -static unsigned long -spu_register (void) -{ - if (PSW_SM) - return GPR (SP_IDX); - else - return HELD_SP (HELD_SPU_IDX); -} - -static unsigned long -spi_register (void) -{ - if (!PSW_SM) - return GPR (SP_IDX); - else - return HELD_SP (HELD_SPI_IDX); -} - -static void -set_spi_register (unsigned long value) -{ - if (!PSW_SM) - SET_GPR (SP_IDX, value); - SET_HELD_SP (HELD_SPI_IDX, value); -} - -static void -set_spu_register (unsigned long value) -{ - if (PSW_SM) - SET_GPR (SP_IDX, value); - SET_HELD_SP (HELD_SPU_IDX, value); -} - -/* Given a virtual address in the DMAP address space, translate it - into a physical address. */ - -unsigned long -sim_d10v_translate_dmap_addr (unsigned long offset, - int nr_bytes, - unsigned long *phys, - unsigned long (*dmap_register) (int reg_nr)) -{ - short map; - int regno; - last_from = "logical-data"; - if (offset >= DMAP_BLOCK_SIZE * SIM_D10V_NR_DMAP_REGS) - { - /* Logical address out side of data segments, not supported */ - return 0; - } - regno = (offset / DMAP_BLOCK_SIZE); - offset = (offset % DMAP_BLOCK_SIZE); - if ((offset % DMAP_BLOCK_SIZE) + nr_bytes > DMAP_BLOCK_SIZE) - { - /* Don't cross a BLOCK boundary */ - nr_bytes = DMAP_BLOCK_SIZE - (offset % DMAP_BLOCK_SIZE); - } - map = dmap_register (regno); - if (regno == 3) - { - /* Always maps to data memory */ - int iospi = (offset / 0x1000) % 4; - int iosp = (map >> (4 * (3 - iospi))) % 0x10; - last_to = "io-space"; - *phys = (SIM_D10V_MEMORY_DATA + (iosp * 0x10000) + 0xc000 + offset); - } - else - { - int sp = ((map & 0x3000) >> 12); - int segno = (map & 0x3ff); - switch (sp) - { - case 0: /* 00: Unified memory */ - *phys = SIM_D10V_MEMORY_UNIFIED + (segno * DMAP_BLOCK_SIZE) + offset; - last_to = "unified"; - break; - case 1: /* 01: Instruction Memory */ - *phys = SIM_D10V_MEMORY_INSN + (segno * DMAP_BLOCK_SIZE) + offset; - last_to = "chip-insn"; - break; - case 2: /* 10: Internal data memory */ - *phys = SIM_D10V_MEMORY_DATA + (segno << 16) + (regno * DMAP_BLOCK_SIZE) + offset; - last_to = "chip-data"; - break; - case 3: /* 11: Reserved */ - return 0; - } - } - return nr_bytes; -} - -/* Given a virtual address in the IMAP address space, translate it - into a physical address. */ - -unsigned long -sim_d10v_translate_imap_addr (unsigned long offset, - int nr_bytes, - unsigned long *phys, - unsigned long (*imap_register) (int reg_nr)) -{ - short map; - int regno; - int sp; - int segno; - last_from = "logical-insn"; - if (offset >= (IMAP_BLOCK_SIZE * SIM_D10V_NR_IMAP_REGS)) - { - /* Logical address outside of IMAP segments, not supported */ - return 0; - } - regno = (offset / IMAP_BLOCK_SIZE); - offset = (offset % IMAP_BLOCK_SIZE); - if (offset + nr_bytes > IMAP_BLOCK_SIZE) - { - /* Don't cross a BLOCK boundary */ - nr_bytes = IMAP_BLOCK_SIZE - offset; - } - map = imap_register (regno); - sp = (map & 0x3000) >> 12; - segno = (map & 0x007f); - switch (sp) - { - case 0: /* 00: unified memory */ - *phys = SIM_D10V_MEMORY_UNIFIED + (segno << 17) + offset; - last_to = "unified"; - break; - case 1: /* 01: instruction memory */ - *phys = SIM_D10V_MEMORY_INSN + (IMAP_BLOCK_SIZE * regno) + offset; - last_to = "chip-insn"; - break; - case 2: /*10*/ - /* Reserved. */ - return 0; - case 3: /* 11: for testing - instruction memory */ - offset = (offset % 0x800); - *phys = SIM_D10V_MEMORY_INSN + offset; - if (offset + nr_bytes > 0x800) - /* don't cross VM boundary */ - nr_bytes = 0x800 - offset; - last_to = "test-insn"; - break; - } - return nr_bytes; -} - -unsigned long -sim_d10v_translate_addr (unsigned long memaddr, - int nr_bytes, - unsigned long *targ_addr, - unsigned long (*dmap_register) (int reg_nr), - unsigned long (*imap_register) (int reg_nr)) -{ - unsigned long phys; - unsigned long seg; - unsigned long off; - - last_from = "unknown"; - last_to = "unknown"; - - seg = (memaddr >> 24); - off = (memaddr & 0xffffffL); - - /* However, if we've asked to use the previous generation of segment - mapping, rearrange the segments as follows. */ - - if (old_segment_mapping) - { - switch (seg) - { - case 0x00: /* DMAP translated memory */ - seg = 0x10; - break; - case 0x01: /* IMAP translated memory */ - seg = 0x11; - break; - case 0x10: /* On-chip data memory */ - seg = 0x02; - break; - case 0x11: /* On-chip insn memory */ - seg = 0x01; - break; - case 0x12: /* Unified memory */ - seg = 0x00; - break; - } - } - - switch (seg) - { - case 0x00: /* Physical unified memory */ - last_from = "phys-unified"; - last_to = "unified"; - phys = SIM_D10V_MEMORY_UNIFIED + off; - if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE) - nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE); - break; - - case 0x01: /* Physical instruction memory */ - last_from = "phys-insn"; - last_to = "chip-insn"; - phys = SIM_D10V_MEMORY_INSN + off; - if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE) - nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE); - break; - - case 0x02: /* Physical data memory segment */ - last_from = "phys-data"; - last_to = "chip-data"; - phys = SIM_D10V_MEMORY_DATA + off; - if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE) - nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE); - break; - - case 0x10: /* in logical data address segment */ - nr_bytes = sim_d10v_translate_dmap_addr (off, nr_bytes, &phys, - dmap_register); - break; - - case 0x11: /* in logical instruction address segment */ - nr_bytes = sim_d10v_translate_imap_addr (off, nr_bytes, &phys, - imap_register); - break; - - default: - return 0; - } - - *targ_addr = phys; - return nr_bytes; -} - -/* Return a pointer into the raw buffer designated by phys_addr. It - is assumed that the client has already ensured that the access - isn't going to cross a segment boundary. */ - -uint8 * -map_memory (unsigned phys_addr) -{ - uint8 **memory; - uint8 *raw; - unsigned offset; - int segment = ((phys_addr >> 24) & 0xff); - - switch (segment) - { - - case 0x00: /* Unified memory */ - { - memory = &State.mem.unif[(phys_addr / SEGMENT_SIZE) % UMEM_SEGMENTS]; - last_segname = "umem"; - break; - } - - case 0x01: /* On-chip insn memory */ - { - memory = &State.mem.insn[(phys_addr / SEGMENT_SIZE) % IMEM_SEGMENTS]; - last_segname = "imem"; - break; - } - - case 0x02: /* On-chip data memory */ - { - if ((phys_addr & 0xff00) == 0xff00) - { - phys_addr = (phys_addr & 0xffff); - if (phys_addr == DMAP2_SHADDOW) - { - phys_addr = DMAP2_OFFSET; - last_segname = "dmap"; - } - else - last_segname = "reg"; - } - else - last_segname = "dmem"; - memory = &State.mem.data[(phys_addr / SEGMENT_SIZE) % DMEM_SEGMENTS]; - break; - } - - default: - /* OOPS! */ - last_segname = "scrap"; - return State.mem.fault; - } - - if (*memory == NULL) - { - *memory = calloc (1, SEGMENT_SIZE); - if (*memory == NULL) - { - (*d10v_callback->printf_filtered) (d10v_callback, "Malloc failed.\n"); - return State.mem.fault; - } - } - - offset = (phys_addr % SEGMENT_SIZE); - raw = *memory + offset; - return raw; -} - -/* Transfer data to/from simulated memory. Since a bug in either the - simulated program or in gdb or the simulator itself may cause a - bogus address to be passed in, we need to do some sanity checking - on addresses to make sure they are within bounds. When an address - fails the bounds check, treat it as a zero length read/write rather - than aborting the entire run. */ - -static int -xfer_mem (SIM_ADDR virt, - unsigned char *buffer, - int size, - int write_p) -{ - int xfered = 0; - - while (0 < size) - { - uint8 *memory; - unsigned long phys; - int phys_size; - phys_size = sim_d10v_translate_addr (virt, size, - &phys, - dmap_register, - imap_register); - if (phys_size == 0) - return xfered; - - memory = map_memory (phys); - -#ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - { - (*d10v_callback->printf_filtered) - (d10v_callback, - "sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n", - (write_p ? "write" : "read"), - phys_size, virt, last_from, - phys, last_to, - (long) memory, last_segname); - } -#endif - - if (write_p) - { - memcpy (memory, buffer, phys_size); - } - else - { - memcpy (buffer, memory, phys_size); - } - - virt += phys_size; - buffer += phys_size; - xfered += phys_size; - size -= phys_size; - } - - return xfered; -} - - -int -sim_write (sd, addr, buffer, size) - SIM_DESC sd; - SIM_ADDR addr; - unsigned char *buffer; - int size; -{ - /* FIXME: this should be performing a virtual transfer */ - return xfer_mem( addr, buffer, size, 1); -} - -int -sim_read (sd, addr, buffer, size) - SIM_DESC sd; - SIM_ADDR addr; - unsigned char *buffer; - int size; -{ - /* FIXME: this should be performing a virtual transfer */ - return xfer_mem( addr, buffer, size, 0); -} - - -SIM_DESC -sim_open (kind, callback, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *callback; - struct _bfd *abfd; - char **argv; -{ - struct simops *s; - struct hash_entry *h; - static int init_p = 0; - char **p; - - sim_kind = kind; - d10v_callback = callback; - myname = argv[0]; - old_segment_mapping = 0; - - /* NOTE: This argument parsing is only effective when this function - is called by GDB. Standalone argument parsing is handled by - sim/common/run.c. */ - for (p = argv + 1; *p; ++p) - { - if (strcmp (*p, "-oldseg") == 0) - old_segment_mapping = 1; -#ifdef DEBUG - else if (strcmp (*p, "-t") == 0) - d10v_debug = DEBUG; - else if (strncmp (*p, "-t", 2) == 0) - d10v_debug = atoi (*p + 2); -#endif - else - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p); - } - - /* put all the opcodes in the hash table */ - if (!init_p++) - { - for (s = Simops; s->func; s++) - { - h = &hash_table[hash(s->opcode,s->format)]; - - /* go to the last entry in the chain */ - while (h->next) - h = h->next; - - if (h->ops) - { - h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry)); - if (!h->next) - perror ("malloc failure"); - - h = h->next; - } - h->ops = s; - h->mask = s->mask; - h->opcode = s->opcode; - h->size = s->is_long; - } - } - - /* reset the processor state */ - if (!State.mem.data[0]) - sim_size (1); - sim_create_inferior ((SIM_DESC) 1, NULL, NULL, NULL); - - /* Fudge our descriptor. */ - return (SIM_DESC) 1; -} - - -void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; -{ - if (prog_bfd != NULL && prog_bfd_was_opened_p) - { - bfd_close (prog_bfd); - prog_bfd = NULL; - prog_bfd_was_opened_p = 0; - } -} - -void -sim_set_profile (n) - int n; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n); -} - -void -sim_set_profile_size (n) - int n; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n); -} - -uint8 * -dmem_addr (uint16 offset) -{ - unsigned long phys; - uint8 *mem; - int phys_size; - - /* Note: DMEM address range is 0..0x10000. Calling code can compute - things like ``0xfffe + 0x0e60 == 0x10e5d''. Since offset's type - is uint16 this is modulo'ed onto 0x0e5d. */ - - phys_size = sim_d10v_translate_dmap_addr (offset, 1, &phys, - dmap_register); - if (phys_size == 0) - { - mem = State.mem.fault; - } - else - mem = map_memory (phys); -#ifdef DEBUG - if ((d10v_debug & DEBUG_MEMORY)) - { - (*d10v_callback->printf_filtered) - (d10v_callback, - "mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n", - offset, last_from, - phys, phys_size, last_to, - (long) mem, last_segname); - } -#endif - return mem; -} - -uint8 * -imem_addr (uint32 offset) -{ - unsigned long phys; - uint8 *mem; - int phys_size = sim_d10v_translate_imap_addr (offset, 1, &phys, imap_register); - if (phys_size == 0) - { - return State.mem.fault; - } - mem = map_memory (phys); -#ifdef DEBUG - if ((d10v_debug & DEBUG_MEMORY)) - { - (*d10v_callback->printf_filtered) - (d10v_callback, - "mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n", - offset, last_from, - phys, phys_size, last_to, - (long) mem, last_segname); - } -#endif - return mem; -} - -static int stop_simulator = 0; - -int -sim_stop (sd) - SIM_DESC sd; -{ - stop_simulator = 1; - return 1; -} - - -/* Run (or resume) the program. */ -void -sim_resume (sd, step, siggnal) - SIM_DESC sd; - int step, siggnal; -{ - uint32 inst; - uint8 *iaddr; - -/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */ - State.exception = 0; - if (step) - sim_stop (sd); - - switch (siggnal) - { - case 0: - break; -#ifdef SIGBUS - case SIGBUS: -#endif - case SIGSEGV: - SET_BPC (PC); - SET_BPSW (PSW); - SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT))); - JMP (AE_VECTOR_START); - SLOT_FLUSH (); - break; - case SIGILL: - SET_BPC (PC); - SET_BPSW (PSW); - SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT))); - JMP (RIE_VECTOR_START); - SLOT_FLUSH (); - break; - default: - /* just ignore it */ - break; - } - - do - { - iaddr = imem_addr ((uint32)PC << 2); - if (iaddr == State.mem.fault) - { - State.exception = SIGBUS; - break; - } - - inst = get_longword( iaddr ); - - State.pc_changed = 0; - ins_type_counters[ (int)INS_CYCLES ]++; - - switch (inst & 0xC0000000) - { - case 0xC0000000: - /* long instruction */ - do_long (inst & 0x3FFFFFFF); - break; - case 0x80000000: - /* R -> L */ - do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST); - break; - case 0x40000000: - /* L -> R */ - do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST); - break; - case 0: - do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF); - break; - } - - /* If the PC of the current instruction matches RPT_E then - schedule a branch to the loop start. If one of those - instructions happens to be a branch, than that instruction - will be ignored */ - if (!State.pc_changed) - { - if (PSW_RP && PC == RPT_E) - { - /* Note: The behavour of a branch instruction at RPT_E - is implementation dependant, this simulator takes the - branch. Branching to RPT_E is valid, the instruction - must be executed before the loop is taken. */ - if (RPT_C == 1) - { - SET_PSW_RP (0); - SET_RPT_C (0); - SET_PC (PC + 1); - } - else - { - SET_RPT_C (RPT_C - 1); - SET_PC (RPT_S); - } - } - else - SET_PC (PC + 1); - } - - /* Check for a breakpoint trap on this instruction. This - overrides any pending branches or loops */ - if (PSW_DB && PC == IBA) - { - SET_BPC (PC); - SET_BPSW (PSW); - SET_PSW (PSW & PSW_SM_BIT); - SET_PC (SDBT_VECTOR_START); - } - - /* Writeback all the DATA / PC changes */ - SLOT_FLUSH (); - -#ifdef NEED_UI_LOOP_HOOK - if (ui_loop_hook != NULL && ui_loop_hook_counter-- < 0) - { - ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL; - ui_loop_hook (0); - } -#endif /* NEED_UI_LOOP_HOOK */ - } - while ( !State.exception && !stop_simulator); - - if (step && !State.exception) - State.exception = SIGTRAP; -} - -void -sim_set_trace (void) -{ -#ifdef DEBUG - d10v_debug = DEBUG; -#endif -} - -void -sim_info (sd, verbose) - SIM_DESC sd; - int verbose; -{ - char buf1[40]; - char buf2[40]; - char buf3[40]; - char buf4[40]; - char buf5[40]; - unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ]; - unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ]; - unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ]; - unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ]; - unsigned long left_total = left + left_parallel + left_cond + left_nops; - - unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ]; - unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ]; - unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ]; - unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ]; - unsigned long right_total = right + right_parallel + right_cond + right_nops; - - unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ]; - unsigned long ins_long = ins_type_counters[ (int)INS_LONG ]; - unsigned long parallel = ins_type_counters[ (int)INS_PARALLEL ]; - unsigned long leftright = ins_type_counters[ (int)INS_LEFTRIGHT ]; - unsigned long rightleft = ins_type_counters[ (int)INS_RIGHTLEFT ]; - unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ]; - unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ]; - unsigned long cond_jump = ins_type_counters[ (int)INS_COND_JUMP ]; - unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ]; - unsigned long total = (unknown + left_total + right_total + ins_long); - - int size = strlen (add_commas (buf1, sizeof (buf1), total)); - int parallel_size = strlen (add_commas (buf1, sizeof (buf1), - (left_parallel > right_parallel) ? left_parallel : right_parallel)); - int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond)); - int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops)); - int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n", - size, add_commas (buf1, sizeof (buf1), left_total), - normal_size, add_commas (buf2, sizeof (buf2), left), - parallel_size, add_commas (buf3, sizeof (buf3), left_parallel), - cond_size, add_commas (buf4, sizeof (buf4), left_cond), - nop_size, add_commas (buf5, sizeof (buf5), left_nops)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n", - size, add_commas (buf1, sizeof (buf1), right_total), - normal_size, add_commas (buf2, sizeof (buf2), right), - parallel_size, add_commas (buf3, sizeof (buf3), right_parallel), - cond_size, add_commas (buf4, sizeof (buf4), right_cond), - nop_size, add_commas (buf5, sizeof (buf5), right_nops)); - - if (ins_long) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s long instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), ins_long)); - - if (parallel) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s parallel instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), parallel)); - - if (leftright) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) encoded L->R\n", - size, add_commas (buf1, sizeof (buf1), leftright)); - - if (rightleft) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) encoded R->L\n", - size, add_commas (buf1, sizeof (buf1), rightleft)); - - if (unknown) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s unknown instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), unknown)); - - if (cond_true) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) due to EXExxx condition being true\n", - size, add_commas (buf1, sizeof (buf1), cond_true)); - - if (cond_false) - (*d10v_callback->printf_filtered) (d10v_callback, - "skipped %*s instruction(s) due to EXExxx condition being false\n", - size, add_commas (buf1, sizeof (buf1), cond_false)); - - if (cond_jump) - (*d10v_callback->printf_filtered) (d10v_callback, - "skipped %*s instruction(s) due to conditional branch succeeding\n", - size, add_commas (buf1, sizeof (buf1), cond_jump)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s cycle(s)\n", - size, add_commas (buf1, sizeof (buf1), cycles)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s total instructions\n", - size, add_commas (buf1, sizeof (buf1), total)); -} - -SIM_RC -sim_create_inferior (sd, abfd, argv, env) - SIM_DESC sd; - struct _bfd *abfd; - char **argv; - char **env; -{ - bfd_vma start_address; - - /* reset all state information */ - memset (&State.regs, 0, (int)&State.mem - (int)&State.regs); - - /* There was a hack here to copy the values of argc and argv into r0 - and r1. The values were also saved into some high memory that - won't be overwritten by the stack (0x7C00). The reason for doing - this was to allow the 'run' program to accept arguments. Without - the hack, this is not possible anymore. If the simulator is run - from the debugger, arguments cannot be passed in, so this makes - no difference. */ - - /* set PC */ - if (abfd != NULL) - start_address = bfd_get_start_address (abfd); - else - start_address = 0xffc0 << 2; -#ifdef DEBUG - if (d10v_debug) - (*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address); -#endif - SET_CREG (PC_CR, start_address >> 2); - - /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board - initializes imap0 and imap1 to 0x1000 as part of its ROM - initialization. */ - if (old_segment_mapping) - { - /* External memory startup. This is the HARD reset state. */ - set_imap_register (0, 0x0000); - set_imap_register (1, 0x007f); - set_dmap_register (0, 0x2000); - set_dmap_register (1, 0x2000); - set_dmap_register (2, 0x0000); /* Old DMAP */ - set_dmap_register (3, 0x0000); - } - else - { - /* Internal memory startup. This is the ROM intialized state. */ - set_imap_register (0, 0x1000); - set_imap_register (1, 0x1000); - set_dmap_register (0, 0x2000); - set_dmap_register (1, 0x2000); - set_dmap_register (2, 0x2000); /* DMAP2 initial internal value is - 0x2000 on the new board. */ - set_dmap_register (3, 0x0000); - } - - SLOT_FLUSH (); - return SIM_RC_OK; -} - - -void -sim_set_callbacks (p) - host_callback *p; -{ - d10v_callback = p; -} - -void -sim_stop_reason (sd, reason, sigrc) - SIM_DESC sd; - enum sim_stop *reason; - int *sigrc; -{ -/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */ - - switch (State.exception) - { - case SIG_D10V_STOP: /* stop instruction */ - *reason = sim_exited; - *sigrc = 0; - break; - - case SIG_D10V_EXIT: /* exit trap */ - *reason = sim_exited; - *sigrc = GPR (0); - break; - - case SIG_D10V_BUS: - *reason = sim_stopped; -#ifdef SIGBUS - *sigrc = SIGBUS; -#else - *sigrc = SIGSEGV; -#endif - break; - - default: /* some signal */ - *reason = sim_stopped; - if (stop_simulator && !State.exception) - *sigrc = SIGINT; - else - *sigrc = State.exception; - break; - } - - stop_simulator = 0; -} - -int -sim_fetch_register (sd, rn, memory, length) - SIM_DESC sd; - int rn; - unsigned char *memory; - int length; -{ - int size; - switch ((enum sim_d10v_regs) rn) - { - case SIM_D10V_R0_REGNUM: - case SIM_D10V_R1_REGNUM: - case SIM_D10V_R2_REGNUM: - case SIM_D10V_R3_REGNUM: - case SIM_D10V_R4_REGNUM: - case SIM_D10V_R5_REGNUM: - case SIM_D10V_R6_REGNUM: - case SIM_D10V_R7_REGNUM: - case SIM_D10V_R8_REGNUM: - case SIM_D10V_R9_REGNUM: - case SIM_D10V_R10_REGNUM: - case SIM_D10V_R11_REGNUM: - case SIM_D10V_R12_REGNUM: - case SIM_D10V_R13_REGNUM: - case SIM_D10V_R14_REGNUM: - case SIM_D10V_R15_REGNUM: - WRITE_16 (memory, GPR (rn - SIM_D10V_R0_REGNUM)); - size = 2; - break; - case SIM_D10V_CR0_REGNUM: - case SIM_D10V_CR1_REGNUM: - case SIM_D10V_CR2_REGNUM: - case SIM_D10V_CR3_REGNUM: - case SIM_D10V_CR4_REGNUM: - case SIM_D10V_CR5_REGNUM: - case SIM_D10V_CR6_REGNUM: - case SIM_D10V_CR7_REGNUM: - case SIM_D10V_CR8_REGNUM: - case SIM_D10V_CR9_REGNUM: - case SIM_D10V_CR10_REGNUM: - case SIM_D10V_CR11_REGNUM: - case SIM_D10V_CR12_REGNUM: - case SIM_D10V_CR13_REGNUM: - case SIM_D10V_CR14_REGNUM: - case SIM_D10V_CR15_REGNUM: - WRITE_16 (memory, CREG (rn - SIM_D10V_CR0_REGNUM)); - size = 2; - break; - case SIM_D10V_A0_REGNUM: - case SIM_D10V_A1_REGNUM: - WRITE_64 (memory, ACC (rn - SIM_D10V_A0_REGNUM)); - size = 8; - break; - case SIM_D10V_SPI_REGNUM: - /* PSW_SM indicates that the current SP is the USER - stack-pointer. */ - WRITE_16 (memory, spi_register ()); - size = 2; - break; - case SIM_D10V_SPU_REGNUM: - /* PSW_SM indicates that the current SP is the USER - stack-pointer. */ - WRITE_16 (memory, spu_register ()); - size = 2; - break; - case SIM_D10V_IMAP0_REGNUM: - case SIM_D10V_IMAP1_REGNUM: - WRITE_16 (memory, imap_register (rn - SIM_D10V_IMAP0_REGNUM)); - size = 2; - break; - case SIM_D10V_DMAP0_REGNUM: - case SIM_D10V_DMAP1_REGNUM: - case SIM_D10V_DMAP2_REGNUM: - case SIM_D10V_DMAP3_REGNUM: - WRITE_16 (memory, dmap_register (rn - SIM_D10V_DMAP0_REGNUM)); - size = 2; - break; - case SIM_D10V_TS2_DMAP_REGNUM: - size = 0; - break; - default: - size = 0; - break; - } - return size; -} - -int -sim_store_register (sd, rn, memory, length) - SIM_DESC sd; - int rn; - unsigned char *memory; - int length; -{ - int size; - switch ((enum sim_d10v_regs) rn) - { - case SIM_D10V_R0_REGNUM: - case SIM_D10V_R1_REGNUM: - case SIM_D10V_R2_REGNUM: - case SIM_D10V_R3_REGNUM: - case SIM_D10V_R4_REGNUM: - case SIM_D10V_R5_REGNUM: - case SIM_D10V_R6_REGNUM: - case SIM_D10V_R7_REGNUM: - case SIM_D10V_R8_REGNUM: - case SIM_D10V_R9_REGNUM: - case SIM_D10V_R10_REGNUM: - case SIM_D10V_R11_REGNUM: - case SIM_D10V_R12_REGNUM: - case SIM_D10V_R13_REGNUM: - case SIM_D10V_R14_REGNUM: - case SIM_D10V_R15_REGNUM: - SET_GPR (rn - SIM_D10V_R0_REGNUM, READ_16 (memory)); - size = 2; - break; - case SIM_D10V_CR0_REGNUM: - case SIM_D10V_CR1_REGNUM: - case SIM_D10V_CR2_REGNUM: - case SIM_D10V_CR3_REGNUM: - case SIM_D10V_CR4_REGNUM: - case SIM_D10V_CR5_REGNUM: - case SIM_D10V_CR6_REGNUM: - case SIM_D10V_CR7_REGNUM: - case SIM_D10V_CR8_REGNUM: - case SIM_D10V_CR9_REGNUM: - case SIM_D10V_CR10_REGNUM: - case SIM_D10V_CR11_REGNUM: - case SIM_D10V_CR12_REGNUM: - case SIM_D10V_CR13_REGNUM: - case SIM_D10V_CR14_REGNUM: - case SIM_D10V_CR15_REGNUM: - SET_CREG (rn - SIM_D10V_CR0_REGNUM, READ_16 (memory)); - size = 2; - break; - case SIM_D10V_A0_REGNUM: - case SIM_D10V_A1_REGNUM: - SET_ACC (rn - SIM_D10V_A0_REGNUM, READ_64 (memory) & MASK40); - size = 8; - break; - case SIM_D10V_SPI_REGNUM: - /* PSW_SM indicates that the current SP is the USER - stack-pointer. */ - set_spi_register (READ_16 (memory)); - size = 2; - break; - case SIM_D10V_SPU_REGNUM: - set_spu_register (READ_16 (memory)); - size = 2; - break; - case SIM_D10V_IMAP0_REGNUM: - case SIM_D10V_IMAP1_REGNUM: - set_imap_register (rn - SIM_D10V_IMAP0_REGNUM, READ_16(memory)); - size = 2; - break; - case SIM_D10V_DMAP0_REGNUM: - case SIM_D10V_DMAP1_REGNUM: - case SIM_D10V_DMAP2_REGNUM: - case SIM_D10V_DMAP3_REGNUM: - set_dmap_register (rn - SIM_D10V_DMAP0_REGNUM, READ_16(memory)); - size = 2; - break; - case SIM_D10V_TS2_DMAP_REGNUM: - size = 0; - break; - default: - size = 0; - break; - } - SLOT_FLUSH (); - return size; -} - - -void -sim_do_command (sd, cmd) - SIM_DESC sd; - char *cmd; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd); -} - -SIM_RC -sim_load (sd, prog, abfd, from_tty) - SIM_DESC sd; - char *prog; - bfd *abfd; - int from_tty; -{ - extern bfd *sim_load_file (); /* ??? Don't know where this should live. */ - - if (prog_bfd != NULL && prog_bfd_was_opened_p) - { - bfd_close (prog_bfd); - prog_bfd_was_opened_p = 0; - } - prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd, - sim_kind == SIM_OPEN_DEBUG, - 1/*LMA*/, sim_write); - if (prog_bfd == NULL) - return SIM_RC_FAIL; - prog_bfd_was_opened_p = abfd == NULL; - return SIM_RC_OK; -} |