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authorMike Frysinger <vapier@gentoo.org>2012-04-09 03:49:30 +0000
committerMike Frysinger <vapier@gentoo.org>2012-04-09 03:49:30 +0000
commit99265d6b00ddc4b11d5212aa09aec3d6bbbd810b (patch)
treec9f660ca136ba9f00edc2939fc46c23ba5ada4c4 /sim/bfin/bfin-sim.h
parent8faad9bd0f2d55b33a718bd950982439deca6c03 (diff)
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sim: bfin: keep track of the exact position of parallel insns
Some insns need to know which slot they're in to determine whether they are valid. So add an enum for each slot, and check that rather than the overall insn len. This makes tracking things in the code much clearer. However, this code is functionally the same, so a follow up patch will leverage this more to properly flag invalid parallel insn combos. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'sim/bfin/bfin-sim.h')
-rw-r--r--sim/bfin/bfin-sim.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/sim/bfin/bfin-sim.h b/sim/bfin/bfin-sim.h
index 17bcdeb..9dadcd9 100644
--- a/sim/bfin/bfin-sim.h
+++ b/sim/bfin/bfin-sim.h
@@ -44,6 +44,13 @@ struct store {
bu32 val;
};
+enum bfin_parallel_group {
+ BFIN_PARALLEL_NONE,
+ BFIN_PARALLEL_GROUP0, /* 32bit slot. */
+ BFIN_PARALLEL_GROUP1, /* 16bit group1. */
+ BFIN_PARALLEL_GROUP2, /* 16bit group2. */
+};
+
/* The KSP/USP handling wrt SP may not follow the hardware exactly (the hw
looks at current mode and uses either SP or USP based on that. We instead
always operate on SP and mirror things in KSP and USP. During a CEC
@@ -78,6 +85,10 @@ struct bfin_cpu_state
/* The pc currently being interpreted in parallel insns. */
bu32 multi_pc;
+ /* Some insns are valid in group1, and others in group2, so we
+ need to keep track of the exact slot we're processing. */
+ enum bfin_parallel_group group;
+
/* Needed for supporting the DISALGNEXCPT instruction */
int dis_algn_expt;
@@ -126,6 +137,7 @@ struct bfin_cpu_state
#define EMUDAT_INREG (BFIN_CPU_STATE.emudat[0])
#define EMUDAT_OUTREG (BFIN_CPU_STATE.emudat[1])
#define INSN_LEN (BFIN_CPU_STATE.insn_len)
+#define PARALLEL_GROUP (BFIN_CPU_STATE.group)
#define CYCLE_DELAY (BFIN_CPU_STATE.cycle_delay)
#define DIS_ALGN_EXPT (BFIN_CPU_STATE.dis_algn_expt)