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| author | Mike Frysinger <vapier@gentoo.org> | 2011-09-29 03:19:47 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2011-09-29 03:19:47 +0000 |
| commit | 39c1f96aef420f7b82935a370432c054d07b2476 (patch) | |
| tree | b2fd534fcf658822dce9f068725df0cbefcc72c1 /sim/bfin/bfin-sim.c | |
| parent | 24bdad53a9b175571b2681bbc4b567959f6ad344 (diff) | |
| download | gdb-39c1f96aef420f7b82935a370432c054d07b2476.zip gdb-39c1f96aef420f7b82935a370432c054d07b2476.tar.gz gdb-39c1f96aef420f7b82935a370432c054d07b2476.tar.bz2 | |
sim: bfin: use store buffer for VIT_MAX insns
The VIT_MAX insns can be used in parallel, so we need to use the store
buffer so we don't clobber the output register before we get a chance
to do a memory store with it.
Reported-by: Kai Iskratsch <kai@stella.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'sim/bfin/bfin-sim.c')
| -rw-r--r-- | sim/bfin/bfin-sim.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c index fe4dc26..82410f1 100644 --- a/sim/bfin/bfin-sim.c +++ b/sim/bfin/bfin-sim.c @@ -5516,7 +5516,7 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) out = sL; SET_AREG (0, acc0); - SET_DREG (dst0, REG_H_L (DREG (dst0), out)); + STORE (DREG (dst0), REG_H_L (DREG (dst0), out)); } else if ((sop == 2 || sop == 3) && sopcde == 9) { @@ -5553,7 +5553,7 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) out1 = s1L; SET_AREG (0, acc0); - SET_DREG (dst0, REG_H_L (out1 << 16, out0)); + STORE (DREG (dst0), REG_H_L (out1 << 16, out0)); } else if (sop == 0 && sopcde == 10) { |