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authorMike Frysinger <vapier@gentoo.org>2011-03-26 06:02:41 +0000
committerMike Frysinger <vapier@gentoo.org>2011-03-26 06:02:41 +0000
commitfcd1ee07d35e970766622ea09e79a9b80c632cf9 (patch)
tree3de69cc7320cca78c6161d015fb7e7e6f3460958 /sim/bfin/ChangeLog
parent81723326fe1126b9dfd48e99b65ba52e333ede58 (diff)
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sim: bfin: add missing VS set with add/sub insns
The 16bit add/sub insns missed setting the VS bit in ASTAT whenever the V bit was also set. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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@@ -1,3 +1,7 @@
+2011-03-26 Robin Getz <robin.getz@analog.com>
+
+ * bfin-sim.c (decode_dsp32alu_0): Set VS when V is set.
+
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio_port_event): Call HW_TRACE at every