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authorJim Wilson <jim.wilson@linaro.org>2017-02-14 15:23:12 -0800
committerJim Wilson <jim.wilson@linaro.org>2017-02-14 15:23:12 -0800
commit742e3a7781c7f29136ccc36673ef2c887ba2860d (patch)
tree7316aaa13056b55e389b135a32e903fcacfb4aa5 /sim/aarch64
parentbf25e9a0f1315829defcb6ef36d8fef9d370e822 (diff)
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Add self to aarch64 maintainers. Fix mla instruction.
sim/ * MAINTAINTERS (aarch64): Add myself. sim/aarch64/ * simulator.c (do_vec_MLA): Rewrite switch body. sim/testsuite/sim/aarch64/ * mla.s: New.
Diffstat (limited to 'sim/aarch64')
-rw-r--r--sim/aarch64/ChangeLog2
-rw-r--r--sim/aarch64/simulator.c65
2 files changed, 18 insertions, 49 deletions
diff --git a/sim/aarch64/ChangeLog b/sim/aarch64/ChangeLog
index 7d00621..e8d66a6 100644
--- a/sim/aarch64/ChangeLog
+++ b/sim/aarch64/ChangeLog
@@ -1,5 +1,7 @@
2017-02-14 Jim Wilson <jim.wilson@linaro.org>
+ * simulator.c (do_vec_MLA): Rewrite switch body.
+
* simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and
2. Move test_false if inside loop. Fix logic for computing result
stored to vd.
diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
index 13a2b1f..7c28219 100644
--- a/sim/aarch64/simulator.c
+++ b/sim/aarch64/simulator.c
@@ -3799,63 +3799,30 @@ do_vec_MLA (sim_cpu *cpu)
switch (INSTR (23, 22))
{
case 0:
- {
- uint16_t a[16], b[16];
-
- for (i = 0; i < (full ? 16 : 8); i++)
- {
- a[i] = aarch64_get_vec_u8 (cpu, vn, i);
- b[i] = aarch64_get_vec_u8 (cpu, vm, i);
- }
-
- for (i = 0; i < (full ? 16 : 8); i++)
- {
- uint16_t v = aarch64_get_vec_u8 (cpu, vd, i);
-
- aarch64_set_vec_u16 (cpu, vd, i, v + (a[i] * b[i]));
- }
- }
+ for (i = 0; i < (full ? 16 : 8); i++)
+ aarch64_set_vec_u8 (cpu, vd, i,
+ aarch64_get_vec_u8 (cpu, vd, i)
+ + (aarch64_get_vec_u8 (cpu, vn, i)
+ * aarch64_get_vec_u8 (cpu, vm, i)));
return;
case 1:
- {
- uint32_t a[8], b[8];
-
- for (i = 0; i < (full ? 8 : 4); i++)
- {
- a[i] = aarch64_get_vec_u16 (cpu, vn, i);
- b[i] = aarch64_get_vec_u16 (cpu, vm, i);
- }
-
- for (i = 0; i < (full ? 8 : 4); i++)
- {
- uint32_t v = aarch64_get_vec_u16 (cpu, vd, i);
-
- aarch64_set_vec_u32 (cpu, vd, i, v + (a[i] * b[i]));
- }
- }
+ for (i = 0; i < (full ? 8 : 4); i++)
+ aarch64_set_vec_u16 (cpu, vd, i,
+ aarch64_get_vec_u16 (cpu, vd, i)
+ + (aarch64_get_vec_u16 (cpu, vn, i)
+ * aarch64_get_vec_u16 (cpu, vm, i)));
return;
case 2:
- {
- uint64_t a[4], b[4];
-
- for (i = 0; i < (full ? 4 : 2); i++)
- {
- a[i] = aarch64_get_vec_u32 (cpu, vn, i);
- b[i] = aarch64_get_vec_u32 (cpu, vm, i);
- }
-
- for (i = 0; i < (full ? 4 : 2); i++)
- {
- uint64_t v = aarch64_get_vec_u32 (cpu, vd, i);
-
- aarch64_set_vec_u64 (cpu, vd, i, v + (a[i] * b[i]));
- }
- }
+ for (i = 0; i < (full ? 4 : 2); i++)
+ aarch64_set_vec_u32 (cpu, vd, i,
+ aarch64_get_vec_u32 (cpu, vd, i)
+ + (aarch64_get_vec_u32 (cpu, vn, i)
+ * aarch64_get_vec_u32 (cpu, vm, i)));
return;
- case 3:
+ default:
HALT_UNALLOC;
}
}