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author | Mike Frysinger <vapier@gentoo.org> | 2016-08-13 11:10:55 +0800 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2022-12-21 00:00:00 -0500 |
commit | 6a08ae198bb9176b3fabf5d2f899349aabff1cbd (patch) | |
tree | 6ba3ab9952f2ad06b44d2391a26b4d4ad6f062c7 /sim/aarch64/sim-main.h | |
parent | 9dfc46c3d955622a0c37361034313139ba7f0200 (diff) | |
download | gdb-6a08ae198bb9176b3fabf5d2f899349aabff1cbd.zip gdb-6a08ae198bb9176b3fabf5d2f899349aabff1cbd.tar.gz gdb-6a08ae198bb9176b3fabf5d2f899349aabff1cbd.tar.bz2 |
sim: aarch64: invert sim_cpu storage
Diffstat (limited to 'sim/aarch64/sim-main.h')
-rw-r--r-- | sim/aarch64/sim-main.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/sim/aarch64/sim-main.h b/sim/aarch64/sim-main.h index baeb51b..0da730d 100644 --- a/sim/aarch64/sim-main.h +++ b/sim/aarch64/sim-main.h @@ -22,6 +22,8 @@ #ifndef _SIM_MAIN_H #define _SIM_MAIN_H +#define SIM_HAVE_COMMON_SIM_CPU + #include "sim-basics.h" #include "sim-types.h" #include "sim-base.h" @@ -30,7 +32,7 @@ #include "cpustate.h" /* A per-core state structure. */ -struct _sim_cpu +struct aarch64_sim_cpu { GRegister gr[33]; /* Extra register at index 32 is used to hold zero value. */ FRegister fr[32]; @@ -44,10 +46,10 @@ struct _sim_cpu uint32_t instr; uint64_t tpidr; /* Thread pointer id. */ - - sim_cpu_base base; }; +#define AARCH64_SIM_CPU(cpu) ((struct aarch64_sim_cpu *) CPU_ARCH_DATA (cpu)) + typedef enum { AARCH64_MIN_GR = 0, |