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authorNick Clifton <nickc@redhat.com>2021-09-02 12:16:10 +0100
committerNick Clifton <nickc@redhat.com>2021-09-02 12:16:10 +0100
commit718aefcf55cc5a9de3f73d9a37259f8f792b1cef (patch)
treead9614678c1ee7c55ffc1c57e146816471569d94 /opcodes
parentb03b65e2aa3243bc0224ba3f933a3e94f1eed8a1 (diff)
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Fix the V850 assembler's generation of relocations for the st.b instruction.
PR 28292 gas * config/tc-v850.c (handle_lo16): Also accept BFD_RELOC_V850_LO16_SPLIT_OFFSET. * testsuite/gas/v850/split-lo16.s: Add extra line. * testsuite/gas/v850/split-lo16.d: Update expected disassembly. opcodes * v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place of BFD_RELOC_16.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/v850-opc.c2
2 files changed, 7 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d0bfa80..ca3206d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2021-09-02 Nick Clifton <nickc@redhat.com>
+
+ PR 28292
+ * v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place
+ of BFD_RELOC_16.
+
2021-08-17 Shahab Vahedi <shahab@synopsys.com>
* arc-regs.h (DEF): Fix the register numbers.
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 24720b3..852fe61 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -1190,7 +1190,7 @@ const struct v850_operand v850_operands[] =
/* The disp16 field in a format 8 insn. */
#define D16 (I16U + 1)
- { 16, 16, NULL, NULL, V850_OPERAND_SIGNED | V850_OPERAND_DISP, BFD_RELOC_16 },
+ { 16, 16, NULL, NULL, V850_OPERAND_SIGNED | V850_OPERAND_DISP, BFD_RELOC_V850_LO16_SPLIT_OFFSET },
/* The disp16 field in an format 7 unsigned byte load insn. */
#define D16_16 (D16 + 1)