diff options
| author | Faraz Shahbazker <fshahbazker@wavecomp.com> | 2019-05-13 17:19:37 -0700 |
|---|---|---|
| committer | Faraz Shahbazker <fshahbazker@wavecomp.com> | 2019-05-21 09:28:24 -0700 |
| commit | cd4797ee054654160fe6c4b6fbecd636b7961e19 (patch) | |
| tree | 32ffbea3f566a32ed45fbb668a121a21bed2b820 /opcodes/mips-opc.c | |
| parent | 3734320dc054bd9f6632607e9e5c901c57450791 (diff) | |
| download | gdb-cd4797ee054654160fe6c4b6fbecd636b7961e19.zip gdb-cd4797ee054654160fe6c4b6fbecd636b7961e19.tar.gz gdb-cd4797ee054654160fe6c4b6fbecd636b7961e19.tar.bz2 | |
MIPS/gas: Reject $0 as source register for DAUI instruction
The MIPS64R6 TRM requires that the source register for DAUI
not be r0.
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS64
Instruction Set Manual", Imagination Technologies Ltd., Document
Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
"Alphabetical List of Instructions", pp. 67-68.
gas/
* testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
* testsuite/gas/mips/r6-reg-constraints.s: this and add test
case for DAUI.
* testsuite/gas/mips/r6-branch-constraints.l: Rename to ...
* testsuite/gas/mips/r6-reg-constraints.l: this and add test
for DAUI.
* testsuite/gas/mips/mips.exp: Rename test from
r6-branch-constraints to r6-reg-constraints.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Change source register
constraint for DAUI.
Diffstat (limited to 'opcodes/mips-opc.c')
| -rw-r--r-- | opcodes/mips-opc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 69b16be..0483a04 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -3271,7 +3271,7 @@ const struct mips_opcode mips_builtin_opcodes[] = /* MIPS r6. */ {"aui", "t,s,u", 0x3c000000, 0xfc000000, WR_1|RD_2, 0, I37, 0, 0 }, {"auipc", "s,u", 0xec1e0000, 0xfc1f0000, WR_1, RD_pc, I37, 0, 0 }, -{"daui", "t,s,u", 0x74000000, 0xfc000000, WR_1|RD_2, 0, I37, 0, 0 }, +{"daui", "t,-s,u", 0x74000000, 0xfc000000, WR_1|RD_2, 0, I37, 0, 0 }, {"dahi", "s,-d,u", 0x04060000, 0xfc1f0000, MOD_1, 0, I69, 0, 0 }, {"dati", "s,-d,u", 0x041e0000, 0xfc1f0000, MOD_1, 0, I69, 0, 0 }, |