diff options
| author | Maciej W. Rozycki <macro@linux-mips.org> | 2010-07-06 00:02:46 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@linux-mips.org> | 2010-07-06 00:02:46 +0000 |
| commit | 9a2c7088871654be1a94ea4d721fb9c76b4a3162 (patch) | |
| tree | b75cc830de7cef29246d029e0b3a296707b88d2f /opcodes/mips-dis.c | |
| parent | bf501491eae0fd3a0451fded1a51fe58f6010e11 (diff) | |
| download | gdb-9a2c7088871654be1a94ea4d721fb9c76b4a3162.zip gdb-9a2c7088871654be1a94ea4d721fb9c76b4a3162.tar.gz gdb-9a2c7088871654be1a94ea4d721fb9c76b4a3162.tar.bz2 | |
gas/
* config/tc-mips.c (nops_for_insn_or_target): Replace
MIPS16_INSN_BRANCH with MIPS16_INSN_UNCOND_BRANCH and
MIPS16_INSN_COND_BRANCH.
include/opcode/
* mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
(MIPS16_INSN_BRANCH): Rename to...
(MIPS16_INSN_COND_BRANCH): ... this.
opcodes/
* mips-dis.c (print_mips16_insn_arg): Remove branch instruction
type and delay slot determination.
(print_insn_mips16): Extend branch instruction type and delay
slot determination to cover all instructions.
* mips16-opc.c (BR): Remove macro.
(UBR, CBR): New macros.
(mips16_opcodes): Update branch annotation for "b", "beqz",
"bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
and "jrc".
Diffstat (limited to 'opcodes/mips-dis.c')
| -rw-r--r-- | opcodes/mips-dis.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index bcfef72..01e446c 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -1660,7 +1660,6 @@ print_mips16_insn_arg (char type, signedp = 1; pcrel = 1; branch = 1; - info->insn_type = dis_condbranch; break; case 'q': nbits = 11; @@ -1668,7 +1667,6 @@ print_mips16_insn_arg (char type, signedp = 1; pcrel = 1; branch = 1; - info->insn_type = dis_branch; break; case 'A': nbits = 8; @@ -1789,8 +1787,6 @@ print_mips16_insn_arg (char type, } info->target = ((memaddr + 4) & ~(bfd_vma) 0x0fffffff) | l; (*info->print_address_func) (info->target, info); - info->insn_type = dis_jsr; - info->branch_delay_insns = 1; break; case 'l': @@ -2082,12 +2078,19 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info) info); } + /* Figure out branch instruction type and delay slot information. */ if ((op->pinfo & INSN_UNCOND_BRANCH_DELAY) != 0) + info->branch_delay_insns = 1; + if ((op->pinfo & (INSN_UNCOND_BRANCH_DELAY + | MIPS16_INSN_UNCOND_BRANCH)) != 0) { - info->branch_delay_insns = 1; - if (info->insn_type != dis_jsr) + if ((op->pinfo & INSN_WRITE_GPR_31) != 0) + info->insn_type = dis_jsr; + else info->insn_type = dis_branch; } + else if ((op->pinfo & MIPS16_INSN_COND_BRANCH) != 0) + info->insn_type = dis_condbranch; return length; } |