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authorH.J. Lu <hjl.tools@gmail.com>2007-10-12 21:40:38 +0000
committerH.J. Lu <hjl.tools@gmail.com>2007-10-12 21:40:38 +0000
commite2ec9d29b7b08124192281bf4cdb4c89c80762f8 (patch)
tree070eeb356123b2afd62558ce4278924a1c55ebf2 /opcodes/i386-opc.h
parent88a94849aabddaf4e6d1d2f4f2e64a5eab811430 (diff)
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2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_operands): Check the firstxmm0 field in opcode_modifier for instruction with a implicit xmm0 as the first operand. opcodes/ 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add FirstXmm0. * i386-opc.h (FirstXmm0): New. (IsPrefix): Updated. (i386_opcode_modifier): Add firstxmm0. * i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0. (blendvps): Likewise. (pblendvb): Likewise. * i386-tbl.h: Regenerated.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index d542505..044cfd7 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -195,8 +195,10 @@ typedef union i386_cpu_flags
/* fake an extra reg operand for clr, imul and special register
processing for some instructions. */
#define RegKludge (IsString + 1)
+/* The first operand must be xmm0 */
+#define FirstXmm0 (RegKludge + 1)
/* opcode is a prefix */
-#define IsPrefix (RegKludge + 1)
+#define IsPrefix (FirstXmm0 + 1)
/* instruction has extension in 8 bit imm */
#define ImmExt (IsPrefix + 1)
/* instruction don't need Rex64 prefix. */
@@ -240,6 +242,7 @@ typedef struct i386_opcode_modifier
unsigned int fwait:1;
unsigned int isstring:1;
unsigned int regkludge:1;
+ unsigned int firstxmm0:1;
unsigned int isprefix:1;
unsigned int immext:1;
unsigned int norex64:1;