diff options
| author | Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> | 2020-10-20 23:56:58 +0530 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-10-20 13:58:04 -0700 |
| commit | 646cc3e0109e4a45a232af8354feafc36c3249ee (patch) | |
| tree | e883bae3df2bdce5f5849c2cf43452d2c838e5ad /opcodes/i386-gen.c | |
| parent | c4464adef2d7909cd45542690b5d3fd6ab1910c6 (diff) | |
| download | gdb-646cc3e0109e4a45a232af8354feafc36c3249ee.zip gdb-646cc3e0109e4a45a232af8354feafc36c3249ee.tar.gz gdb-646cc3e0109e4a45a232af8354feafc36c3249ee.tar.bz2 | |
Add AMD znver3 processor support
gas/
* config/tc-i386.c (cpu_arch): Add CPU_ZNVER3_FLAGS flags.
(i386_align_code): Add PROCESSOR_ZNVER cases.
* doc/c-i386.texi: Add znver3, snp, invlpgb and tlbsync.
* gas/i386/i386.exp: Add new znver3 test cases.
* gas/i386/arch-14-znver3.d: New.
* gas/i386/arch-14.d: New.
* gas/i386/arch-14.s: New.
* gas/i386/invlpgb.d: New.
* gas/i386/invlpgb64.d: New.
* gas/i386/invlpgb.s: New.
* gas/i386/snp.d: New.
* gas/i386/snp64.d: New.
* gas/i386/snp.s: New.
* gas/i386/tlbsync.d: New.
* gas/i386/tlbsync.s: New.
* gas/i386/x86-64-arch-4-znver3.d: New.
* gas/i386/x86-64-arch-4.d: New.
* gas/i386/x86-64-arch-4.s: New.
opcodes/
* i386-dis.c (rm_table): Add tlbsync, snp, invlpgb.
* i386-gen.c (cpu_flag_init): Add new CPU_INVLPGB_FLAGS,
CPU_TLBSYNC_FLAGS, and CPU_SNP_FLAGS.
Add CPU_ZNVER3_FLAGS.
(cpu_flags): Add CpuINVLPGB, CpuTLBSYNC, CpuSNP.
* i386-opc.h: Add CpuINVLPGB, CpuTLBSYNC, CpuSNP.
* i386-opc.tbl: Add invlpgb, tlbsync, psmash, pvalidate,
rmpupdate, rmpadjust.
* i386-init.h: Re-generated.
* i386-tbl.h: Re-generated.
Diffstat (limited to 'opcodes/i386-gen.c')
| -rw-r--r-- | opcodes/i386-gen.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index c3f0181..01a372e 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -103,6 +103,8 @@ static initializer cpu_flag_init[] = "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuLZCNT|CpuPOPCNT|CpuSVME|CpuAES|CpuPCLMUL|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, { "CPU_ZNVER2_FLAGS", "CPU_ZNVER1_FLAGS|CpuCLWB|CpuRDPID|CpuRDPRU|CpuMCOMMIT|CpuWBNOINVD" }, + { "CPU_ZNVER3_FLAGS", + "CPU_ZNVER2_FLAGS|CpuINVLPGB|CpuTLBSYNC|CpuVAES|CpuVPCLMULQDQ|CpuINVPCID|CpuSNP|CpuOSPKE" }, { "CPU_BTVER1_FLAGS", "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuLZCNT|CpuPOPCNT|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME" }, { "CPU_BTVER2_FLAGS", @@ -333,6 +335,12 @@ static initializer cpu_flag_init[] = "CpuWideKL" }, { "CPU_HRESET_FLAGS", "CpuHRESET"}, + { "CPU_INVLPGB_FLAGS", + "CpuINVLPGB" }, + { "CPU_TLBSYNC_FLAGS", + "CpuTLBSYNC" }, + { "CPU_SNP_FLAGS", + "CpuSNP" }, { "CPU_ANY_X87_FLAGS", "CPU_ANY_287_FLAGS|Cpu8087" }, { "CPU_ANY_287_FLAGS", @@ -666,6 +674,9 @@ static bitfield cpu_flags[] = BITFIELD (CpuKL), BITFIELD (CpuWideKL), BITFIELD (CpuHRESET), + BITFIELD (CpuINVLPGB), + BITFIELD (CpuTLBSYNC), + BITFIELD (CpuSNP), #ifdef CpuUnused BITFIELD (CpuUnused), #endif |