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| author | Jan Beulich <jbeulich@suse.com> | 2020-03-06 08:50:56 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-03-06 08:50:56 +0100 |
| commit | a23b33b3d131f240b2525d9a24831b33f2b43e26 (patch) | |
| tree | 99add9964f55a4b6ed0acd13a14388b09537ed91 /opcodes/i386-dis.c | |
| parent | a04973848dc529f4eeb3bd198251da9faf01e2a2 (diff) | |
| download | gdb-a23b33b3d131f240b2525d9a24831b33f2b43e26.zip gdb-a23b33b3d131f240b2525d9a24831b33f2b43e26.tar.gz gdb-a23b33b3d131f240b2525d9a24831b33f2b43e26.tar.bz2 | |
x86: correct MPX insn w/o base or index encoding in 16-bit mode
Since 16-bit addressing isn't allowed, Disp32 needs to be forced; Disp16
fails to match the templates.
The SDM leaves open whether BNDC[LNU] with a GPR operand require an
operand size override; this aspect is therefore left untouched here.
Diffstat (limited to 'opcodes/i386-dis.c')
| -rw-r--r-- | opcodes/i386-dis.c | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 734cfa6..9b20944 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -14272,10 +14272,11 @@ OP_E_memory (int bytemode, int sizeflag) } if ((havebase || haveindex || needindex || needaddr32 || riprel) - && (bytemode != v_bnd_mode) - && (bytemode != v_bndmk_mode) - && (bytemode != bnd_mode) - && (bytemode != bnd_swap_mode)) + && (address_mode != mode_64bit + || ((bytemode != v_bnd_mode) + && (bytemode != v_bndmk_mode) + && (bytemode != bnd_mode) + && (bytemode != bnd_swap_mode)))) used_prefixes |= PREFIX_ADDR; if (havedisp || (intel_syntax && riprel)) @@ -14356,6 +14357,14 @@ OP_E_memory (int bytemode, int sizeflag) } } } + else if (bytemode == v_bnd_mode + || bytemode == v_bndmk_mode + || bytemode == bnd_mode + || bytemode == bnd_swap_mode) + { + oappend ("(bad)"); + return; + } else { /* 16 bit address mode */ |