diff options
| author | Jan Beulich <jbeulich@suse.com> | 2020-02-12 16:19:03 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-02-12 16:19:03 +0100 |
| commit | 5990e377e5a339bce715fabfc3e45b24b459a7af (patch) | |
| tree | d14b42a87167ad6209f6dee222588556eeb8da7b /opcodes/i386-dis.c | |
| parent | f20e3e823d56e54ffe56792ea6a2fe947c2dec0d (diff) | |
| download | gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.zip gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.tar.gz gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.tar.bz2 | |
x86-64: Intel64 adjustments for insns dealing with far pointers
AMD and Intel differ in their handling of far indirect branches as well
as LFS/LGS/LSS: AMD CPUs ignore REX.W while Intel ones honors it. (Note
how the latter three were hybrids so far, while far branches were fully
AMD-like.)
Diffstat (limited to 'opcodes/i386-dis.c')
| -rw-r--r-- | opcodes/i386-dis.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index d2b33d0..8e0a950 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -2331,8 +2331,8 @@ struct dis386 { 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise '!' => change condition from true to false or from false to true. '%' => add 1 upper case letter to the macro. - '^' => print 'w' or 'l' depending on operand size prefix or - suffix_always is true (lcall/ljmp). + '^' => print 'w', 'l', or 'q' (Intel64 ISA only) depending on operand size + prefix or suffix_always is true (lcall/ljmp). '@' => print 'q' for Intel64 ISA, 'w' or 'q' for AMD64 ISA depending on operand size prefix. '&' => print 'q' in 64bit mode for Intel64 ISA or if instruction @@ -13296,6 +13296,12 @@ case_S: case '^': if (intel_syntax) break; + if (isa64 == intel64 && (rex & REX_W)) + { + USED_REX (REX_W); + *obufp++ = 'q'; + break; + } if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS)) { if (sizeflag & DFLAG) |