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author | Jan Beulich <jbeulich@suse.com> | 2020-01-31 14:29:18 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2020-01-31 14:29:18 +0100 |
commit | 4102be5cf925999e1f3f999c95479360291205de (patch) | |
tree | 8f434deeda253adf3063bc871170fe51bd03e0ac /opcodes/i386-dis.c | |
parent | 825bd36ceadf7fd3288ced262d6aed9f5b9ab919 (diff) | |
download | gdb-4102be5cf925999e1f3f999c95479360291205de.zip gdb-4102be5cf925999e1f3f999c95479360291205de.tar.gz gdb-4102be5cf925999e1f3f999c95479360291205de.tar.bz2 |
x86: replace EXxmm_mdq by EXVexWdqScalar
There's no need to have two operand specifiers / enumerators for the
same purpose. This then renders xmm_mdq_mode unused.
Diffstat (limited to 'opcodes/i386-dis.c')
-rw-r--r-- | opcodes/i386-dis.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 10276c6..d2b33d0 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -401,7 +401,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EXxmm_mw { OP_EX, xmm_mw_mode } #define EXxmm_md { OP_EX, xmm_md_mode } #define EXxmm_mq { OP_EX, xmm_mq_mode } -#define EXxmm_mdq { OP_EX, xmm_mdq_mode } #define EXxmmdw { OP_EX, xmmdw_mode } #define EXxmmqd { OP_EX, xmmqd_mode } #define EXymmq { OP_EX, ymmq_mode } @@ -537,9 +536,6 @@ enum xmm_md_mode, /* XMM register or quad word memory operand */ xmm_mq_mode, - /* XMM register or double/quad word memory operand, depending on - VEX.W. */ - xmm_mdq_mode, /* 16-byte XMM, word, double word or quad word operand. */ xmmdw_mode, /* 16-byte XMM, double word, quad word operand or xmm word operand. */ @@ -13771,7 +13767,6 @@ intel_operand_size (int bytemode, int sizeflag) case o_mode: oappend ("OWORD PTR "); break; - case xmm_mdq_mode: case vex_scalar_w_dq_mode: if (!need_vex) abort (); @@ -14016,12 +14011,12 @@ OP_E_memory (int bytemode, int sizeflag) break; } /* fall through */ + case vex_scalar_w_dq_mode: case vex_vsib_d_w_dq_mode: case vex_vsib_d_w_d_mode: case vex_vsib_q_w_dq_mode: case vex_vsib_q_w_d_mode: case evex_x_gscat_mode: - case xmm_mdq_mode: shift = vex.w ? 3 : 2; break; case x_mode: @@ -15367,7 +15362,6 @@ OP_EX (int bytemode, int sizeflag) && bytemode != xmm_mw_mode && bytemode != xmm_md_mode && bytemode != xmm_mq_mode - && bytemode != xmm_mdq_mode && bytemode != xmmq_mode && bytemode != evex_half_bcst_xmmq_mode && bytemode != ymm_mode |