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authorClaudiu Zissulescu <claziss@synopsys.com>2017-07-19 09:56:55 +0200
committerclaziss <claziss@synopsys.com>2017-07-19 09:56:55 +0200
commit7179e0e6b2e0ed7b220af8836a88ef308faf5898 (patch)
tree236dfc3015bf0c6b982a65ddcb8214601c6893b1 /opcodes/arc-tbl.h
parent684d5a10b1332e2a1b03a1d6e7a899ef87b3ea16 (diff)
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[ARC] Add SJLI instruction.
include/ 2017-07-19 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (SJLI): Add. opcode/ 2017-07-19 Claudiu Zissulescu <claziss@synopsys.com> * arc-opc.c (extract_uimm12_20): New function. (UIMM12_20): New operand. (SIMM3_5_S): Adjust. * arc-tbl.h (sjli): Add new instruction.
Diffstat (limited to 'opcodes/arc-tbl.h')
-rw-r--r--opcodes/arc-tbl.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h
index 07ff304..ab51f0d 100644
--- a/opcodes/arc-tbl.h
+++ b/opcodes/arc-tbl.h
@@ -14535,6 +14535,9 @@
/* sfxtr<.f><.cc> b,b,limm 00110bbb11101001FBBB1111100QQQQQ. */
{ "sfxtr", 0x30E90F80, 0xF8FF0FE0, ARC_OPCODE_ARC700, ARITH, NONE, { RB, RBdup, LIMM }, { C_F, C_CC }},
+/* sjli u12 00101RRR101000001RRRuuuuuuUUUUUU. */
+{ "sjli", 0x28A08000, 0xFFFFF000, ARC_OPCODE_ARCv2EM, SJLI, CD1, { UIMM12_20 }, { 0 }},
+
/* sleep c 00100001001011110000CCCCCC111111. */
{ "sleep", 0x212F003F, 0xFFFFF03F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, KERNEL, NONE, { RC }, { 0 }},