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| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:21:33 +0000 |
|---|---|---|
| committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:29:05 +0000 |
| commit | 971eda734150ea9cdea47be259486c3a8d087037 (patch) | |
| tree | 3b9493f052037ac3bde3619db1c4e7d22d986d0b /opcodes/aarch64-opc.c | |
| parent | 57f02370a1e55bf09d3ede5ba6b2fcc78b40200a (diff) | |
| download | gdb-971eda734150ea9cdea47be259486c3a8d087037.zip gdb-971eda734150ea9cdea47be259486c3a8d087037.tar.gz gdb-971eda734150ea9cdea47be259486c3a8d087037.tar.bz2 | |
aarch64: [SME] Add SME instructions
Patch is adding new SME matrix instructions. Please note additional
instructions will be added in following patches.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_zada_operand):
New parser.
* config/tc-aarch64.c (parse_reg_with_qual):
New reg parser.
* config/tc-aarch64.c (R_ZA): New egister type.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-illegal.d: New test.
* testsuite/gas/aarch64/sme-illegal.l: New test.
* testsuite/gas/aarch64/sme-illegal.s: New test.
* testsuite/gas/aarch64/sme.d: New test.
* testsuite/gas/aarch64/sme.s: New test.
* testsuite/gas/aarch64/sme-f64.d: New test.
* testsuite/gas/aarch64/sme-f64.s: New test.
* testsuite/gas/aarch64/sme-i64.d: New test.
* testsuite/gas/aarch64/sme-i64.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operands
AARCH64_OPND_SME_ZAda_2b, AARCH64_OPND_SME_ZAda_3b and
AARCH64_OPND_SME_Pm.
(enum aarch64_insn_class): New instruction class sme_misc.
opcodes/ChangeLog:
* aarch64-opc.c (aarch64_print_operand):
Print OPND_SME_ZAda_2b and OPND_SME_ZAda_3b operands.
(verify_constraints): Handle OPND_SME_Pm.
* aarch64-opc.h (enum aarch64_field_kind):
New bit fields FLD_SME_ZAda_2b, FLD_SME_ZAda_3b and FLD_SME_Pm.
* aarch64-tbl.h (OP_SME_ZADA_PN_PM_ZN_S): New qualifier set.
(OP_SME_ZADA_PN_PM_ZN_D): New qualifier.
(OP_SME_ZADA_PN_PM_ZN_ZM): New qualifier.
(OP_SME_ZADA_S_PM_PM_S_S): New qualifier.
(OP_SME_ZADA_D_PM_PM_D_D): New qualifier.
(OP_SME_ZADA_S_PM_PM_H_H): New qualifier.
(OP_SME_ZADA_S_PM_PM_B_B): New qualifier.
(OP_SME_ZADA_D_PM_PM_H_H): New qualifier.
(SME_INSN): New instruction macro.
(SME_F64_INSN): New instruction macro.
(SME_I64_INSN): New instruction macro.
(SME_INSNC): New instruction macro.
(struct aarch64_opcode): New SME instructions.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index dea4b8e..8ced8e0 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -321,6 +321,9 @@ const aarch64_field fields[] = { 19, 2 }, /* SVE_tszl_19: triangular size select low, bits [20,19]. */ { 14, 1 }, /* SVE_xs_14: UXTW/SXTW select (bit 14). */ { 22, 1 }, /* SVE_xs_22: UXTW/SXTW select (bit 22). */ + { 0, 2 }, /* SME ZAda tile ZA0-ZA3. */ + { 0, 3 }, /* SME ZAda tile ZA0-ZA7. */ + { 13, 3 }, /* SME Pm second source scalable predicate register P0-P7. */ { 11, 2 }, /* rotate1: FCMLA immediate rotate. */ { 13, 2 }, /* rotate2: Indexed element FCMLA immediate rotate. */ { 12, 1 }, /* rotate3: FCADD immediate rotate. */ @@ -3304,6 +3307,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, case AARCH64_OPND_SVE_Pm: case AARCH64_OPND_SVE_Pn: case AARCH64_OPND_SVE_Pt: + case AARCH64_OPND_SME_Pm: if (opnd->qualifier == AARCH64_OPND_QLF_NIL) snprintf (buf, size, "p%d", opnd->reg.regno); else if (opnd->qualifier == AARCH64_OPND_QLF_P_Z @@ -3345,6 +3349,12 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, opnd->reglane.index); break; + case AARCH64_OPND_SME_ZAda_2b: + case AARCH64_OPND_SME_ZAda_3b: + snprintf (buf, size, "za%d.%s", opnd->reg.regno, + aarch64_get_qualifier_name (opnd->qualifier)); + break; + case AARCH64_OPND_CRn: case AARCH64_OPND_CRm: snprintf (buf, size, "C%" PRIi64, opnd->imm.value); @@ -5277,6 +5287,7 @@ verify_constraints (const struct aarch64_inst *inst, case AARCH64_OPND_SVE_Pm: case AARCH64_OPND_SVE_Pn: case AARCH64_OPND_SVE_Pt: + case AARCH64_OPND_SME_Pm: inst_pred = inst_op; inst_pred_idx = i; break; |