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| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2020-09-28 15:37:50 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2020-09-28 15:37:50 +0100 |
| commit | 1ff8e4010580a425e5f4e7bd14471154b2ab33c9 (patch) | |
| tree | cb8d565179a78514c692fa557840668ceb03d341 /opcodes/aarch64-opc.c | |
| parent | 9bede61ce5e1f12fa545c9138f93b6a2097e63eb (diff) | |
| download | gdb-1ff8e4010580a425e5f4e7bd14471154b2ab33c9.zip gdb-1ff8e4010580a425e5f4e7bd14471154b2ab33c9.tar.gz gdb-1ff8e4010580a425e5f4e7bd14471154b2ab33c9.tar.bz2 | |
This patch introduces TRBE (Trace Buffer Extension) system registers for the AArch64 architecture.
gas * testsuite/gas/aarch64/trbe-invalid.d: New test.
* testsuite/gas/aarch64/trbe-invalid.l: New test.
* testsuite/gas/aarch64/trbe-invalid.s: New test.
* testsuite/gas/aarch64/trbe.d: New test.
* testsuite/gas/aarch64/trbe.s: New test.
opcodes * aarch64-opc.c: Add TRBE system registers TRBIDR_EL1 , TRBBASER_EL1 ,
TRBLIMITR_EL1 , TRBMAR_EL1 , TRBPTR_EL1, TRBSR_EL1 and TRBTRG_EL1.
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 22d6934..1be8d21 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -4311,6 +4311,14 @@ const aarch64_sys_reg aarch64_sys_regs [] = SR_V8_R ("prselr_el2", CPENC (3,4,C6,C2,1), 0), SR_V8_R ("vsctlr_el2", CPENC (3,4,C2,C0,0), 0), + SR_CORE("trbbaser_el1", CPENC (3,0,C9,C11,2), 0), + SR_CORE("trbidr_el1", CPENC (3,0,C9,C11,7), F_REG_READ), + SR_CORE("trblimitr_el1", CPENC (3,0,C9,C11,0), 0), + SR_CORE("trbmar_el1", CPENC (3,0,C9,C11,4), 0), + SR_CORE("trbptr_el1", CPENC (3,0,C9,C11,1), 0), + SR_CORE("trbsr_el1", CPENC (3,0,C9,C11,3), 0), + SR_CORE("trbtrg_el1", CPENC (3,0,C9,C11,6), 0), + { 0, CPENC (0,0,0,0,0), 0, 0 } }; |