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authorPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2021-04-19 15:00:07 +0100
committerPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2021-04-19 15:01:56 +0100
commit02202574ec8d0d7e2a90c41342cc22cc2173da28 (patch)
tree98549abccadb95e3cbe61395c6335ae03b9dfe5b /opcodes/aarch64-opc.c
parentcd6608e49d884f01536b5948ed3a64241dbb4a1f (diff)
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aarch64: New instructions for maintenance of GPT entries cached in a TLB
This patch adds support to four new system registers (RPAOS, RPALOS, PAALLOS, PAALL) in conjunction with TLBI instruction. This change is part of RME (Realm Management Extension). gas/ChangeLog: 2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> * NEWS: Update news. * testsuite/gas/aarch64/rme.d: Update test. * testsuite/gas/aarch64/rme.s: Update test. opcodes/ChangeLog: 2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> * aarch64-opc.c: Add new registers (RPAOS, RPALOS, PAALLOS, PAALL) support for TLBI instruction.
Diffstat (limited to 'opcodes/aarch64-opc.c')
-rw-r--r--opcodes/aarch64-opc.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index b315a82..dea4b8e 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -4870,6 +4870,11 @@ const aarch64_sys_ins_reg aarch64_sys_regs_tlbi[] =
{ "rvae3os", CPENS (6, C8, C5, 1), F_HASXT | F_ARCHEXT },
{ "rvale3os", CPENS (6, C8, C5, 5), F_HASXT | F_ARCHEXT },
+ { "rpaos", CPENS (6, C8, C4, 3), F_HASXT },
+ { "rpalos", CPENS (6, C8, C4, 7), F_HASXT },
+ { "paallos", CPENS (6, C8, C1, 4), 0},
+ { "paall", CPENS (6, C8, C7, 4), 0},
+
{ 0, CPENS(0,0,0,0), 0 }
};