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| author | Jan Beulich <jbeulich@suse.com> | 2019-07-16 09:31:36 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2019-07-16 09:31:36 +0200 |
| commit | dfd6917457a3030ea4a4b6356f65216fab92d0b8 (patch) | |
| tree | 564ff316e799585e35f21a1cec2393a4d5d11e4d /opcodes/ChangeLog | |
| parent | 21df382b918888de64749e977f185c4e10a5b838 (diff) | |
| download | gdb-dfd6917457a3030ea4a4b6356f65216fab92d0b8.zip gdb-dfd6917457a3030ea4a4b6356f65216fab92d0b8.tar.gz gdb-dfd6917457a3030ea4a4b6356f65216fab92d0b8.tar.bz2 | |
x86: make RegMem an opcode modifier
... instead of an operand type bit: It's an insn property, not an
operand one. There's just one actual change to be made to the
templates: Most are now required to have the (unswapped) destination go
into ModR/M.rm, so VMOVD template needs its opcode adjusted accordingly
and its operands swapped. {,V}MOVS{S,D}, otoh, are left alone in this
regard, as otherwise generated code would differ from what we've been
producing so far (which I don't think is wanted).
Take the opportunity and add a missing IgnoreSize to pextrb (leading to
an error in 16-bit mode), and take the liberty to once again drop stray
IgnoreSize attributes from lines changed and neighboring related ones.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 2a7c67f..c8af99f 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,28 @@ 2019-07-16 Jan Beulich <jbeulich@suse.com> + * i386-gen.c (operand_types): Move RegMem ... + (opcode_modifiers): ... here. + * i386-opc.h (RegMem): Move to opcode modifer enum. + (union i386_operand_type): Move regmem field ... + (struct i386_opcode_modifier): ... here. + * i386-opc.tbl (RegMem): Define. + (mov, movq): Move RegMem on segment, control, debug, and test + register flavors. + (pextrb): Move RegMem on register only flavors. Add IgnoreSize + to non-SSE2AVX flavor. + (extractps, pextrw, vcvtps2ph, vextractps, vpextrb, vpextrw): + Move RegMem on register only flavors. Drop IgnoreSize from + legacy encoding flavors. + (movss, movsd, vmovss, vmovsd): Drop RegMem from register only + flavors. + (vpinsrb, vpinsrw): Drop IgnoreSize where still present on + register only flavors. + (vmovd): Move RegMem and drop IgnoreSize on register only + flavor. Change opcode and operand order to store form. + * opcodes/i386-init.h, i386-tbl.h: Re-generate. + +2019-07-16 Jan Beulich <jbeulich@suse.com> + * i386-gen.c (operand_type_init, operand_types): Replace SReg entries. * i386-opc.h (SReg2, SReg3): Replace by ... |