include/elf:

	* arm.h: Import complete list of official relocation names
	and numbers from AAELF.  Define FAKE_RELOCs for old names.
	Remove a few old names no longer used anywhere.

bfd:
	* elf32-arm.c: Wherever possible, use official reloc names
	from AAELF.
	(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
	(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
	(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
	(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
	(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
	(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
	elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
	Add many new relocations from AAELF.
	(elf32_arm_howto_from_type): Update to match.
	(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
	R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
	R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
	(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
	(elf32_arm_final_link_relocate): Add support for
	R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6.  Remove
	case entries redundant with default.

	* reloc.c: Reorganize ARM relocations.  Add Thumb
	assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
	BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
	Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
	BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
	Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
	* bfd-in2.h, libbfd.h: Regenerate.

opcodes:
	* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
	instructions.  Adjust disassembly of some opcodes to match
	unified syntax.
	(thumb32_opcodes): New table.
	(print_insn_thumb): Rename print_insn_thumb16; don't handle
	two-halfword branches here.
	(print_insn_thumb32): New function.
	(print_insn): Choose among print_insn_arm, print_insn_thumb16,
	and print_insn_thumb32.  Be consistent about order of
	halfwords when printing 32-bit instructions.

gas:
	* hash.c (hash_lookup): Add len parameter.  All callers changed.
	(hash_find_n): New interface.
	* hash.h: Prototype hash_find_n.
	* sb.c: Include as.h.
	(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
	(sb_scrub_and_add_sb): New interface.
	* sb.h: Prototype sb_scrub_and_add_sb.
	* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.

	* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
	reference to BFD_RELOC_ARM_GOT12 which is never generated.
	* config/tc-arm.c: Rewrite, adding Thumb-2 support.

gas/testsuite:
	* gas/arm/arm.exp: Convert all existing "gas_test" tests to
	"run_dump_test" tests.  Run more tests unconditionally.  Run new tests.
	* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
	* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
	* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
	Adjust to work as a dump test.
	* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
	* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
	* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
	New files.

	* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
	diagnostics that don't happen in the first pass anymore.

	* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
	* gas/arm/vfp-bad.l:
	Update expected diagnostics.
	* gas/arm/pic.d: Update expected reloc name.
	* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
	* gas/arm/r15-bad.s: Avoid two-argument mul.
	* gas/arm/req.s: Adjust comments.
	* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
	use of PC.

	* gas/arm/macro-1.d, gas/arm/macro1.s
	* gas/arm/t16-bad.l, gas/arm/t16-bad.s
	* gas/arm/tcompat.d, gas/arm/tcompat.s
	* gas/arm/tcompat2.d, gas/arm/tcompat2.s
	* gas/arm/thumb32.d, gas/arm/thumb32.s
	New test pair.

ld/testsuite:
	* ld-arm/mixed-app.d: Adjust expected disassembly a little.

1 files changed, 15 insertions, 2 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b76172e..291f51f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,16 @@
+2005-05-17  Zack Weinberg  <zack@codesourcery.com>
+
+	* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
+	instructions.  Adjust disassembly of some opcodes to match
+	unified syntax.
+	(thumb32_opcodes): New table.
+	(print_insn_thumb): Rename print_insn_thumb16; don't handle
+	two-halfword branches here.
+	(print_insn_thumb32): New function.
+	(print_insn): Choose among print_insn_arm, print_insn_thumb16,
+	and print_insn_thumb32.  Be consistent about order of
+	halfwords when printing 32-bit instructions.
+
 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR 843
@@ -124,11 +137,11 @@
 
 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 	    Nick Clifton  <nickc@redhat.com>
-	    
+
 	* vax-dis.c: (entry_addr): New varible:  An array of user supplied
 	function entry mask addresses.
 	(entry_addr_occupied_slots): New variable: The number of occupied
-	elements in entry_addr. 
+	elements in entry_addr.
 	(entry_addr_total_slots): New variable: The total number of
 	elements in entry_addr.
 	(parse_disassembler_options): New function.  Fills in the entry_addr