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| author | Joern Rennecke <joern.rennecke@embecosm.com> | 2004-02-26 16:14:42 +0000 |
|---|---|---|
| committer | Joern Rennecke <joern.rennecke@embecosm.com> | 2004-02-26 16:14:42 +0000 |
| commit | 6a5709a5a18aabe5b4f7f14ddfd758af3eaa9a31 (patch) | |
| tree | 5cba78bb8d599578b49d7852b8b0152b3c172eee /opcodes/ChangeLog | |
| parent | c89dc5d424056423307e7cd62896c5dc16e8d107 (diff) | |
| download | gdb-6a5709a5a18aabe5b4f7f14ddfd758af3eaa9a31.zip gdb-6a5709a5a18aabe5b4f7f14ddfd758af3eaa9a31.tar.gz gdb-6a5709a5a18aabe5b4f7f14ddfd758af3eaa9a31.tar.bz2 | |
2004-02-23 Andrew Stubbs <andrew.stubbs@superh.com>
gas:
* tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
nibble types to assembler.
opcodes:
* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
ensure that double registers have even numbers.
Add REG_N_B01 for nn01 (binary 01) nibble to ensure
that reserved instruction 0xfffd does not decode the same
as 0xfdfd (ftrv).
* sh-opc.h: Add REG_N_D nibble type and use it whereever
REG_N refers to a double register.
Add REG_N_B01 nibble type and use it instead of REG_NM
in ftrv.
Adjust the bit patterns in a few comments.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index fe0a775..d5ce7da 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,16 @@ +2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com> + + * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to + ensure that double registers have even numbers. + Add REG_N_B01 for nn01 (binary 01) nibble to ensure + that reserved instruction 0xfffd does not decode the same + as 0xfdfd (ftrv). + * sh-opc.h: Add REG_N_D nibble type and use it whereever + REG_N refers to a double register. + Add REG_N_B01 nibble type and use it instead of REG_NM + in ftrv. + Adjust the bit patterns in a few comments. + 2004-02-25 Aldy Hernandez <aldyh@redhat.com> * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst. |