Check R_X86_64_32 overflow and allow R_X86_64_64 for x32.

bfd/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* archures.c (bfd_mach_i386_intel_syntax): New.
	(bfd_mach_i386_i8086): Updated.
	(bfd_mach_i386_i386): Likewise.
	(bfd_mach_x86_64): Likewise.
	(bfd_mach_x64_32): Likewise.
	(bfd_mach_i386_i386_intel_syntax): Likewise.
	(bfd_mach_x86_64_intel_syntax): Likewise.
	(bfd_mach_x64_32_intel_syntax): Likewise.
	(bfd_mach_l1om): Likewise.
	(bfd_mach_l1om_intel_syntax): Likewise.
	(bfd_mach_k1om): Likewise.
	(bfd_mach_k1om_intel_syntax): Likewise.

	* bfd-in2.h: Regenerated.

	* cpu-i386.c (bfd_i386_compatible): Check mach instead of
	bits_per_address.
	(bfd_x64_32_arch_intel_syntax): Set bits_per_address to 64.
	(bfd_x64_32_arch): Likewise.

	* elf64-x86-64.c: Include "libiberty.h".
	(x86_64_elf_howto_table): Append x32 R_X86_64_32.
	(elf_x86_64_rtype_to_howto): Support x32 R_X86_64_32.
	(elf_x86_64_reloc_type_lookup): Likewise.
	(elf_x86_64_reloc_name_lookup): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_check_relocs): Allow R_X86_64_64 relocations for x32.

gas/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* config/tc-i386.c (handle_quad): Removed.
	(md_pseudo_table): Remove "quad".
	(tc_gen_reloc): Don't check BFD_RELOC_64 for disallow_64bit_reloc.
	(x86_dwarf2_addr_size): New.

	* config/tc-i386.h (x86_dwarf2_addr_size): New.
	(DWARF2_ADDR_SIZE): Likewise.

gas/testsuite/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* gas/i386/ilp32/ilp32.exp: Don't run inval.

	* gas/i386/ilp32/inval.l: Removed.
	* gas/i386/ilp32/inval.s: Likewise.

	* gas/i386/ilp32/quad.d: Expect R_X86_64_64 instead of
	R_X86_64_32.

	* gas/i386/ilp32/x86-64-pcrel.s: Add tests for movabs.
	* gas/i386/ilp32/x86-64-pcrel.d: Updated.

ld/testsuite/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* ld-x86-64/ilp32-6.d: New.
	* ld-x86-64/ilp32-6.s: Likewise.
	* ld-x86-64/ilp32-7.d: Likewise.
	* ld-x86-64/ilp32-7.s: Likewise.
	* ld-x86-64/ilp32-8.d: Likewise.
	* ld-x86-64/ilp32-8.s: Likewise.
	* ld-x86-64/ilp32-9.d: Likewise.
	* ld-x86-64/ilp32-9.s: Likewise.

	* ld-x86-64/x86-64.exp: Run ilp32-6, ilp32-7, ilp32-8 and ilp32-9.

opcodes/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* i386-dis.c (print_insn): Optimize info->mach check.

10 files changed, 61 insertions, 0 deletions

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index dd0d74d..7a3fd70 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/13048
+	* ld-x86-64/ilp32-6.d: New.
+	* ld-x86-64/ilp32-6.s: Likewise.
+	* ld-x86-64/ilp32-7.d: Likewise.
+	* ld-x86-64/ilp32-7.s: Likewise.
+	* ld-x86-64/ilp32-8.d: Likewise.
+	* ld-x86-64/ilp32-8.s: Likewise.
+	* ld-x86-64/ilp32-9.d: Likewise.
+	* ld-x86-64/ilp32-9.s: Likewise.
+
+	* ld-x86-64/x86-64.exp: Run ilp32-6, ilp32-7, ilp32-8 and ilp32-9.
+
 2011-07-27  Roland McGrath  <mcgrathr@google.com>
 
 	* ld-i386/vxworks1-lib.rd: Swap order of sections expected in output.
diff --git a/ld/testsuite/ld-x86-64/ilp32-6.d b/ld/testsuite/ld-x86-64/ilp32-6.d
new file mode 100644
index 0000000..dbd808e
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-6.d
@@ -0,0 +1,3 @@
+#as: --x32
+#ld: -m elf32_x86_64 -Ttext-segment 0xe0000000
+#error: .*relocation truncated to fit: R_X86_64_32S.*
diff --git a/ld/testsuite/ld-x86-64/ilp32-6.s b/ld/testsuite/ld-x86-64/ilp32-6.s
new file mode 100644
index 0000000..f49edf7
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-6.s
@@ -0,0 +1,3 @@
+	.globl _start
+_start:
+	mov $_start,%rax
diff --git a/ld/testsuite/ld-x86-64/ilp32-7.d b/ld/testsuite/ld-x86-64/ilp32-7.d
new file mode 100644
index 0000000..dbd808e
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-7.d
@@ -0,0 +1,3 @@
+#as: --x32
+#ld: -m elf32_x86_64 -Ttext-segment 0xe0000000
+#error: .*relocation truncated to fit: R_X86_64_32S.*
diff --git a/ld/testsuite/ld-x86-64/ilp32-7.s b/ld/testsuite/ld-x86-64/ilp32-7.s
new file mode 100644
index 0000000..397aba3
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-7.s
@@ -0,0 +1,3 @@
+	.globl _start
+_start:
+	mov _start,%rax
diff --git a/ld/testsuite/ld-x86-64/ilp32-8.d b/ld/testsuite/ld-x86-64/ilp32-8.d
new file mode 100644
index 0000000..2fe2c60
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-8.d
@@ -0,0 +1,13 @@
+#as: --x32
+#ld: -m elf32_x86_64 -Ttext-segment 0xe0000000
+#objdump: -dw
+
+.*: +file format elf32-x86-64
+
+
+Disassembly of section .text:
+
+e0000054 <_start>:
+[ 	]*[a-f0-9]+:	48 b8 54 00 00 e0 00 00 00 00 	movabs \$0xe0000054,%rax
+[ 	]*[a-f0-9]+:	48 a1 54 00 00 e0 00 00 00 00 	movabs 0xe0000054,%rax
+#pass
diff --git a/ld/testsuite/ld-x86-64/ilp32-8.s b/ld/testsuite/ld-x86-64/ilp32-8.s
new file mode 100644
index 0000000..c466a6c
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-8.s
@@ -0,0 +1,5 @@
+	.text
+	.globl _start
+_start:
+	movabs $_start,%rax
+	movabs _start,%rax
diff --git a/ld/testsuite/ld-x86-64/ilp32-9.d b/ld/testsuite/ld-x86-64/ilp32-9.d
new file mode 100644
index 0000000..8fced17
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-9.d
@@ -0,0 +1,9 @@
+#as: --x32
+#ld: -m elf32_x86_64 -Ttext-segment 0xe0000000
+#objdump: -s -j .text
+
+.*: +file format .*
+
+Contents of section .text:
+ e0000054 540000e0 00000000                    T.......        
+#pass
diff --git a/ld/testsuite/ld-x86-64/ilp32-9.s b/ld/testsuite/ld-x86-64/ilp32-9.s
new file mode 100644
index 0000000..432a458
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-9.s
@@ -0,0 +1,4 @@
+	.text
+	.globl _start
+_start:
+	.quad	_start
diff --git a/ld/testsuite/ld-x86-64/x86-64.exp b/ld/testsuite/ld-x86-64/x86-64.exp
index bf75d00..2b8721c 100644
--- a/ld/testsuite/ld-x86-64/x86-64.exp
+++ b/ld/testsuite/ld-x86-64/x86-64.exp
@@ -203,6 +203,10 @@ run_dump_test "ilp32-2"
 run_dump_test "ilp32-3"
 run_dump_test "ilp32-4"
 run_dump_test "ilp32-5"
+run_dump_test "ilp32-6"
+run_dump_test "ilp32-7"
+run_dump_test "ilp32-8"
+run_dump_test "ilp32-9"
 run_dump_test "ia32-1"
 run_dump_test "ia32-2"
 run_dump_test "ia32-3"