Add support for the Freescale s12z processor.

bfd	* Makefile.am: Add s12z files.
	* Makefile.in: Regenerate.
	* archures.c: Add bfd_s12z_arch.
	* bfd-in.h: Add exports of bfd_putb24 and bfd_putl24.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add s12z target.
	* configure.ac: Add s12z target.
	* configure: Regenerate.
	* cpu-s12z.c: New file.
	* elf32-s12z.c: New file.
	* libbfd.c (bfd_putb24): New function.
	(bfd_putl24): New function.
	* libbfd.h: Regenerate.
	* reloc.c: Add s12z relocations.
	(bfd_get_reloc_size): Handle size 5 relocs.
	* targets.c: Add s12z_elf32_vec.

opcodes	* Makefile.am: Add support for s12z architecture.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* s12z-dis.c: New file.
	* s12z.h: New file.

include	* elf/s12z.h: New header.

ld	* Makefile.am: Add support for s12z architecture.
	* configure.tgt: Likewise.
	* Makefile.in: Regenerate.
	* emulparams/m9s12zelf.sh: New file.
	* scripttempl/elfm9s12z.sc: New file.
	* testsuite/ld-discard/static.d: Expect to fail for the s12z
	target.
	* testsuite/ld-elf/endsym.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-s12z: New directory.
	* testsuite/ld-s12z/opr-linking.d: New file.
	* testsuite/ld-s12z/opr-linking.s: New file.
	* testsuite/ld-s12z/relative-linking.d: New file.
	* testsuite/ld-s12z/relative-linking.s: New file.
	* testsuite/ld-s12z/z12s.exp: New file.

gas	* Makefile.am: Add support for s12z target.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new support.
	* config/tc-s12z.c: New file.
	* config/tc-s12z.h: New file.
	* configure.tgt: Add  s12z support.
	* doc/Makefile.am: Likewise.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi: Add s12z documentation.
	* doc/as.textinfo: Likewise.
	* doc/c-s12z.texi: New file.
	* testsuite/gas/s12z: New directory.
	* testsuite/gas/s12z/abs.d: New file.
	* testsuite/gas/s12z/abs.s: New file.
	* testsuite/gas/s12z/adc-imm.d: New file.
	* testsuite/gas/s12z/adc-imm.s: New file.
	* testsuite/gas/s12z/adc-opr.d: New file.
	* testsuite/gas/s12z/adc-opr.s: New file.
	* testsuite/gas/s12z/add-imm.d: New file.
	* testsuite/gas/s12z/add-imm.s: New file.
	* testsuite/gas/s12z/add-opr.d: New file.
	* testsuite/gas/s12z/add-opr.s: New file.
	* testsuite/gas/s12z/and-imm.d: New file.
	* testsuite/gas/s12z/and-imm.s: New file.
	* testsuite/gas/s12z/and-opr.d: New file.
	* testsuite/gas/s12z/and-opr.s: New file.
	* testsuite/gas/s12z/and-or-cc.d: New file.
	* testsuite/gas/s12z/and-or-cc.s: New file.
	* testsuite/gas/s12z/bfext-special.d: New file.
	* testsuite/gas/s12z/bfext-special.s: New file.
	* testsuite/gas/s12z/bfext.d: New file.
	* testsuite/gas/s12z/bfext.s: New file.
	* testsuite/gas/s12z/bit-manip.d: New file.
	* testsuite/gas/s12z/bit-manip.s: New file.
	* testsuite/gas/s12z/bit.d: New file.
	* testsuite/gas/s12z/bit.s: New file.
	* testsuite/gas/s12z/bra-expression-defined.d: New file.
	* testsuite/gas/s12z/bra-expression-defined.s: New file.
	* testsuite/gas/s12z/bra-expression-undef.d: New file.
	* testsuite/gas/s12z/bra-expression-undef.s: New file.
	* testsuite/gas/s12z/bra.d: New file.
	* testsuite/gas/s12z/bra.s: New file.
	* testsuite/gas/s12z/brclr-symbols.d: New file.
	* testsuite/gas/s12z/brclr-symbols.s: New file.
	* testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
	* testsuite/gas/s12z/clb.d: New file.
	* testsuite/gas/s12z/clb.s: New file.
	* testsuite/gas/s12z/clr-opr.d: New file.
	* testsuite/gas/s12z/clr-opr.s: New file.
	* testsuite/gas/s12z/clr.d: New file.
	* testsuite/gas/s12z/clr.s: New file.
	* testsuite/gas/s12z/cmp-imm.d: New file.
	* testsuite/gas/s12z/cmp-imm.s: New file.
	* testsuite/gas/s12z/cmp-opr-inc.d: New file.
	* testsuite/gas/s12z/cmp-opr-inc.s: New file.
	* testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
	* testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
	* testsuite/gas/s12z/cmp-opr-reg.d: New file.
	* testsuite/gas/s12z/cmp-opr-reg.s: New file.
	* testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
	* testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
	* testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
	* testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
	* testsuite/gas/s12z/cmp-opr-xys.d: New file.
	* testsuite/gas/s12z/cmp-opr-xys.s: New file.
	* testsuite/gas/s12z/cmp-s-imm.d: New file.
	* testsuite/gas/s12z/cmp-s-imm.s: New file.
	* testsuite/gas/s12z/cmp-s-opr.d: New file.
	* testsuite/gas/s12z/cmp-s-opr.s: New file.
	* testsuite/gas/s12z/cmp-xy.d: New file.
	* testsuite/gas/s12z/cmp-xy.s: New file.
	* testsuite/gas/s12z/com-opr.d: New file.
	* testsuite/gas/s12z/com-opr.s: New file.
	* testsuite/gas/s12z/complex-shifts.d: New file.
	* testsuite/gas/s12z/complex-shifts.s: New file.
	* testsuite/gas/s12z/db-tb-cc-opr.d: New file.
	* testsuite/gas/s12z/db-tb-cc-opr.s: New file.
	* testsuite/gas/s12z/db-tb-cc-reg.d: New file.
	* testsuite/gas/s12z/db-tb-cc-reg.s: New file.
	* testsuite/gas/s12z/dbCC.d: New file.
	* testsuite/gas/s12z/dbCC.s: New file.
	* testsuite/gas/s12z/dec-opr.d: New file.
	* testsuite/gas/s12z/dec-opr.s: New file.
	* testsuite/gas/s12z/dec.d: New file.
	* testsuite/gas/s12z/dec.s: New file.
	* testsuite/gas/s12z/div.d: New file.
	* testsuite/gas/s12z/div.s: New file.
	* testsuite/gas/s12z/eor.d: New file.
	* testsuite/gas/s12z/eor.s: New file.
	* testsuite/gas/s12z/exg.d: New file.
	* testsuite/gas/s12z/exg.s: New file.
	* testsuite/gas/s12z/ext24-ld-xy.d: New file.
	* testsuite/gas/s12z/ext24-ld-xy.s: New file.
	* testsuite/gas/s12z/inc-opr.d: New file.
	* testsuite/gas/s12z/inc-opr.s: New file.
	* testsuite/gas/s12z/inc.d: New file.
	* testsuite/gas/s12z/inc.s: New file.
	* testsuite/gas/s12z/inh.d: New file.
	* testsuite/gas/s12z/inh.s: New file.
	* testsuite/gas/s12z/jmp.d: New file.
	* testsuite/gas/s12z/jmp.s: New file.
	* testsuite/gas/s12z/jsr.d: New file.
	* testsuite/gas/s12z/jsr.s: New file.
	* testsuite/gas/s12z/ld-imm-page2.d: New file.
	* testsuite/gas/s12z/ld-imm-page2.s: New file.
	* testsuite/gas/s12z/ld-imm.d: New file.
	* testsuite/gas/s12z/ld-imm.s: New file.
	* testsuite/gas/s12z/ld-immu18.d: New file.
	* testsuite/gas/s12z/ld-immu18.s: New file.
	* testsuite/gas/s12z/ld-large-direct.d: New file.
	* testsuite/gas/s12z/ld-large-direct.s: New file.
	* testsuite/gas/s12z/ld-opr.d: New file.
	* testsuite/gas/s12z/ld-opr.s: New file.
	* testsuite/gas/s12z/ld-s-opr.d: New file.
	* testsuite/gas/s12z/ld-s-opr.s: New file.
	* testsuite/gas/s12z/ld-small-direct.d: New file.
	* testsuite/gas/s12z/ld-small-direct.s: New file.
	* testsuite/gas/s12z/lea-immu18.d: New file.
	* testsuite/gas/s12z/lea-immu18.s: New file.
	* testsuite/gas/s12z/lea.d: New file.
	* testsuite/gas/s12z/lea.s: New file.
	* testsuite/gas/s12z/mac.d: New file.
	* testsuite/gas/s12z/mac.s: New file.
	* testsuite/gas/s12z/min-max.d: New file.
	* testsuite/gas/s12z/min-max.s: New file.
	* testsuite/gas/s12z/mod.d: New file.
	* testsuite/gas/s12z/mod.s: New file.
	* testsuite/gas/s12z/mov.d: New file.
	* testsuite/gas/s12z/mov.s: New file.
	* testsuite/gas/s12z/mul-imm.d: New file.
	* testsuite/gas/s12z/mul-imm.s: New file.
	* testsuite/gas/s12z/mul-opr-opr.d: New file.
	* testsuite/gas/s12z/mul-opr-opr.s: New file.
	* testsuite/gas/s12z/mul-opr.d: New file.
	* testsuite/gas/s12z/mul-opr.s: New file.
	* testsuite/gas/s12z/mul-reg.d: New file.
	* testsuite/gas/s12z/mul-reg.s: New file.
	* testsuite/gas/s12z/mul.d: New file.
	* testsuite/gas/s12z/mul.s: New file.
	* testsuite/gas/s12z/neg-opr.d: New file.
	* testsuite/gas/s12z/neg-opr.s: New file.
	* testsuite/gas/s12z/not-so-simple-shifts.d: New file.
	* testsuite/gas/s12z/not-so-simple-shifts.s: New file.
	* testsuite/gas/s12z/opr-18u.d: New file.
	* testsuite/gas/s12z/opr-18u.s: New file.
	* testsuite/gas/s12z/opr-expr.d: New file.
	* testsuite/gas/s12z/opr-expr.s: New file.
	* testsuite/gas/s12z/opr-ext-18.d: New file.
	* testsuite/gas/s12z/opr-ext-18.s: New file.
	* testsuite/gas/s12z/opr-idx-24-reg.d: New file.
	* testsuite/gas/s12z/opr-idx-24-reg.s: New file.
	* testsuite/gas/s12z/opr-idx3-reg.d: New file.
	* testsuite/gas/s12z/opr-idx3-reg.s: New file.
	* testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
	* testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
	* testsuite/gas/s12z/opr-indirect-expr.d: New file.
	* testsuite/gas/s12z/opr-indirect-expr.s: New file.
	* testsuite/gas/s12z/opr-symbol.d: New file.
	* testsuite/gas/s12z/opr-symbol.s: New file.
	* testsuite/gas/s12z/or-imm.d: New file.
	* testsuite/gas/s12z/or-imm.s: New file.
	* testsuite/gas/s12z/or-opr.d: New file.
	* testsuite/gas/s12z/or-opr.s: New file.
	* testsuite/gas/s12z/p2-mul.d: New file.
	* testsuite/gas/s12z/p2-mul.s: New file.
	* testsuite/gas/s12z/page2-inh.d: New file.
	* testsuite/gas/s12z/page2-inh.s: New file.
	* testsuite/gas/s12z/psh-pul.d: New file.
	* testsuite/gas/s12z/psh-pul.s: New file.
	* testsuite/gas/s12z/qmul.d: New file.
	* testsuite/gas/s12z/qmul.s: New file.
	* testsuite/gas/s12z/rotate.d: New file.
	* testsuite/gas/s12z/rotate.s: New file.
	* testsuite/gas/s12z/s12z.exp: New file.
	* testsuite/gas/s12z/sat.d: New file.
	* testsuite/gas/s12z/sat.s: New file.
	* testsuite/gas/s12z/sbc-imm.d: New file.
	* testsuite/gas/s12z/sbc-imm.s: New file.
	* testsuite/gas/s12z/sbc-opr.d: New file.
	* testsuite/gas/s12z/sbc-opr.s: New file.
	* testsuite/gas/s12z/shift.d: New file.
	* testsuite/gas/s12z/shift.s: New file.
	* testsuite/gas/s12z/simple-shift.d: New file.
	* testsuite/gas/s12z/simple-shift.s: New file.
	* testsuite/gas/s12z/single-ops.d: New file.
	* testsuite/gas/s12z/single-ops.s: New file.
	* testsuite/gas/s12z/specd6.d: New file.
	* testsuite/gas/s12z/specd6.s: New file.
	* testsuite/gas/s12z/st-large-direct.d: New file.
	* testsuite/gas/s12z/st-large-direct.s: New file.
	* testsuite/gas/s12z/st-opr.d: New file.
	* testsuite/gas/s12z/st-opr.s: New file.
	* testsuite/gas/s12z/st-s-opr.d: New file.
	* testsuite/gas/s12z/st-s-opr.s: New file.
	* testsuite/gas/s12z/st-small-direct.d: New file.
	* testsuite/gas/s12z/st-small-direct.s: New file.
	* testsuite/gas/s12z/st-xy.d: New file.
	* testsuite/gas/s12z/st-xy.s: New file.
	* testsuite/gas/s12z/sub-imm.d: New file.
	* testsuite/gas/s12z/sub-imm.s: New file.
	* testsuite/gas/s12z/sub-opr.d: New file.
	* testsuite/gas/s12z/sub-opr.s: New file.
	* testsuite/gas/s12z/tfr.d: New file.
	* testsuite/gas/s12z/tfr.s: New file.
	* testsuite/gas/s12z/trap.d: New file.
	* testsuite/gas/s12z/trap.s: New file.

binutils* readelf.c: Add support for s12z architecture.
	* testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z
	targets.

16 files changed, 579 insertions, 4 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 5986f3c..fcd50a5 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,23 @@
+2018-05-18  John Darrington  <john@darrington.wattle.id.au>
+
+	* Makefile.am: Add support for s12z architecture.
+	* configure.tgt: Likewise.
+	* Makefile.in: Regenerate.
+	* emulparams/m9s12zelf.sh: New file.
+	* scripttempl/elfm9s12z.sc: New file.
+	* testsuite/ld-discard/static.d: Expect to fail for the s12z
+	target.
+	* testsuite/ld-elf/endsym.d: Likewise.
+	* testsuite/ld-elf/merge.d: Likewise.
+	* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
+	* testsuite/ld-elf/sec64k.exp: Likewise.
+	* testsuite/ld-s12z: New directory.
+	* testsuite/ld-s12z/opr-linking.d: New file.
+	* testsuite/ld-s12z/opr-linking.s: New file.
+	* testsuite/ld-s12z/relative-linking.d: New file.
+	* testsuite/ld-s12z/relative-linking.s: New file.
+	* testsuite/ld-s12z/z12s.exp: New file.
+
 2018-05-18  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR ld/23189
diff --git a/ld/Makefile.am b/ld/Makefile.am
index 8e4c877..151e1e2 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -324,6 +324,7 @@ ALL_EMULATION_SOURCES = \
 	em68hc12elfb.c \
 	em68kelf.c \
 	em68kelfnbsd.c \
+	em9s12zelf.c \
 	emcorepe.c \
 	emn10200.c \
 	emn10300.c \
@@ -1433,6 +1434,10 @@ em68kelfnbsd.c: $(srcdir)/emulparams/m68kelfnbsd.sh \
   $(ELF_DEPS) $(srcdir)/emultempl/m68kelf.em \
   $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
 
+em9s12zelf.c: $(srcdir)/emulparams/m9s12zelf.sh \
+  $(ELF_DEPS) $(srcdir)/emultempl/generic.em \
+  $(srcdir)/scripttempl/elfm9s12z.sc ${GEN_DEPENDS}
+
 emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
   $(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
 
diff --git a/ld/Makefile.in b/ld/Makefile.in
index afd2a4b..5cfd4ab 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -693,6 +693,7 @@ ALL_EMULATION_SOURCES = \
 	em68hc12elfb.c \
 	em68kelf.c \
 	em68kelfnbsd.c \
+	em9s12zelf.c \
 	emcorepe.c \
 	emn10200.c \
 	emn10300.c \
@@ -1305,6 +1306,7 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68hc12elfb.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68kelf.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68kelfnbsd.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em9s12zelf.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emcorepe.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emmo.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emn10200.Po@am__quote@
@@ -2938,6 +2940,10 @@ em68kelfnbsd.c: $(srcdir)/emulparams/m68kelfnbsd.sh \
   $(ELF_DEPS) $(srcdir)/emultempl/m68kelf.em \
   $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
 
+em9s12zelf.c: $(srcdir)/emulparams/m9s12zelf.sh \
+  $(ELF_DEPS) $(srcdir)/emultempl/generic.em \
+  $(srcdir)/scripttempl/elfm9s12z.sc ${GEN_DEPENDS}
+
 emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
   $(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
 
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 4c4ab85..3386c3d 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -402,6 +402,8 @@ m68hc12-*-*|m6812-*-*)	targ_emul=m68hc12elf
 			targ_extra_emuls="m68hc12elfb m68hc11elf m68hc11elfb" ;;
 m68*-*-netbsdelf*)	targ_emul=m68kelfnbsd ;;
 m68*-*-*)		targ_emul=m68kelf ;;
+s12z-*-*)		targ_emul=m9s12zelf
+			;;
 mcore-*-pe)		targ_emul=mcorepe ;
 			targ_extra_ofiles="deffilep.o pe-dll.o" ;;
 mcore-*-elf)		targ_emul=elf32mcore
diff --git a/ld/emulparams/m9s12zelf.sh b/ld/emulparams/m9s12zelf.sh
new file mode 100644
index 0000000..7a819e8
--- /dev/null
+++ b/ld/emulparams/m9s12zelf.sh
@@ -0,0 +1,18 @@
+MACHINE=
+SCRIPT_NAME=elfm9s12z
+OUTPUT_FORMAT="elf32-s12z"
+ROM_TOP=0xFFFFFF
+ROM_SIZE=0x20000
+RAM_START_ADDR=0x001000
+RAM_SIZE=8192
+EEPROM_START_ADDR=0x100000
+EEPROM_SIZE=2048
+TEXT_MEMORY=text
+DATA_MEMORY=data
+EEPROM_MEMORY=eeprom
+ARCH=s12z
+EMBEDDED=yes
+GENERIC_BOARD=no
+TEMPLATE_NAME=elf32
+NOP=0x00
+
diff --git a/ld/scripttempl/elfm9s12z.sc b/ld/scripttempl/elfm9s12z.sc
new file mode 100644
index 0000000..c39d270
--- /dev/null
+++ b/ld/scripttempl/elfm9s12z.sc
@@ -0,0 +1,444 @@
+# Copyright (C) 2014-2018 Free Software Foundation, Inc.
+#
+# Copying and distribution of this file, with or without modification,
+# are permitted in any medium without royalty provided the copyright
+# notice and this notice are preserved.
+#
+# Unusual variables checked by this code:
+#	NOP - four byte opcode for no-op (defaults to 0)
+#	DATA_ADDR - if end-of-text-plus-one-page isn't right for data start
+#	OTHER_READWRITE_SECTIONS - other than .data .bss .ctors .sdata ...
+#		(e.g., .PARISC.global)
+#	OTHER_SECTIONS - at the end
+#	EXECUTABLE_SYMBOLS - symbols that must be defined for an
+#		executable (e.g., _DYNAMIC_LINK)
+#	TEXT_START_SYMBOLS - symbols that appear at the start of the
+#		.text section.
+#	DATA_START_SYMBOLS - symbols that appear at the start of the
+#		.data section.
+#	OTHER_BSS_SYMBOLS - symbols that appear at the start of the
+#		.bss section besides __bss_start.
+#	EMBEDDED - whether this is for an embedded system.
+#
+# When adding sections, do note that the names of some sections are used
+# when specifying the start address of the next.
+#
+test -z "$ENTRY" && ENTRY=_start
+test -z "${BIG_OUTPUT_FORMAT}" && BIG_OUTPUT_FORMAT=${OUTPUT_FORMAT}
+test -z "${LITTLE_OUTPUT_FORMAT}" && LITTLE_OUTPUT_FORMAT=${OUTPUT_FORMAT}
+if [ -z "$MACHINE" ]; then OUTPUT_ARCH=${ARCH}; else OUTPUT_ARCH=${ARCH}:${MACHINE}; fi
+test "$LD_FLAG" = "N" && DATA_ADDR=.
+
+CTOR=".ctors ${CONSTRUCTING-0} :
+  {
+    ${CONSTRUCTING+ PROVIDE (__CTOR_LIST__ = .); }
+    ${CONSTRUCTING+${CTOR_START}}
+    KEEP (*(.ctors))
+
+    ${CONSTRUCTING+${CTOR_END}}
+    ${CONSTRUCTING+ PROVIDE(__CTOR_END__ = .); }
+  } ${RELOCATING+ > ${TEXT_MEMORY}}"
+
+DTOR="  .dtors	${CONSTRUCTING-0} :
+  {
+    ${CONSTRUCTING+ PROVIDE(__DTOR_LIST__ = .); }
+    KEEP (*(.dtors))
+    ${CONSTRUCTING+ PROVIDE(__DTOR_END__ = .); }
+  } ${RELOCATING+ > ${TEXT_MEMORY}}"
+
+
+VECTORS="
+  /* If the 'vectors_addr' symbol is defined, it indicates the start address
+     of interrupt vectors.
+
+     In general, the vectors address is 0xfffe00.  This can be overriden
+     with the '-defsym vectors_addr=0xbfc000' ld option.  If you do this,
+     then your startup code should also set the IVBR register accordingly.
+  */
+
+  PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xfffe00);
+  .vectors DEFINED (vectors_addr) ? vectors_addr : 0xfffe00 :
+  {
+    KEEP (*(.vectors))
+  }"
+
+#
+# We provide two emulations: a fixed on that defines some memory banks
+# and a configurable one that includes a user provided memory definition.
+#
+case $GENERIC_BOARD in
+  yes|1|YES)
+	MEMORY_DEF="
+/* Get memory banks definition from some user configuration file.
+   This file must be located in some linker directory (search path
+   with -L<dir>). See fixed memory banks emulation script.  */
+INCLUDE memory.x;
+"
+	;;
+  *)
+MEMORY_DEF="
+/* Fixed definition of the available memory banks.
+   See generic emulation script for a user defined configuration.  */
+MEMORY
+{
+  text  (rx)  : ORIGIN = $[$ROM_TOP - $ROM_SIZE + 1], LENGTH = ${ROM_SIZE} - 4
+  data        : ORIGIN = ${RAM_START_ADDR}, LENGTH = ${RAM_SIZE}
+  eeprom      : ORIGIN = ${EEPROM_START_ADDR}, LENGTH = ${EEPROM_SIZE}
+  rvec        : ORIGIN = 0xFFFFFC,  LENGTH = 4
+}
+
+/* Setup the stack on the top of the data memory bank.  */
+PROVIDE (_stack = ${RAM_START_ADDR} + ${RAM_SIZE} - 1);
+"
+	;;
+esac
+
+STARTUP_CODE="
+    /* Startup code.  */
+    KEEP (*(.install0))	/* Section should setup the stack pointer.  */
+    KEEP (*(.install1))	/* Place holder for applications.  */
+    KEEP (*(.install2))	/* Optional installation of data sections in RAM.  */
+    KEEP (*(.install3))	/* Place holder for applications.  */
+    KEEP (*(.install4))	/* Section that calls the main.  */
+"
+
+FINISH_CODE="
+    /* Finish code.  */
+    KEEP (*(.fini0))	/* Beginning of finish code (_exit symbol).  */
+    KEEP (*(.fini1))	/* Place holder for applications.  */
+    KEEP (*(.fini2))	/* C++ destructors.  */
+    KEEP (*(.fini3))	/* Place holder for applications.  */
+    KEEP (*(.fini4))	/* Runtime exit.  */
+"
+
+PRE_COMPUTE_DATA_SIZE="
+/* SCz: this does not work yet... This is supposed to force the loading
+   of _map_data.o (from libgcc.a) when the .data section is not empty.
+   By doing so, this should bring the code that copies the .data section
+   from ROM to RAM at init time.
+
+  ___pre_comp_data_size = SIZEOF(.data);
+  __install_data_sections = ___pre_comp_data_size > 0 ?
+		__map_data_sections : 0;
+*/
+"
+
+INSTALL_RELOC="
+  .install0 0 : { *(.install0) }
+  .install1 0 : { *(.install1) }
+  .install2 0 : { *(.install2) }
+  .install3 0 : { *(.install3) }
+  .install4 0 : { *(.install4) }
+"
+
+FINISH_RELOC="
+  .fini0 0 : { *(.fini0) }
+  .fini1 0 : { *(.fini1) }
+  .fini2 0 : { *(.fini2) }
+  .fini3 0 : { *(.fini3) }
+  .fini4 0 : { *(.fini4) }
+"
+
+BSS_DATA_RELOC="
+  .data1 0 : { *(.data1) }
+
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  .sdata   0 : { *(.sdata) }
+  .sbss    0 : { *(.sbss) }
+  .scommon 0 : { *(.scommon) }
+"
+
+SOFT_REGS_RELOC="
+  .softregs 0 : { *(.softregs) }
+"
+
+cat <<EOF
+/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
+
+   Copying and distribution of this script, with or without modification,
+   are permitted in any medium without royalty provided the copyright
+   notice and this notice are preserved.  */
+
+${RELOCATING+/* Linker script for HCS12Z executable (PROM).  */}
+${RELOCATING-/* Linker script for HCS12Z object file (ld -r).  */}
+
+OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
+	      "${LITTLE_OUTPUT_FORMAT}")
+OUTPUT_ARCH(${OUTPUT_ARCH})
+${RELOCATING+ENTRY(${ENTRY})}
+
+${RELOCATING+${LIB_SEARCH_DIRS}}
+${RELOCATING+${EXECUTABLE_SYMBOLS}}
+${RELOCATING+${MEMORY_DEF}}
+
+PROVIDE (_start = $[$ROM_TOP - $ROM_SIZE + 1]);
+SECTIONS
+{
+  .hash        ${RELOCATING-0} : { *(.hash)		}
+  .dynsym      ${RELOCATING-0} : { *(.dynsym)		}
+  .dynstr      ${RELOCATING-0} : { *(.dynstr)		}
+  .gnu.version		${RELOCATING-0} : { *(.gnu.version) }
+  .gnu.version_d	${RELOCATING-0} : { *(.gnu.version_d) }
+  .gnu.version_r	${RELOCATING-0} : { *(.gnu.version_r) }
+
+  .rel.text    ${RELOCATING-0} :
+    {
+      *(.rel.text)
+      ${RELOCATING+*(.rel.text.*)}
+      ${RELOCATING+*(.rel.gnu.linkonce.t.*)}
+    }
+  .rela.text   ${RELOCATING-0} :
+    {
+      *(.rela.text)
+      ${RELOCATING+*(.rela.text.*)}
+      ${RELOCATING+*(.rela.gnu.linkonce.t.*)}
+    }
+  .rel.data    ${RELOCATING-0} :
+    {
+      *(.rel.data)
+      ${RELOCATING+*(.rel.data.*)}
+      ${RELOCATING+*(.rel.gnu.linkonce.d.*)}
+    }
+  .rela.data   ${RELOCATING-0} :
+    {
+      *(.rela.data)
+      ${RELOCATING+*(.rela.data.*)}
+      ${RELOCATING+*(.rela.gnu.linkonce.d.*)}
+    }
+  .rel.rodata  ${RELOCATING-0} :
+    {
+      *(.rel.rodata)
+      ${RELOCATING+*(.rel.rodata.*)}
+      ${RELOCATING+*(.rel.gnu.linkonce.r.*)}
+    }
+  .rela.rodata ${RELOCATING-0} :
+    {
+      *(.rela.rodata)
+      ${RELOCATING+*(.rela.rodata.*)}
+      ${RELOCATING+*(.rela.gnu.linkonce.r.*)}
+    }
+  .rel.sdata   ${RELOCATING-0} :
+    {
+      *(.rel.sdata)
+      ${RELOCATING+*(.rel.sdata.*)}
+      ${RELOCATING+*(.rel.gnu.linkonce.s.*)}
+    }
+  .rela.sdata   ${RELOCATING-0} :
+    {
+      *(.rela.sdata)
+      ${RELOCATING+*(.rela.sdata.*)}
+      ${RELOCATING+*(.rela.gnu.linkonce.s.*)}
+    }
+  .rel.sbss    ${RELOCATING-0} :
+    {
+      *(.rel.sbss)
+      ${RELOCATING+*(.rel.sbss.*)}
+      ${RELOCATING+*(.rel.gnu.linkonce.sb.*)}
+    }
+  .rela.sbss   ${RELOCATING-0} :
+    {
+      *(.rela.sbss)
+      ${RELOCATING+*(.rela.sbss.*)}
+      ${RELOCATING+*(.rel.gnu.linkonce.sb.*)}
+    }
+  .rel.bss     ${RELOCATING-0} :
+    {
+      *(.rel.bss)
+      ${RELOCATING+*(.rel.bss.*)}
+      ${RELOCATING+*(.rel.gnu.linkonce.b.*)}
+    }
+  .rela.bss    ${RELOCATING-0} :
+    {
+      *(.rela.bss)
+      ${RELOCATING+*(.rela.bss.*)}
+      ${RELOCATING+*(.rela.gnu.linkonce.b.*)}
+    }
+  .rel.stext		${RELOCATING-0} : { *(.rel.stest) }
+  .rela.stext		${RELOCATING-0} : { *(.rela.stest) }
+  .rel.etext		${RELOCATING-0} : { *(.rel.etest) }
+  .rela.etext		${RELOCATING-0} : { *(.rela.etest) }
+  .rel.sdata		${RELOCATING-0} : { *(.rel.sdata) }
+  .rela.sdata		${RELOCATING-0} : { *(.rela.sdata) }
+  .rel.edata		${RELOCATING-0} : { *(.rel.edata) }
+  .rela.edata		${RELOCATING-0} : { *(.rela.edata) }
+  .rel.eit_v		${RELOCATING-0} : { *(.rel.eit_v) }
+  .rela.eit_v		${RELOCATING-0} : { *(.rela.eit_v) }
+  .rel.ebss		${RELOCATING-0} : { *(.rel.ebss) }
+  .rela.ebss		${RELOCATING-0} : { *(.rela.ebss) }
+  .rel.srodata		${RELOCATING-0} : { *(.rel.srodata) }
+  .rela.srodata		${RELOCATING-0} : { *(.rela.srodata) }
+  .rel.erodata		${RELOCATING-0} : { *(.rel.erodata) }
+  .rela.erodata		${RELOCATING-0} : { *(.rela.erodata) }
+  .rel.got		${RELOCATING-0} : { *(.rel.got) }
+  .rela.got		${RELOCATING-0} : { *(.rela.got) }
+  .rel.ctors		${RELOCATING-0} : { *(.rel.ctors) }
+  .rela.ctors		${RELOCATING-0} : { *(.rela.ctors) }
+  .rel.dtors		${RELOCATING-0} : { *(.rel.dtors) }
+  .rela.dtors		${RELOCATING-0} : { *(.rela.dtors) }
+  .rel.init		${RELOCATING-0} : { *(.rel.init) }
+  .rela.init		${RELOCATING-0} : { *(.rela.init) }
+  .rel.fini		${RELOCATING-0} : { *(.rel.fini) }
+  .rela.fini		${RELOCATING-0} : { *(.rela.fini) }
+  .rel.plt		${RELOCATING-0} : { *(.rel.plt) }
+  .rela.plt		${RELOCATING-0} : { *(.rela.plt) }
+
+  /* Start of text section.  */
+  .stext ${RELOCATING-0} :
+  {
+    *(.stext)
+  } ${RELOCATING+ > ${TEXT_MEMORY}}
+
+  .init	${RELOCATING-0} :
+  {
+    *(.init)
+  } ${RELOCATING+=${NOP-0}}
+
+  ${RELOCATING-${INSTALL_RELOC}}
+  ${RELOCATING-${FINISH_RELOC}}
+
+  .text ${RELOCATING-0}:
+  {
+    /* Put startup code at beginning so that _start keeps same address.  */
+    ${RELOCATING+${STARTUP_CODE}}
+
+    ${RELOCATING+*(.init)}
+    *(.text)
+    ${RELOCATING+*(.text.*)}
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+    ${RELOCATING+*(.gnu.linkonce.t.*)}
+    ${RELOCATING+*(.tramp)}
+    ${RELOCATING+*(.tramp.*)}
+
+    ${RELOCATING+${FINISH_CODE}}
+
+    ${RELOCATING+_etext = .;}
+    ${RELOCATING+PROVIDE (etext = .);}
+    ${RELOCATING+. = ALIGN(2);}
+  } ${RELOCATING+ > ${TEXT_MEMORY} =${NOP}}
+  .rvec ${RELOCATING-0} :
+  {
+    ${RELOCATING+LONG(_start);}
+  } ${RELOCATING+ > rvec}
+  .eh_frame ${RELOCATING-0} :
+  {
+    KEEP (*(.eh_frame))
+  } ${RELOCATING+ > ${TEXT_MEMORY}}
+
+  .gcc_except_table ${RELOCATING-0} :
+  {
+    *(.gcc_except_table)
+  } ${RELOCATING+ > ${TEXT_MEMORY}}
+
+  .rodata  ${RELOCATING-0} :
+  {
+    *(.rodata)
+    ${RELOCATING+*(.rodata.*)}
+    ${RELOCATING+*(.gnu.linkonce.r*)}
+    ${RELOCATING+. = ALIGN(2);}
+  } ${RELOCATING+ > ${TEXT_MEMORY} =0xffffffff}
+
+  .rodata1 ${RELOCATING-0} :
+  {
+    *(.rodata1)
+    ${RELOCATING+. = ALIGN(2);}
+  } ${RELOCATING+ > ${TEXT_MEMORY} =0xffffffff}
+
+  /* Constructor and destructor tables are in ROM.  */
+  ${RELOCATING+${CTOR}}
+  ${RELOCATING+${DTOR}}
+
+  .jcr ${RELOCATING-0} :
+  {
+    KEEP (*(.jcr))
+  } ${RELOCATING+ > ${TEXT_MEMORY}}
+
+  /* Start of the data section image in ROM.  */
+  ${RELOCATING+__data_image = .;}
+  ${RELOCATING+PROVIDE (__data_image = .);}
+
+  /* All read-only sections that normally go in PROM must be above.
+     We construct the DATA image section in PROM at end of all these
+     read-only sections.  The data image must be copied at init time.
+     Refer to GNU ld, Section 3.6.8.2 Output Section LMA.  */
+  .data  ${RELOCATING-0} : ${RELOCATING+AT (__data_image)}
+  {
+    ${RELOCATING+__data_section_start = .;}
+    ${RELOCATING+PROVIDE (__data_section_start = .);}
+
+    ${RELOCATING+${DATA_START_SYMBOLS}}
+    ${RELOCATING+*(.sdata)}
+    *(.data)
+    ${RELOCATING+*(.data.*)}
+    ${RELOCATING+*(.data1)}
+    ${RELOCATING+*(.gnu.linkonce.d.*)}
+    ${CONSTRUCTING+CONSTRUCTORS}
+
+    ${RELOCATING+_edata  =  .;}
+    ${RELOCATING+PROVIDE (edata = .);}
+    ${RELOCATING+. = ALIGN(2);}
+  } ${RELOCATING+ > ${DATA_MEMORY} =0xffffffff}
+
+  ${RELOCATING+__data_section_size = SIZEOF(.data);}
+  ${RELOCATING+PROVIDE (__data_section_size = SIZEOF(.data));}
+  ${RELOCATING+__data_image_end = __data_image + __data_section_size;}
+
+  ${RELOCATING+${PRE_COMPUTE_DATA_SIZE}}
+
+  /* .install ${RELOCATING-0}:
+  {
+    . = _data_image_end;
+  } ${RELOCATING+ > ${TEXT_MEMORY}} */
+
+  /* Relocation for some bss and data sections.  */
+  ${RELOCATING-${BSS_DATA_RELOC}}
+  ${RELOCATING-${SOFT_REGS_RELOC}}
+
+  .bss ${RELOCATING-0} :
+  {
+    ${RELOCATING+__bss_start = .;}
+    ${RELOCATING+*(.softregs)}
+    ${RELOCATING+*(.sbss)}
+    ${RELOCATING+*(.scommon)}
+
+    *(.dynbss)
+    *(.bss)
+    ${RELOCATING+*(.bss.*)}
+    ${RELOCATING+*(.gnu.linkonce.b.*)}
+    *(COMMON)
+    ${RELOCATING+PROVIDE (_end = .);}
+  } ${RELOCATING+ > ${DATA_MEMORY}}
+  ${RELOCATING+__bss_size = SIZEOF(.bss);}
+  ${RELOCATING+PROVIDE (__bss_size = SIZEOF(.bss));}
+
+  .eeprom ${RELOCATING-0} :
+  {
+    *(.eeprom)
+    *(.eeprom.*)
+  } ${RELOCATING+ > ${EEPROM_MEMORY}}
+
+  ${RELOCATING+${VECTORS}}
+
+  /* Stabs debugging sections.  */
+  .stab		 0 : { *(.stab) }
+  .stabstr	 0 : { *(.stabstr) }
+  .stab.excl	 0 : { *(.stab.excl) }
+  .stab.exclstr	 0 : { *(.stab.exclstr) }
+  .stab.index	 0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+
+  .comment	 0 : { *(.comment) }
+
+  /* Treatment of DWARF debug section must be at end of the linker
+     script to avoid problems when there are undefined symbols. It's necessary
+     to avoid that the DWARF section is relocated before such undefined
+     symbols are found.  */
+EOF
+
+. $srcdir/scripttempl/DWARF.sc
+
+cat <<EOF
+}
+EOF
diff --git a/ld/testsuite/ld-discard/static.d b/ld/testsuite/ld-discard/static.d
index 7a299cc..ebdbda8 100644
--- a/ld/testsuite/ld-discard/static.d
+++ b/ld/testsuite/ld-discard/static.d
@@ -3,5 +3,5 @@
 #error: `(\.data\.exit|data)' referenced in section `\.text' of tmpdir/static.o: defined in discarded section `\.data\.exit' of tmpdir/static.o
 #objdump: -p
 #xfail: d30v-*-* dlx-*-* pj*-*-*
-#xfail: m68hc12-*-* m6812-*-*
+#xfail: m68hc12-*-* m6812-*-* 
 #pass
diff --git a/ld/testsuite/ld-elf/endsym.d b/ld/testsuite/ld-elf/endsym.d
index 86fda21..39667e3 100644
--- a/ld/testsuite/ld-elf/endsym.d
+++ b/ld/testsuite/ld-elf/endsym.d
@@ -2,7 +2,7 @@
 #source: endsym.s
 #ld: --sort-common
 #nm: -n
-#xfail: m68hc1*-* xgate-* cr16-*-* crx-*-* dlx-*-* nds32*-*-* visium-*-*
+#xfail: m68hc1*-* xgate-* cr16-*-* crx-*-* dlx-*-* nds32*-*-* visium-*-* s12z-*-*
 #xfail: pru-*-*
 
 #...
diff --git a/ld/testsuite/ld-elf/merge.d b/ld/testsuite/ld-elf/merge.d
index 2ac88ea..ebabae8 100644
--- a/ld/testsuite/ld-elf/merge.d
+++ b/ld/testsuite/ld-elf/merge.d
@@ -4,7 +4,7 @@
 #xfail: "bfin-*-*" "cr16-*-*" "cris*-*-*" "crx-*-*" "d10v-*-*" "d30v-*-*"
 #xfail: "dlx-*-*" "fr30-*-*" "frv-*-*" "hppa*64*-*-*" "h8300-*-*" "score-*-*"
 #xfail: "ip2k-*-*" "iq2000-*-*" "lm32-*-*"
-#xfail: "mcore-*-*" "mn102*-*-*" "ms1-*-*" "mep-*-*" "m68hc11-*-*" "nios2-*-*"
+#xfail: "mcore-*-*" "mn102*-*-*" "ms1-*-*" "mep-*-*" "m68hc11-*-*" "nios2-*-*" s12z-*-*
 #xfail: "or32-*-*" "pj-*-*" "tic6x-*-*" "vax-*-*" "xstormy16-*-*"
 #xfail: "xtensa*-*-*" "metag-*-*" "ft32-*-*" "pru-*-*"
 
diff --git a/ld/testsuite/ld-elf/pr14926.d b/ld/testsuite/ld-elf/pr14926.d
index 8fc8e64..4e0a8da 100644
--- a/ld/testsuite/ld-elf/pr14926.d
+++ b/ld/testsuite/ld-elf/pr14926.d
@@ -1,6 +1,6 @@
 #ld: -Ttext=0x60
 #readelf: -S --wide
-#notarget: d10v-* m68hc1*-* msp*-* visium-* xgate-* xstormy*-* pru-*-*
+#notarget: d10v-* m68hc1*-* msp*-* visium-* xgate-* xstormy*-* pru-*-* s12z-*-*
 # the above targets use memory regions that don't allow 0x60 for .text
 
 #...
diff --git a/ld/testsuite/ld-elf/sec64k.exp b/ld/testsuite/ld-elf/sec64k.exp
index 2495cb8..b58139e 100644
--- a/ld/testsuite/ld-elf/sec64k.exp
+++ b/ld/testsuite/ld-elf/sec64k.exp
@@ -40,6 +40,7 @@ if {[istarget "ft32-*-*"]
     || [istarget "h8300-*-*"]
     || [istarget "ip2k-*-*"]
     || [istarget "m68hc1*-*"]
+    || [istarget "s12z-*"]
     || [istarget "xgate-*"] } {
     return
 }
diff --git a/ld/testsuite/ld-s12z/opr-linking.d b/ld/testsuite/ld-s12z/opr-linking.d
new file mode 100644
index 0000000..05d154b
--- /dev/null
+++ b/ld/testsuite/ld-s12z/opr-linking.d
@@ -0,0 +1,20 @@
+#source: opr-linking.s
+#ld: --no-relax --defsym here=0xfe0000 --defsym=foo=0xfe0050  --defsym=bar=0xfe0010 --defsym=wiz=0xfe0040
+#objdump: -d -r
+
+tmpdir/dump:     file format elf32-s12z
+
+
+Disassembly of section .text:
+
+
+00fe0000 .*:
+  fe0000:	01          	nop
+  fe0001:	01          	nop
+  fe0002:	01          	nop
+  fe0003:	01          	nop
+  fe0004:	1b 37 f6 fa 	divs\.lw d7, bar, wiz
+  fe0008:	fe 00 10 fa 
+  fe000c:	fe 00 40 
+  fe000f:	bc fa fe 00 	clr\.b foo
+  fe0013:	50 
diff --git a/ld/testsuite/ld-s12z/opr-linking.s b/ld/testsuite/ld-s12z/opr-linking.s
new file mode 100644
index 0000000..aa70566
--- /dev/null
+++ b/ld/testsuite/ld-s12z/opr-linking.s
@@ -0,0 +1,7 @@
+here:
+	nop
+	nop
+	nop
+	nop
+	divs.lw d7, bar, wiz
+	clr.b foo
diff --git a/ld/testsuite/ld-s12z/relative-linking.d b/ld/testsuite/ld-s12z/relative-linking.d
new file mode 100644
index 0000000..286fe52
--- /dev/null
+++ b/ld/testsuite/ld-s12z/relative-linking.d
@@ -0,0 +1,14 @@
+#source: relative-linking.s
+#ld: --no-relax --defsym here=0xfe0020 --defsym=foo=0xfe0008  --defsym=bar=0xfe0010 --defsym=wiz=0xfe0040
+#objdump: -d -r
+
+tmpdir/dump:     file format elf32-s12z
+
+
+Disassembly of section .text:
+
+00fe0000 <here>:
+  fe0000:	20 80 08    	bra foo
+  fe0003:	02 b0 bc 80 	brclr.b d0, #3, bar
+  fe0007:	0d 
+  fe0008:	0b 85 80 38 	dbne d1, wiz
diff --git a/ld/testsuite/ld-s12z/relative-linking.s b/ld/testsuite/ld-s12z/relative-linking.s
new file mode 100644
index 0000000..fa52edb
--- /dev/null
+++ b/ld/testsuite/ld-s12z/relative-linking.s
@@ -0,0 +1,5 @@
+
+here:
+	bra foo
+	brclr.b d0, #3, bar
+	dbne  d1, wiz
diff --git a/ld/testsuite/ld-s12z/z12s.exp b/ld/testsuite/ld-s12z/z12s.exp
new file mode 100644
index 0000000..4c9baa4
--- /dev/null
+++ b/ld/testsuite/ld-s12z/z12s.exp
@@ -0,0 +1,33 @@
+# Expect script for run_dump_test based ld-m68hc11 tests.
+#   Copyright (C) 2018 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+#
+
+# Test S12Z linker tests.  This tests the assembler as well as the linker.
+
+if { ![istarget s12z-*-*] } {
+    return
+}
+
+set rd_test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
+foreach shtest $rd_test_list {
+    # We need to strip the ".d", but can leave the dirname.
+    verbose [file rootname $shtest]
+    run_dump_test [file rootname $shtest]
+}