diff options
author | Richard Earnshaw <richard.earnshaw@arm.com> | 2007-04-21 19:44:40 +0000 |
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committer | Richard Earnshaw <richard.earnshaw@arm.com> | 2007-04-21 19:44:40 +0000 |
commit | 743b2a1e9e63574c16a0976aaf6cfdd58505aa62 (patch) | |
tree | 32d721d022db81a5a35034cbce526787480a3673 /ld | |
parent | 37b37b2d7ab89d0e8326a116851cdbfce9175b4b (diff) | |
download | gdb-743b2a1e9e63574c16a0976aaf6cfdd58505aa62.zip gdb-743b2a1e9e63574c16a0976aaf6cfdd58505aa62.tar.gz gdb-743b2a1e9e63574c16a0976aaf6cfdd58505aa62.tar.bz2 |
* ld-arm/arm-app-abs32.d: Convert to unified syntax.
* ld-arm/arm-app.d: Likewise.
* ld-arm/arm-lib-plt32.d: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
* ld-arm/armthumb-lib.d: Likewise.
* ld-arm/mixed-app-v5.d: Likewise.
* ld-arm/mixed-app.d: Likewise.
* ld-arm/mixed-lib.d: Likewise.
Diffstat (limited to 'ld')
-rw-r--r-- | ld/testsuite/ChangeLog | 12 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/arm-app-abs32.d | 6 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/arm-app.d | 10 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/arm-lib-plt32.d | 8 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/arm-lib.d | 8 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/arm-static-app.d | 8 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/armthumb-lib.d | 6 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/mixed-app-v5.d | 10 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/mixed-app.d | 10 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/mixed-lib.d | 6 |
10 files changed, 48 insertions, 36 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 5033f78..ad9bcbd 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,15 @@ +2007-04-21 Richard Earnshaw <rearnsha@arm.com> + + * ld-arm/arm-app-abs32.d: Convert to unified syntax. + * ld-arm/arm-app.d: Likewise. + * ld-arm/arm-lib-plt32.d: Likewise. + * ld-arm/arm-lib.d: Likewise. + * ld-arm/arm-static-app.d: Likewise. + * ld-arm/armthumb-lib.d: Likewise. + * ld-arm/mixed-app-v5.d: Likewise. + * ld-arm/mixed-app.d: Likewise. + * ld-arm/mixed-lib.d: Likewise. + 2007-04-18 Alan Modra <amodra@bigpond.net.au> * ld-spu/ovl.lnk: Use OVERLAY keyword. diff --git a/ld/testsuite/ld-arm/arm-app-abs32.d b/ld/testsuite/ld-arm/arm-app-abs32.d index c398169..0c5e283 100644 --- a/ld/testsuite/ld-arm/arm-app-abs32.d +++ b/ld/testsuite/ld-arm/arm-app-abs32.d @@ -7,7 +7,7 @@ start address .* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,9 +19,9 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: e59f0004 ldr r0, \[pc, #4\] ; .* <.text\+0x14> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: .* .* diff --git a/ld/testsuite/ld-arm/arm-app.d b/ld/testsuite/ld-arm/arm-app.d index 0cb52a9..a4ac93e 100644 --- a/ld/testsuite/ld-arm/arm-app.d +++ b/ld/testsuite/ld-arm/arm-app.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,16 +19,16 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000001 bl .* <app_func> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <app_func>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebfffff4 bl .* <.text-0xc> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <app_func2>: diff --git a/ld/testsuite/ld-arm/arm-lib-plt32.d b/ld/testsuite/ld-arm/arm-lib-plt32.d index 96beabc..21165b2 100644 --- a/ld/testsuite/ld-arm/arm-lib-plt32.d +++ b/ld/testsuite/ld-arm/arm-lib-plt32.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,9 +19,9 @@ Disassembly of section .text: .* <lib_func1>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} - .*: ebfffff9 bl .* <.text-0xc> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff9 bl .* <\.text-0xc> + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <lib_func2>: diff --git a/ld/testsuite/ld-arm/arm-lib.d b/ld/testsuite/ld-arm/arm-lib.d index 706a657..20fa8bc 100644 --- a/ld/testsuite/ld-arm/arm-lib.d +++ b/ld/testsuite/ld-arm/arm-lib.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,9 +19,9 @@ Disassembly of section .text: .* <lib_func1>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} - .*: ebfffff9 bl .* <.text-0xc> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff9 bl .* <\.text-0xc> + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <lib_func2>: diff --git a/ld/testsuite/ld-arm/arm-static-app.d b/ld/testsuite/ld-arm/arm-static-app.d index 9a3309d..f18f3c6 100644 --- a/ld/testsuite/ld-arm/arm-static-app.d +++ b/ld/testsuite/ld-arm/arm-static-app.d @@ -8,16 +8,16 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000001 bl .* <app_func> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <app_func>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000001 bl .* <app_func2> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <app_func2>: diff --git a/ld/testsuite/ld-arm/armthumb-lib.d b/ld/testsuite/ld-arm/armthumb-lib.d index ebbb390..b00eb0c 100644 --- a/ld/testsuite/ld-arm/armthumb-lib.d +++ b/ld/testsuite/ld-arm/armthumb-lib.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,9 +19,9 @@ Disassembly of section .text: .* <lib_func1>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebfffff. bl .* <.text-0x..?> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) diff --git a/ld/testsuite/ld-arm/mixed-app-v5.d b/ld/testsuite/ld-arm/mixed-app-v5.d index 73fa9ec..6498021 100644 --- a/ld/testsuite/ld-arm/mixed-app-v5.d +++ b/ld/testsuite/ld-arm/mixed-app-v5.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -22,9 +22,9 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000004 bl .* <app_func> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) @@ -32,9 +32,9 @@ Disassembly of section .text: .* <app_func>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebfffff. bl .* - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) diff --git a/ld/testsuite/ld-arm/mixed-app.d b/ld/testsuite/ld-arm/mixed-app.d index 8fa06fc..46fc789 100644 --- a/ld/testsuite/ld-arm/mixed-app.d +++ b/ld/testsuite/ld-arm/mixed-app.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -24,9 +24,9 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000004 bl .* <app_func> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) @@ -34,9 +34,9 @@ Disassembly of section .text: .* <app_func>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebffff.. bl .* - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) diff --git a/ld/testsuite/ld-arm/mixed-lib.d b/ld/testsuite/ld-arm/mixed-lib.d index b70eef8..33f31df 100644 --- a/ld/testsuite/ld-arm/mixed-lib.d +++ b/ld/testsuite/ld-arm/mixed-lib.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,9 +19,9 @@ Disassembly of section .text: .* <lib_func1>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebfffff. bl .* <.text-0x..?> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) |