diff options
| author | Richard Sandiford <rdsandiford@googlemail.com> | 2007-05-15 12:18:53 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2007-05-15 12:18:53 +0000 |
| commit | 5c18022ec57b2c4ad4d94a76d8d9c8424253954a (patch) | |
| tree | a042e6e5e0d7366973825d0f01d2d0e60e7eeabe /ld | |
| parent | 2a67688880dc1a9cbb6308c22ea6e62ff4c51297 (diff) | |
| download | gdb-5c18022ec57b2c4ad4d94a76d8d9c8424253954a.zip gdb-5c18022ec57b2c4ad4d94a76d8d9c8424253954a.tar.gz gdb-5c18022ec57b2c4ad4d94a76d8d9c8424253954a.tar.bz2 | |
bfd/
* elfxx-mips.c (mips_elf_create_local_got_entry): Remove
input_section argument. Create .rela.dyn relocations against
symbol 0 rather than the section symbol.
(mips_elf_local_got_index): Remove input_section argument.
Update call to mips_elf_create_local_got_entry.
(mips_elf_got_page, mips_elf_got16_entry): Likewise.
(mips_elf_calculate_relocation): Update calls to
mips_elf_local_got_index, mips_elf_got16_entry and mips_elf_got_page.
ld/testsuite/
* ld-mips-elf/vxworks1-lib.rd: Expect the GOT relocation to be
against symbol 0.
Diffstat (limited to 'ld')
| -rw-r--r-- | ld/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | ld/testsuite/ld-mips-elf/vxworks1-lib.rd | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 0f8e421..4214809 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2007-05-15 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/vxworks1-lib.rd: Expect the GOT relocation to be + against symbol 0. + 2007-05-15 Mark Shinwell <shinwell@codesourcery.com> * ld-arm/arm-elf.exp: Add jump19 testcase. diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd index 9a8b35e..225fdea 100644 --- a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd +++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd @@ -4,7 +4,7 @@ Relocation section '\.rela\.dyn' at offset .* contains .* entries: 00080c0c .*05 R_MIPS_HI16 00000000 __GOTT_BASE__ \+ 0 00080c10 .*06 R_MIPS_LO16 00000000 __GOTT_BASE__ \+ 0 00080c14 .*01 R_MIPS_16 00000000 __GOTT_INDEX__ \+ 0 -0008141c .*02 R_MIPS_32 00080c00 \.text \+ 5c +0008141c 00000002 R_MIPS_32 00080c5c 00081c00 00000002 R_MIPS_32 00080c5c 00081c04 00000002 R_MIPS_32 00081c00 00081c08 .*02 R_MIPS_32 00081c08 dglobal \+ 0 |