Implement PowerPC64 .localentry for value 1

This adds support for ".localentry 1", a new st_other
STO_PPC64_LOCAL_MASK encoding that signifies a function with a single
entry point like ".localentry 0", but unlike a ".localentry 0"
function does not preserve r2.

include/
	* elf/ppc64.h: Specify byte offset to local entry for values
	of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
	value for such functions when entering via global entry point.
	Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
bfd/
	* elf64-ppc.c (ppc64_elf_size_stubs): Use a ppc_stub_long_branch_r2off
	for calls to symbols with STO_PPC64_LOCAL_MASK bits set to 1.
gas/
	* config/tc-ppc.c (ppc_elf_localentry): Allow .localentry values
	of 1 and 7 to directly set value into STO_PPC64_LOCAL_MASK bits.
ld/testsuite/
	* ld-powerpc/elfv2.s: Add .localentry f5,1 testcase.
	* ld-powerpc/elfv2exe.d: Update.
	* ld-powerpc/elfv2so.d: Update.

4 files changed, 58 insertions, 17 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 0b3058b..e1692f1 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,9 @@
+2018-07-26  Alan Modra  <amodra@gmail.com>
+
+	* ld-powerpc/elfv2.s: Add .localentry f5,1 testcase.
+	* ld-powerpc/elfv2exe.d: Update.
+	* ld-powerpc/elfv2so.d: Update.
+
 2018-07-25  Alan Modra  <amodra@gmail.com>
 
 	* testsuite/ld-powerpc/big.s: New file.
diff --git a/ld/testsuite/ld-powerpc/elfv2.s b/ld/testsuite/ld-powerpc/elfv2.s
index c2a4c3b..4fedbb7 100644
--- a/ld/testsuite/ld-powerpc/elfv2.s
+++ b/ld/testsuite/ld-powerpc/elfv2.s
@@ -25,8 +25,17 @@ f1:
  nop
  bl f4
  nop
+ bl f5
+ nop
  ld 0,48(1)
  addi 1,1,32
  mtlr 0
  blr
  .size f1,.-f1
+
+ .globl f5
+ .type f5,@function
+f5:
+ .localentry f5,1
+ blr
+ .size f5,.-f5
diff --git a/ld/testsuite/ld-powerpc/elfv2exe.d b/ld/testsuite/ld-powerpc/elfv2exe.d
index 77bf6e2..d08e600 100644
--- a/ld/testsuite/ld-powerpc/elfv2exe.d
+++ b/ld/testsuite/ld-powerpc/elfv2exe.d
@@ -9,17 +9,22 @@ Disassembly of section \.text:
 
 0+100000c0 <.*\.plt_branch\.f4>:
 .*:	(3d 82 ff ff|ff ff 82 3d) 	addis   r12,r2,-1
-.*:	(e9 8c 7f 28|28 7f 8c e9) 	ld      r12,32552\(r12\)
+.*:	(e9 8c 7f 58|58 7f 8c e9) 	ld      r12,32600\(r12\)
 .*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 
 0+100000d0 <.*\.plt_branch\.f2>:
 .*:	(3d 82 ff ff|ff ff 82 3d) 	addis   r12,r2,-1
-.*:	(e9 8c 7f 30|30 7f 8c e9) 	ld      r12,32560\(r12\)
+.*:	(e9 8c 7f 60|60 7f 8c e9) 	ld      r12,32608\(r12\)
 .*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 
-0+100000e0 <(f1|_start)>:
+0+100000e0 <.*\.long_branch_r2off\.f5>:
+.*:	(f8 41 00 18|18 00 41 f8) 	std     r2,24\(r1\)
+.*:	(48 00 00 6c|6c 00 00 48) 	b       .* <f5>
+	\.\.\.
+
+0+10000100 <(f1|_start)>:
 .*:	(3c 40 10 02|02 10 40 3c) 	lis     r2,4098
 .*:	(38 42 82 00|00 82 42 38) 	addi    r2,r2,-32256
 .*:	(7c 08 02 a6|a6 02 08 7c) 	mflr    r0
@@ -27,14 +32,19 @@ Disassembly of section \.text:
 .*:	(f8 01 00 30|30 00 01 f8) 	std     r0,48\(r1\)
 .*:	(4b ff ff f5|f5 ff ff 4b) 	bl      .* <(f1|_start)\+0x8>
 .*:	(e8 62 80 08|08 80 62 e8) 	ld      r3,-32760\(r2\)
-.*:	(4b ff ff d5|d5 ff ff 4b) 	bl      .*\.plt_branch\.f2>
+.*:	(4b .. .. ..|.. .. .. 4b) 	bl      .*\.plt_branch\.f2>
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 62 80 10|10 80 62 e8) 	ld      r3,-32752\(r2\)
-.*:	(48 00 87 81|81 87 00 48) 	bl      10008888 <f3>
+.*:	(48 .. .. ..|.. .. .. 48) 	bl      10008888 <f3>
 .*:	(60 00 00 00|00 00 00 60) 	nop
-.*:	(4b ff ff b1|b1 ff ff 4b) 	bl      .*\.plt_branch\.f4>
+.*:	(4b .. .. ..|.. .. .. 4b) 	bl      .*\.plt_branch\.f4>
 .*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(4b .. .. ..|.. .. .. 4b) 	bl      .*\.long_branch_r2off\.f5>
+.*:	(e8 41 00 18|18 00 41 e8) 	ld      r2,24\(r1\)
 .*:	(e8 01 00 30|30 00 01 e8) 	ld      r0,48\(r1\)
 .*:	(38 21 00 20|20 00 21 38) 	addi    r1,r1,32
 .*:	(7c 08 03 a6|a6 03 08 7c) 	mtlr    r0
 .*:	(4e 80 00 20|20 00 80 4e) 	blr
+
+0+10000150 <f5>:
+.*:	(4e 80 00 20|20 00 80 4e) 	blr
diff --git a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d
index 5f198a9..0853f8a 100644
--- a/ld/testsuite/ld-powerpc/elfv2so.d
+++ b/ld/testsuite/ld-powerpc/elfv2so.d
@@ -9,13 +9,20 @@ Disassembly of section \.text:
 
 .* <.*\.plt_call\.f4>:
 .*:	(f8 41 00 18|18 00 41 f8) 	std     r2,24\(r1\)
-.*:	(e9 82 80 38|38 80 82 e9) 	ld      r12,-32712\(r2\)
+.*:	(e9 82 80 40|40 80 82 e9) 	ld      r12,-32704\(r2\)
 .*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 	\.\.\.
 
 .* <.*\.plt_call\.f3>:
 .*:	(f8 41 00 18|18 00 41 f8) 	std     r2,24\(r1\)
+.*:	(e9 82 80 30|30 80 82 e9) 	ld      r12,-32720\(r2\)
+.*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
+.*:	(4e 80 04 20|20 04 80 4e) 	bctr
+	\.\.\.
+
+.* <.*\.plt_call\.f5>:
+.*:	(f8 41 00 18|18 00 41 f8) 	std     r2,24\(r1\)
 .*:	(e9 82 80 28|28 80 82 e9) 	ld      r12,-32728\(r2\)
 .*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
@@ -23,14 +30,14 @@ Disassembly of section \.text:
 
 .* <.*\.plt_call\.f1>:
 .*:	(f8 41 00 18|18 00 41 f8) 	std     r2,24\(r1\)
-.*:	(e9 82 80 40|40 80 82 e9) 	ld      r12,-32704\(r2\)
+.*:	(e9 82 80 48|48 80 82 e9) 	ld      r12,-32696\(r2\)
 .*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 	\.\.\.
 
 .* <.*\.plt_call\.f2>:
 .*:	(f8 41 00 18|18 00 41 f8) 	std     r2,24\(r1\)
-.*:	(e9 82 80 30|30 80 82 e9) 	ld      r12,-32720\(r2\)
+.*:	(e9 82 80 38|38 80 82 e9) 	ld      r12,-32712\(r2\)
 .*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 	\.\.\.
@@ -41,19 +48,25 @@ Disassembly of section \.text:
 .*:	(7c 08 02 a6|a6 02 08 7c) 	mflr    r0
 .*:	(f8 21 ff e1|e1 ff 21 f8) 	stdu    r1,-32\(r1\)
 .*:	(f8 01 00 30|30 00 01 f8) 	std     r0,48\(r1\)
-.*:	(4b ff ff ad|ad ff ff 4b) 	bl      .*\.plt_call\.f1>
+.*:	(4b .. .. ..|.. .. .. 4b) 	bl      .*\.plt_call\.f1>
 .*:	(e8 62 80 08|08 80 62 e8) 	ld      r3,-32760\(r2\)
-.*:	(4b ff ff c5|c5 ff ff 4b) 	bl      .*\.plt_call\.f2>
+.*:	(4b .. .. ..|.. .. .. 4b) 	bl      .*\.plt_call\.f2>
 .*:	(e8 41 00 18|18 00 41 e8) 	ld      r2,24\(r1\)
 .*:	(e8 62 80 10|10 80 62 e8) 	ld      r3,-32752\(r2\)
-.*:	(4b ff ff 79|79 ff ff 4b) 	bl      .*\.plt_call\.f3>
+.*:	(4b .. .. ..|.. .. .. 4b) 	bl      .*\.plt_call\.f3>
+.*:	(e8 41 00 18|18 00 41 e8) 	ld      r2,24\(r1\)
+.*:	(4b .. .. ..|.. .. .. 4b) 	bl      .*\.plt_call\.f4>
 .*:	(e8 41 00 18|18 00 41 e8) 	ld      r2,24\(r1\)
-.*:	(4b ff ff 51|51 ff ff 4b) 	bl      .*\.plt_call\.f4>
+.*:	(4b .. .. ..|.. .. .. 4b) 	bl      .*\.plt_call\.f5>
 .*:	(e8 41 00 18|18 00 41 e8) 	ld      r2,24\(r1\)
 .*:	(e8 01 00 30|30 00 01 e8) 	ld      r0,48\(r1\)
 .*:	(38 21 00 20|20 00 21 38) 	addi    r1,r1,32
 .*:	(7c 08 03 a6|a6 03 08 7c) 	mtlr    r0
 .*:	(4e 80 00 20|20 00 80 4e) 	blr
+
+.* <f5>:
+.*:	(4e 80 00 20|20 00 80 4e) 	blr
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*
 .*
 
@@ -73,14 +86,17 @@ Disassembly of section \.text:
 .*:	(e9 6b 00 08|08 00 6b e9) 	ld      r11,8\(r11\)
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 
-.* <f3@plt>:
+.* <f5@plt>:
 .*:	(4b ff ff c8|c8 ff ff 4b) 	b       .* <__glink_PLTresolve>
 
-.* <f2@plt>:
+.* <f3@plt>:
 .*:	(4b ff ff c4|c4 ff ff 4b) 	b       .* <__glink_PLTresolve>
 
-.* <f4@plt>:
+.* <f2@plt>:
 .*:	(4b ff ff c0|c0 ff ff 4b) 	b       .* <__glink_PLTresolve>
 
-.* <f1@plt>:
+.* <f4@plt>:
 .*:	(4b ff ff bc|bc ff ff 4b) 	b       .* <__glink_PLTresolve>
+
+.* <f1@plt>:
+.*:	(4b ff ff b8|b8 ff ff 4b) 	b       .* <__glink_PLTresolve>