RISC-V: Add 'Zmmul' extension in assembler.

Three-part patch set from Tsukasa OI to support zmmul in assembler.

The 'Zmmul' is a RISC-V extension consisting of only multiply instructions
(a subset of 'M' which has multiply and divide instructions).

bfd/
	* elfxx-riscv.c (riscv_implicit_subsets): Add 'Zmmul' implied by 'M'.
	(riscv_supported_std_z_ext): Add 'Zmmul' extension.
	(riscv_multi_subset_supports): Add handling for new instruction class.
gas/
	* testsuite/gas/riscv/attribute-09.d: Updated implicit 'Zmmul' by 'M'.
	* testsuite/gas/riscv/option-arch-02.d: Likewise.
	* testsuite/gas/riscv/m-ext.s: New test.
	* testsuite/gas/riscv/m-ext-32.d: New test (RV32).
	* testsuite/gas/riscv/m-ext-64.d: New test (RV64).
	* testsuite/gas/riscv/zmmul-32.d: New expected output.
	* testsuite/gas/riscv/zmmul-64.d: Likewise.
	* testsuite/gas/riscv/m-ext-fail-xlen-32.d: New test (failure
	by using RV64-only instructions in RV32).
	* testsuite/gas/riscv/m-ext-fail-xlen-32.l: Likewise.
	* testsuite/gas/riscv/m-ext-fail-zmmul-32.d: New failure test
	(RV32 + Zmmul but with no M).
	* testsuite/gas/riscv/m-ext-fail-zmmul-32.l: Likewise.
	* testsuite/gas/riscv/m-ext-fail-zmmul-64.d: New failure test
	(RV64 + Zmmul but with no M).
	* testsuite/gas/riscv/m-ext-fail-zmmul-64.l: Likewise.
	* testsuite/gas/riscv/m-ext-fail-noarch-64.d: New failure test
	(no Zmmul or M).
	* testsuite/gas/riscv/m-ext-fail-noarch-64.l: Likewise.
include/
	* opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_ZMMUL.
ld/
	* testsuite/ld-riscv-elf/attr-merge-arch-01.d: We don't care zmmul in
	these testcases, so just replaced m by a.
	* testsuite/ld-riscv-elf/attr-merge-arch-01a.s: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-arch-01b.s: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-arch-02a.s: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-arch-03a.s: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-user-ext-01.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_a2p0.s: Renamed.
	* testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_a2p1.s: Renamed.
opcodes/
	* riscv-opc.c (riscv_opcodes): Updated multiply instructions to zmmul.

12 files changed, 12 insertions, 12 deletions

diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
index a4b0322..de87f60 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
@@ -6,4 +6,4 @@
 
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p1_m2p0"
+  Tag_RISCV_arch: "rv32i2p1_a2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01a.s b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01a.s
index ea097f9..4593241 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01a.s
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01a.s
@@ -1 +1 @@
-	.attribute arch, "rv32i2p1_m2p0"
+	.attribute arch, "rv32i2p1_a2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01b.s b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01b.s
index ea097f9..4593241 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01b.s
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01b.s
@@ -1 +1 @@
-	.attribute arch, "rv32i2p1_m2p0"
+	.attribute arch, "rv32i2p1_a2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
index 852fd55..381ef85 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
@@ -6,4 +6,4 @@
 
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p1_m2p0"
+  Tag_RISCV_arch: "rv32i2p1_a2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s
index ea097f9..4593241 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s
@@ -1 +1 @@
-	.attribute arch, "rv32i2p1_m2p0"
+	.attribute arch, "rv32i2p1_a2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
index c1cf808..6419fe8 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
@@ -6,4 +6,4 @@
 
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p1_m2p0_xbar2p0_xfoo2p0"
+  Tag_RISCV_arch: "rv32i2p1_a2p0_xbar2p0_xfoo2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03a.s b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03a.s
index 3a9fb97..603b5d6 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03a.s
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03a.s
@@ -1 +1 @@
-	.attribute arch, "rv32i2p1_m2p0_xfoo2p0"
+	.attribute arch, "rv32i2p1_a2p0_xfoo2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d
index d15bcdc..f4012dc 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d
@@ -1,9 +1,9 @@
-#source: attr-merge-user-ext-rv32i2p1_m2p0.s
-#source: attr-merge-user-ext-rv32i2p1_m2p1.s
+#source: attr-merge-user-ext-rv32i2p1_a2p0.s
+#source: attr-merge-user-ext-rv32i2p1_a2p1.s
 #as:
 #ld: -r -m[riscv_choose_ilp32_emul]
 #readelf: -A
 
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p1_m2p1"
+  Tag_RISCV_arch: "rv32i2p1_a2p1"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_a2p0.s b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_a2p0.s
new file mode 100644
index 0000000..0d4fba5
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_a2p0.s
@@ -0,0 +1 @@
+.attribute arch, "rv32i2p1_a2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_a2p1.s b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_a2p1.s
new file mode 100644
index 0000000..ded3583
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_a2p1.s
@@ -0,0 +1 @@
+.attribute arch, "rv32i2p1_a2p1"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p0.s b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p0.s
deleted file mode 100644
index a7e0547..0000000
--- a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p0.s
+++ /dev/null
@@ -1 +0,0 @@
-.attribute arch, "rv32i2p1_m2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p1.s b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p1.s
deleted file mode 100644
index a1b61e3..0000000
--- a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p1.s
+++ /dev/null
@@ -1 +0,0 @@
-.attribute arch, "rv32i2p1_m2p1"