Add support fpr MAXQ processor

10 files changed, 211 insertions, 0 deletions

diff --git a/ld/testsuite/ld-maxq/addend.dd b/ld/testsuite/ld-maxq/addend.dd
new file mode 100644
index 0000000..5cd8b32
--- /dev/null
+++ b/ld/testsuite/ld-maxq/addend.dd
@@ -0,0 +1,21 @@
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <_main>:
+   0:	78 56 [ 	]*MOVE  56h, #78h
+	...
+
+00000004 <_buf1>:
+   4:	34 12 [ 	]*MOVE  12h, #34h
+	...
+
+00000008 <_start>:
+   8:	3a da [ 	]*NOP 
+   a:	3a da [ 	]*NOP 
+   c:	00 0b [ 	]*MOVE  PFX\[0\], #00h
+   e:	03 09 [ 	]*MOVE  A\[0\], #03h
+  10:	00 0b [ 	]*MOVE  PFX\[0\], #00h
+  12:	01 09 [ 	]*MOVE  A\[0\], #01h
+  14:	fa 3d [ 	]*CALL  #fah
+  16:	f8 3d [ 	]*CALL  #f8h
diff --git a/ld/testsuite/ld-maxq/addend.s b/ld/testsuite/ld-maxq/addend.s
new file mode 100644
index 0000000..a5ca450
--- /dev/null
+++ b/ld/testsuite/ld-maxq/addend.s
@@ -0,0 +1,16 @@
+; Addend check testcases 
+; inderpreetb@noida.hcltech.com
+.global _main
+_main:
+_buf0:
+	.long 0x5678
+_buf1:
+	.long 0x1234
+_start:
+	nop
+	nop
+	move A[0], _buf1+2
+	move A[0], _buf1-2
+	call _buf0+8
+	call _buf1+2
+
diff --git a/ld/testsuite/ld-maxq/maxq.exp b/ld/testsuite/ld-maxq/maxq.exp
new file mode 100644
index 0000000..ceac713
--- /dev/null
+++ b/ld/testsuite/ld-maxq/maxq.exp
@@ -0,0 +1,52 @@
+# Expect script for ld-maxq tests
+#   Copyright (C) 2004 Free Software Foundation
+#
+# This file is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+# Written by inderpreetb@noida.hcltech.com
+
+# Test maxq linking; all types of relocs.  This tests the assembler and
+# tools like objdump as well as the linker.
+
+if { !([istarget "maxq*-*-*"]  ) } {
+    return
+}
+
+# List contains test-items with 3 items followed by 2 lists:
+# 0:name 1:ld options 2:assembler options
+# 3:filenames of assembler files 4: action and options. 5: name of output file
+
+# Actions:
+# objdump: Apply objdump options on result.  Compare with regex (last arg).
+# nm: Apply nm options on result.  Compare with regex (last arg).
+# readelf: Apply readelf options on result.  Compare with regex (last arg).
+
+set maxqtests {
+{"32-bit Relocation check" "" ""
+{r32-1.s r32-2.s} {{objdump -drw r32.dd}}
+"r32.o" }
+{"maxq addend check" "" ""
+{addend.s} {{objdump -dw addend.dd}}
+"addendo.o" }
+{"16bit relocation test" "" ""
+{paddr.s} {{objdump -Dw paddr.dd}}
+"paddro.o" }
+{"16bit relocation test-1" "" ""
+{paddr1.s} {{objdump -Dw paddr1.dd}}
+"paddro1.o" }
+
+}
+
+run_ld_link_tests $maxqtests
diff --git a/ld/testsuite/ld-maxq/paddr.dd b/ld/testsuite/ld-maxq/paddr.dd
new file mode 100644
index 0000000..8f5ab48
--- /dev/null
+++ b/ld/testsuite/ld-maxq/paddr.dd
@@ -0,0 +1,16 @@
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <main>:
+   0:	12 09 [ 	]*MOVE  A\[0\], #12h
+   2:	3a da [ 	]*NOP 
+   4:	3a da [ 	]*NOP 
+	...
+Disassembly of section .data:
+
+0000a000 <lb>:
+    a000:	23 00 [ 	]*MOVE  00h, #23h
+
+0000a002 <plc>:
+    a002:	00 a0 [ 	]*MOVE  20h, 00h
diff --git a/ld/testsuite/ld-maxq/paddr.s b/ld/testsuite/ld-maxq/paddr.s
new file mode 100644
index 0000000..693da88
--- /dev/null
+++ b/ld/testsuite/ld-maxq/paddr.s
@@ -0,0 +1,14 @@
+.text
+main:
+
+	move A[0], #12h
+	nop	
+	nop
+
+
+
+.data
+
+lb: .word 0x23
+plc: .word lb
+
diff --git a/ld/testsuite/ld-maxq/paddr1.dd b/ld/testsuite/ld-maxq/paddr1.dd
new file mode 100644
index 0000000..1297b83
--- /dev/null
+++ b/ld/testsuite/ld-maxq/paddr1.dd
@@ -0,0 +1,18 @@
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <main>:
+   0:	12 09       	MOVE  A\[0\], #12h
+   2:	3a da       	NOP 
+   4:	3a da       	NOP 
+	...
+Disassembly of section .data:
+
+0000a000 <lb>:
+    a000:	23 00       	MOVE  00h, #23h
+	...
+
+0000a004 <plc>:
+    a004:	00 a0       	MOVE  20h, 00h
+	...
diff --git a/ld/testsuite/ld-maxq/paddr1.s b/ld/testsuite/ld-maxq/paddr1.s
new file mode 100644
index 0000000..2f3d165
--- /dev/null
+++ b/ld/testsuite/ld-maxq/paddr1.s
@@ -0,0 +1,10 @@
+.text
+main:
+
+	move A[0], #12h
+	nop	
+	nop
+.data
+
+lb: .long 0x23
+plc: .long lb
diff --git a/ld/testsuite/ld-maxq/r32-1.s b/ld/testsuite/ld-maxq/r32-1.s
new file mode 100644
index 0000000..9cf38c1
--- /dev/null
+++ b/ld/testsuite/ld-maxq/r32-1.s
@@ -0,0 +1,20 @@
+; Test the intersegment relocation
+; Inderpreetb@noida.hcltech.com
+
+.global _start
+.extern _main
+_start:
+	call _main
+	nop
+	nop
+	nop
+	nop
+.global _exit
+_exit:
+	nop
+	nop
+	nop
+.global _abort	
+_abort:
+	nop	
+	nop
diff --git a/ld/testsuite/ld-maxq/r32-2.s b/ld/testsuite/ld-maxq/r32-2.s
new file mode 100644
index 0000000..49bb59e
--- /dev/null
+++ b/ld/testsuite/ld-maxq/r32-2.s
@@ -0,0 +1,13 @@
+;
+; test the intersegment relocation
+; inderpreetb@noida.hcltech.com
+.extern _start
+.extern _abort
+.extern _exit
+.global _main
+_main:
+	call _exit
+	call _abort
+	ljump _abort
+	ljump _exit
+
diff --git a/ld/testsuite/ld-maxq/r32.dd b/ld/testsuite/ld-maxq/r32.dd
new file mode 100644
index 0000000..f245ca9
--- /dev/null
+++ b/ld/testsuite/ld-maxq/r32.dd
@@ -0,0 +1,31 @@
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <_start>:
+   0:	00 0b [ 	]*MOVE  PFX\[0\], #00h
+   2:	0c 3d [ 	]*CALL  #0ch
+   4:	3a da [ 	]*NOP 
+   6:	3a da [ 	]*NOP 
+   8:	3a da [ 	]*NOP 
+   a:	3a da [ 	]*NOP 
+
+0000000c <_exit>:
+   c:	3a da [ 	]*NOP 
+   e:	3a da [ 	]*NOP 
+  10:	3a da [ 	]*NOP 
+
+00000012 <_abort>:
+  12:	3a da [ 	]*NOP 
+  14:	3a da [ 	]*NOP 
+	...
+
+00000018 <_main>:
+  18:	00 0b [ 	]*MOVE  PFX\[0\], #00h
+  1a:	06 3d [ 	]*CALL  #06h
+  1c:	00 0b [ 	]*MOVE  PFX\[0\], #00h
+  1e:	09 3d [ 	]*CALL  #09h
+  20:	00 0b [ 	]*MOVE  PFX\[0\], #00h
+  22:	09 0c [ 	]*JUMP  #09h
+  24:	00 0b [ 	]*MOVE  PFX\[0\], #00h
+  26:	06 0c [ 	]*JUMP  #06h