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authorKito Cheng <kito.cheng@sifive.com>2020-07-06 19:30:36 -0700
committerNelson Chu <nelson.chu@sifive.com>2020-09-03 11:11:38 +0800
commit72bd6912ea38224481f8bd0ed13b751e0fda4683 (patch)
tree0ba9c3c12bb03120fd7b2608423fb1523c48d533 /ld/testsuite
parentd48b742bc1a7af6a673e747c91bf7c72518a0b6a (diff)
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RISC-V: Improve the error message for the mis-matched ISA versions.
Consider the updated attr-merge-arch-failed-01.d testcase. Extension A's version are mis-matched between attr-merge-arch-failed-01a.s and attr-merge-arch-failed-01b.s. But the old binutils reports that the mis-matched extension is M rather than A. This commit is used to fix the wrong mis-matched error message. Besides, when parsing the arch string in the riscv_parse_subset, it shouldn't be NULL or empty. However, it might be empty when we failed to merge the arch string in the riscv_merge_attributes. Since we should already issue the correct error message in another side, and the message - ISA string must begin with rv32 or rv64 - is meaninglesss when the arch string is empty, so do not issue it. bfd/ * elfnn-riscv.c (riscv_merge_std_ext): Fix to report the correct error message when the versions of extension are mis-matched. * elfxx-riscv.c (riscv_parse_subset): Don't issue the error when the string is empty. ld/ * testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d: Updated. * testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s: Likewise.
Diffstat (limited to 'ld/testsuite')
-rw-r--r--ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d2
-rw-r--r--ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s2
-rw-r--r--ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s2
3 files changed, 3 insertions, 3 deletions
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d
index c77f80b..8a9c092 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d
@@ -2,4 +2,4 @@
#source: attr-merge-arch-failed-01b.s
#as: -march-attr
#ld: -r -melf32lriscv
-#error: Mis-matched ISA version for 'm' extension. 3.0 vs 2.0
+#error: Mis-matched ISA version for 'a' extension. 3.0 vs 2.0
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s b/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s
index acc98a5..365901d 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s
@@ -1 +1 @@
- .attribute arch, "rv32i2p0_m2p0"
+ .attribute arch, "rv32i2p0_m2p0_a2p0"
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s b/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s
index c9a590a..49263bf 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s
@@ -1 +1 @@
- .attribute arch, "rv32i2p0_m3p0"
+ .attribute arch, "rv32i2p0_m2p0_a3p0"