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authorAlan Modra <amodra@gmail.com>2017-02-23 12:20:42 +1030
committerAlan Modra <amodra@gmail.com>2017-02-23 12:33:51 +1030
commit5499c7c71cc403a1deff90b79ab41d17efc5c4cc (patch)
tree741cd69ec800b5e24bcae98532a6aeb50de13150 /ld/testsuite
parentd8260425e6a8ef78cf47324f6f68d7978ac701ba (diff)
downloadgdb-5499c7c71cc403a1deff90b79ab41d17efc5c4cc.zip
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Correct VLE 16D and SDAREL relocations
PR 20744 bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Correct dst_mask on all VLE 16D relocations. (ppc_elf_vle_split16): Correct field mask and shift for 16D relocs. (ppc_elf_relocate_section): Correct calculation for VLE SDAREL relocs. ld/ * testsuite/ld-powerpc/vle-reloc-2.s: Use r6 for last insn of each group. * testsuite/ld-powerpc/vle-reloc-2.d: Update for above change and sdarel reloc fix.
Diffstat (limited to 'ld/testsuite')
-rw-r--r--ld/testsuite/ld-powerpc/vle-reloc-2.d72
-rw-r--r--ld/testsuite/ld-powerpc/vle-reloc-2.s24
2 files changed, 48 insertions, 48 deletions
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-2.d b/ld/testsuite/ld-powerpc/vle-reloc-2.d
index 6baafdc..cfebd12 100644
--- a/ld/testsuite/ld-powerpc/vle-reloc-2.d
+++ b/ld/testsuite/ld-powerpc/vle-reloc-2.d
@@ -10,75 +10,75 @@ Disassembly of section .text:
.*: 70 20 c1 a2 e_or2i r1,418
.*: 70 40 c1 81 e_or2i r2,385
.*: 70 60 c1 81 e_or2i r3,385
-.*: 70 80 c1 ae e_or2i r4,430
-.*: 70 a0 c1 80 e_or2i r5,384
-.*: 70 40 c1 81 e_or2i r2,385
+.*: 70 90 c0 00 e_or2i r4,32768
+.*: 70 bf c7 ff e_or2i r5,65535
+.*: 70 c0 c0 00 e_or2i r6,0
.*: 70 20 c9 a2 e_and2i\. r1,418
.*: 70 40 c9 81 e_and2i\. r2,385
.*: 70 60 c9 81 e_and2i\. r3,385
-.*: 70 80 c9 ae e_and2i\. r4,430
-.*: 70 a0 c9 80 e_and2i\. r5,384
-.*: 70 40 c9 81 e_and2i\. r2,385
+.*: 70 90 c8 00 e_and2i\. r4,32768
+.*: 70 bf cf ff e_and2i\. r5,65535
+.*: 70 c0 c8 00 e_and2i\. r6,0
.*: 70 20 d1 a2 e_or2is r1,418
.*: 70 40 d1 81 e_or2is r2,385
.*: 70 60 d1 81 e_or2is r3,385
-.*: 70 80 d1 ae e_or2is r4,430
-.*: 70 a0 d1 80 e_or2is r5,384
-.*: 70 40 d1 81 e_or2is r2,385
+.*: 70 90 d0 00 e_or2is r4,32768
+.*: 70 bf d7 ff e_or2is r5,65535
+.*: 70 c0 d0 00 e_or2is r6,0
.*: 70 20 e1 a2 e_lis r1,418
.*: 70 40 e1 81 e_lis r2,385
.*: 70 60 e1 81 e_lis r3,385
-.*: 70 80 e1 ae e_lis r4,430
-.*: 70 a0 e1 80 e_lis r5,384
-.*: 70 40 e1 81 e_lis r2,385
+.*: 70 90 e0 00 e_lis r4,32768
+.*: 70 bf e7 ff e_lis r5,65535
+.*: 70 c0 e0 00 e_lis r6,0
.*: 70 20 e9 a2 e_and2is\. r1,418
.*: 70 40 e9 81 e_and2is\. r2,385
.*: 70 60 e9 81 e_and2is\. r3,385
-.*: 70 80 e9 ae e_and2is\. r4,430
-.*: 70 a0 e9 80 e_and2is\. r5,384
-.*: 70 40 e9 81 e_and2is\. r2,385
+.*: 70 90 e8 00 e_and2is\. r4,32768
+.*: 70 bf ef ff e_and2is\. r5,65535
+.*: 70 c0 e8 00 e_and2is\. r6,0
.*: 70 01 99 a2 e_cmp16i r1,418
.*: 70 02 99 81 e_cmp16i r2,385
.*: 70 03 99 81 e_cmp16i r3,385
-.*: 70 04 99 ae e_cmp16i r4,430
-.*: 70 05 99 80 e_cmp16i r5,384
-.*: 70 02 99 81 e_cmp16i r2,385
+.*: 72 04 98 00 e_cmp16i r4,-32768
+.*: 73 e5 9f ff e_cmp16i r5,-1
+.*: 70 06 98 00 e_cmp16i r6,0
.*: 70 01 a9 a2 e_cmpl16i r1,418
.*: 70 02 a9 81 e_cmpl16i r2,385
.*: 70 03 a9 81 e_cmpl16i r3,385
-.*: 70 04 a9 ae e_cmpl16i r4,430
-.*: 70 05 a9 80 e_cmpl16i r5,384
-.*: 70 02 a9 81 e_cmpl16i r2,385
+.*: 72 04 a8 00 e_cmpl16i r4,32768
+.*: 73 e5 af ff e_cmpl16i r5,65535
+.*: 70 06 a8 00 e_cmpl16i r6,0
.*: 70 01 b1 a2 e_cmph16i r1,418
.*: 70 02 b1 81 e_cmph16i r2,385
.*: 70 03 b1 81 e_cmph16i r3,385
-.*: 70 04 b1 ae e_cmph16i r4,430
-.*: 70 05 b1 80 e_cmph16i r5,384
-.*: 70 02 b1 81 e_cmph16i r2,385
+.*: 72 04 b0 00 e_cmph16i r4,-32768
+.*: 73 e5 b7 ff e_cmph16i r5,-1
+.*: 70 06 b0 00 e_cmph16i r6,0
.*: 70 01 b9 a2 e_cmphl16i r1,418
.*: 70 02 b9 81 e_cmphl16i r2,385
.*: 70 03 b9 81 e_cmphl16i r3,385
-.*: 70 04 b9 ae e_cmphl16i r4,430
-.*: 70 05 b9 80 e_cmphl16i r5,384
-.*: 70 02 b9 81 e_cmphl16i r2,385
+.*: 72 04 b8 00 e_cmphl16i r4,32768
+.*: 73 e5 bf ff e_cmphl16i r5,65535
+.*: 70 06 b8 00 e_cmphl16i r6,0
.*: 70 01 89 a2 e_add2i\. r1,418
.*: 70 02 89 81 e_add2i\. r2,385
.*: 70 03 89 81 e_add2i\. r3,385
-.*: 70 04 89 ae e_add2i\. r4,430
-.*: 70 05 89 80 e_add2i\. r5,384
-.*: 70 02 89 81 e_add2i\. r2,385
+.*: 72 04 88 00 e_add2i. r4,-32768
+.*: 73 e5 8f ff e_add2i. r5,-1
+.*: 70 06 88 00 e_add2i. r6,0
.*: 70 01 91 a2 e_add2is r1,418
.*: 70 02 91 81 e_add2is r2,385
.*: 70 03 91 81 e_add2is r3,385
-.*: 70 04 91 ae e_add2is r4,430
-.*: 70 05 91 80 e_add2is r5,384
-.*: 70 02 91 81 e_add2is r2,385
+.*: 72 04 90 00 e_add2is r4,-32768
+.*: 73 e5 97 ff e_add2is r5,-1
+.*: 70 06 90 00 e_add2is r6,0
.*: 70 01 a1 a2 e_mull2i r1,418
.*: 70 02 a1 81 e_mull2i r2,385
.*: 70 03 a1 81 e_mull2i r3,385
-.*: 70 04 a1 ae e_mull2i r4,430
-.*: 70 05 a1 80 e_mull2i r5,384
-.*: 70 02 a1 81 e_mull2i r2,385
+.*: 72 04 a0 00 e_mull2i r4,-32768
+.*: 73 e5 a7 ff e_mull2i r5,-1
+.*: 70 06 a0 00 e_mull2i r6,0
.* <sub3>:
.*: 00 04 se_blr
.* <sub4>:
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-2.s b/ld/testsuite/ld-powerpc/vle-reloc-2.s
index 34cc32d..6bce4dd 100644
--- a/ld/testsuite/ld-powerpc/vle-reloc-2.s
+++ b/ld/testsuite/ld-powerpc/vle-reloc-2.s
@@ -12,81 +12,81 @@ vle_reloc_2:
e_or2i 3, high_adjust@ha
e_or2i 4, low_sdarel@sdarel@l
e_or2i 5, high_sdarel@sdarel@h
- e_or2i 2, high_adjust_sdarel@sdarel@ha
+ e_or2i 6, high_adjust_sdarel@sdarel@ha
e_and2i. 1, low@l
e_and2i. 2, high@h
e_and2i. 3, high_adjust@ha
e_and2i. 4, low_sdarel@sdarel@l
e_and2i. 5, high_sdarel@sdarel@h
- e_and2i. 2, high_adjust_sdarel@sdarel@ha
+ e_and2i. 6, high_adjust_sdarel@sdarel@ha
e_or2is 1, low@l
e_or2is 2, high@h
e_or2is 3, high_adjust@ha
e_or2is 4, low_sdarel@sdarel@l
e_or2is 5, high_sdarel@sdarel@h
- e_or2is 2, high_adjust_sdarel@sdarel@ha
+ e_or2is 6, high_adjust_sdarel@sdarel@ha
e_lis 1, low@l
e_lis 2, high@h
e_lis 3, high_adjust@ha
e_lis 4, low_sdarel@sdarel@l
e_lis 5, high_sdarel@sdarel@h
- e_lis 2, high_adjust_sdarel@sdarel@ha
+ e_lis 6, high_adjust_sdarel@sdarel@ha
e_and2is. 1, low@l
e_and2is. 2, high@h
e_and2is. 3, high_adjust@ha
e_and2is. 4, low_sdarel@sdarel@l
e_and2is. 5, high_sdarel@sdarel@h
- e_and2is. 2, high_adjust_sdarel@sdarel@ha
+ e_and2is. 6, high_adjust_sdarel@sdarel@ha
e_cmp16i 1, low@l
e_cmp16i 2, high@h
e_cmp16i 3, high_adjust@ha
e_cmp16i 4, low_sdarel@sdarel@l
e_cmp16i 5, high_sdarel@sdarel@h
- e_cmp16i 2, high_adjust_sdarel@sdarel@ha
+ e_cmp16i 6, high_adjust_sdarel@sdarel@ha
e_cmpl16i 1, low@l
e_cmpl16i 2, high@h
e_cmpl16i 3, high_adjust@ha
e_cmpl16i 4, low_sdarel@sdarel@l
e_cmpl16i 5, high_sdarel@sdarel@h
- e_cmpl16i 2, high_adjust_sdarel@sdarel@ha
+ e_cmpl16i 6, high_adjust_sdarel@sdarel@ha
e_cmph16i 1, low@l
e_cmph16i 2, high@h
e_cmph16i 3, high_adjust@ha
e_cmph16i 4, low_sdarel@sdarel@l
e_cmph16i 5, high_sdarel@sdarel@h
- e_cmph16i 2, high_adjust_sdarel@sdarel@ha
+ e_cmph16i 6, high_adjust_sdarel@sdarel@ha
e_cmphl16i 1, low@l
e_cmphl16i 2, high@h
e_cmphl16i 3, high_adjust@ha
e_cmphl16i 4, low_sdarel@sdarel@l
e_cmphl16i 5, high_sdarel@sdarel@h
- e_cmphl16i 2, high_adjust_sdarel@sdarel@ha
+ e_cmphl16i 6, high_adjust_sdarel@sdarel@ha
e_add2i. 1, low@l
e_add2i. 2, high@h
e_add2i. 3, high_adjust@ha
e_add2i. 4, low_sdarel@sdarel@l
e_add2i. 5, high_sdarel@sdarel@h
- e_add2i. 2, high_adjust_sdarel@sdarel@ha
+ e_add2i. 6, high_adjust_sdarel@sdarel@ha
e_add2is 1, low@l
e_add2is 2, high@h
e_add2is 3, high_adjust@ha
e_add2is 4, low_sdarel@sdarel@l
e_add2is 5, high_sdarel@sdarel@h
- e_add2is 2, high_adjust_sdarel@sdarel@ha
+ e_add2is 6, high_adjust_sdarel@sdarel@ha
e_mull2i 1, low@l
e_mull2i 2, high@h
e_mull2i 3, high_adjust@ha
e_mull2i 4, low_sdarel@sdarel@l
e_mull2i 5, high_sdarel@sdarel@h
- e_mull2i 2, high_adjust_sdarel@sdarel@ha
+ e_mull2i 6, high_adjust_sdarel@sdarel@ha