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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 11:25:12 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 12:30:33 +0100 |
| commit | 4389b29a5af431eeac517272b66560e12df3c430 (patch) | |
| tree | b7af946fea6ad50897d403b12762dfdaa9859dc3 /ld/testsuite | |
| parent | e5d6e09ee6cea13942a8042945e784f483a6f3af (diff) | |
| download | gdb-4389b29a5af431eeac517272b66560e12df3c430.zip gdb-4389b29a5af431eeac517272b66560e12df3c430.tar.gz gdb-4389b29a5af431eeac517272b66560e12df3c430.tar.bz2 | |
[binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This patch adds the BF instruction.
ChangeLog entries are as follows:
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entries for bf.
(do_t_branch_future): New.
(insns): New instruction for bf.
* testsuite/gas/arm/armv8_1-m-bf.d: New.
* testsuite/gas/arm/armv8_1-m-bf.s: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.s: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.l: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.d: New.
* testsuite/gas/arm/armv8_1-m-bf-rel.d: New.
* testsuite/gas/arm/armv8_1-m-bf-rel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bf.s: New.
* testsuite/ld-arm/bf.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instructions for bf.
Diffstat (limited to 'ld/testsuite')
| -rw-r--r-- | ld/testsuite/ld-arm/arm-elf.exp | 4 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/bf.d | 14 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/bf.s | 19 |
3 files changed, 37 insertions, 0 deletions
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index 450a76b..ef3a49c 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -667,6 +667,10 @@ set armeabitests_nonacl { {{objdump -d armv4-bx.d}} "armv4-bx"} + {"Armv8.1-M Mainline BF" "-r -Ttext 0x1000 --section-start .foo=0x1001000" "" "-march=armv8.1-m.main" {bf.s} + {{objdump -dr bf.d}} + "bf"} + {"R_ARM_THM_JUMP24 Relocation veneers: Short 1" "--no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000" "" "-march=armv7-a -mthumb" diff --git a/ld/testsuite/ld-arm/bf.d b/ld/testsuite/ld-arm/bf.d new file mode 100644 index 0000000..658120a --- /dev/null +++ b/ld/testsuite/ld-arm/bf.d @@ -0,0 +1,14 @@ + +.*: file format elf32-.*arm + + +Disassembly of section .text: + +00001000 <_start>: + 1000: f0df e7ff bf 2, 1001000 <bar> + 1000: R_ARM_THM_BF16 bar + +Disassembly of section .foo: + +01001000 <bar>: + 1001000: 4770 bx lr diff --git a/ld/testsuite/ld-arm/bf.s b/ld/testsuite/ld-arm/bf.s new file mode 100644 index 0000000..164a90d --- /dev/null +++ b/ld/testsuite/ld-arm/bf.s @@ -0,0 +1,19 @@ + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bf 2, bar + +@ We will place the section .foo at 0x1001000. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + |