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| author | Alan Modra <amodra@gmail.com> | 2020-01-20 12:33:29 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-01-20 18:58:05 +1030 |
| commit | b9ca1af69e097b8dc15b23a4e12194f9567c4ad7 (patch) | |
| tree | fd79a39913d96fc6411b90855e94fb103d1604af /ld/testsuite/ld-powerpc/tlsexetocno.d | |
| parent | ed7007c18a83d0d654c366d507fcf053985c698b (diff) | |
| download | gdb-b9ca1af69e097b8dc15b23a4e12194f9567c4ad7.zip gdb-b9ca1af69e097b8dc15b23a4e12194f9567c4ad7.tar.gz gdb-b9ca1af69e097b8dc15b23a4e12194f9567c4ad7.tar.bz2 | |
Don't touch r11 in __tls_get_addr stub
This modifies the special __tls_get_addr stub that checks for a
tlsdesc style __tls_index entry and returns early. Not using r11
isn't much benefit at the moment but a followup patch will preserve
regs around the first call to __tls_get_addr when the __tls_index
entry isn't yet set up for an early return.
bfd/
* elf64-ppc.c (LD_R11_0R3, CMPDI_R11_0, STD_R11_0R1, LD_R11_0R1),
(MTLR_R11): Don't define.
(LD_R0_0R3, CMPDI_R0_0): Define.
(build_tls_get_addr_stub): Don't use r11 in stub.
ld/
* testsuite/ld-powerpc/tlsexe.d: Match new __tls_get_addr stub.
* testsuite/ld-powerpc/tlsexeno.d: Likewise.
* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
* testsuite/ld-powerpc/tlsexetocno.d: Likewise.
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
Diffstat (limited to 'ld/testsuite/ld-powerpc/tlsexetocno.d')
| -rw-r--r-- | ld/testsuite/ld-powerpc/tlsexetocno.d | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/ld/testsuite/ld-powerpc/tlsexetocno.d b/ld/testsuite/ld-powerpc/tlsexetocno.d index 4f3b7a2..4ef750d 100644 --- a/ld/testsuite/ld-powerpc/tlsexetocno.d +++ b/ld/testsuite/ld-powerpc/tlsexetocno.d @@ -9,23 +9,23 @@ Disassembly of section \.text: .* <.*plt_call\.__tls_get_addr(|_opt)>: -.*: (e9 63 00 00|00 00 63 e9) ld r11,0\(r3\) +.*: (e8 03 00 00|00 00 03 e8) ld r0,0\(r3\) .*: (e9 83 00 08|08 00 83 e9) ld r12,8\(r3\) +.*: (2c 20 00 00|00 00 20 2c) cmpdi r0,0 .*: (7c 60 1b 78|78 1b 60 7c) mr r0,r3 -.*: (2c 2b 00 00|00 00 2b 2c) cmpdi r11,0 .*: (7c 6c 6a 14|14 6a 6c 7c) add r3,r12,r13 -.*: (4d 82 00 20|20 00 82 4d) beqlr +.*: (4d 82 00 20|20 00 82 4d) beqlr * .*: (7c 03 03 78|78 03 03 7c) mr r3,r0 -.*: (7d 68 02 a6|a6 02 68 7d) mflr r11 -.*: (f9 61 00 20|20 00 61 f9) std r11,32\(r1\) +.*: (7c 08 02 a6|a6 02 08 7c) mflr r0 +.*: (f8 01 00 20|20 00 01 f8) std r0,32\(r1\) .*: (f8 41 00 28|28 00 41 f8) std r2,40\(r1\) .*: (e9 82 80 70|70 80 82 e9) ld r12,-32656\(r2\) .*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 .*: (e8 42 80 78|78 80 42 e8) ld r2,-32648\(r2\) .*: (4e 80 04 21|21 04 80 4e) bctrl .*: (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\) -.*: (e9 61 00 20|20 00 61 e9) ld r11,32\(r1\) -.*: (7d 68 03 a6|a6 03 68 7d) mtlr r11 +.*: (e8 01 00 20|20 00 01 e8) ld r0,32\(r1\) +.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0 .*: (4e 80 00 20|20 00 80 4e) blr .* <\._start>: |