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authorAlan Modra <amodra@gmail.com>2019-09-04 15:30:37 +0930
committerAlan Modra <amodra@gmail.com>2019-09-05 13:56:20 +0930
commit77486630b13e9e586b0a1556cba9876a0ede99da (patch)
tree161e6fdbc465968b10e3a7be716026b1f6acf33c /ld/testsuite/ld-powerpc/pcrelopt.d
parent89bdc77eabf5ede68322f6e47e003c1dc45b9ccb (diff)
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R_PPC64_PCREL_OPT
The loads and stores handled in the second instruction of a sequence marked by R_PPC64_PCREL_OPT may be a prefix instruction. For example: pld ra,symbol@got@pcrel 0: pld rt,off(ra) .reloc 0b-8,R_PPC64_PCREL_OPT,(.-8)-(0b-8) can be optimised to pld rt,symbol+off@pcrel pnop * elf64-ppc.c (xlate_pcrel_opt): Handle prefix loads and stores in second instruction. (ppc64_elf_relocate_section): Likewise.
Diffstat (limited to 'ld/testsuite/ld-powerpc/pcrelopt.d')
-rw-r--r--ld/testsuite/ld-powerpc/pcrelopt.d17
1 files changed, 12 insertions, 5 deletions
diff --git a/ld/testsuite/ld-powerpc/pcrelopt.d b/ld/testsuite/ld-powerpc/pcrelopt.d
index 18fdb95..aeaa0cd 100644
--- a/ld/testsuite/ld-powerpc/pcrelopt.d
+++ b/ld/testsuite/ld-powerpc/pcrelopt.d
@@ -80,10 +80,17 @@ Disassembly of section \.text:
.*: (04 10 00 01|01 00 10 04) pstxv vs0,66028
.*: (d8 00 01 ec|ec 01 00 d8)
.*: (60 00 00 00|00 00 00 60) nop
-.*: (04 10 00 01|01 00 10 04) pld r9,66008
-.*: (e5 20 01 d8|d8 01 20 e5)
-.*: (e8 09 00 00|00 00 09 e8) ld r0,0\(r9\)
+.*: (06 10 00 01|01 00 10 06) plbz r3,70676
+.*: (88 60 14 14|14 14 60 88)
+.*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop
-.*: (06 10 00 01|01 00 10 06) pla r7,66000
-.*: (38 e0 01 d0|d0 01 e0 38)
+.*: (04 10 12 35|35 12 10 04) plq r4,305485896
+.*: (e0 80 58 48|48 58 80 e0)
+.*: (07 00 00 00|00 00 00 07) pnop
+.*: (00 00 00 00|00 00 00 00)
+.*: (04 10 00 01|01 00 10 04) pld r9,65976
+.*: (e5 20 01 b8|b8 01 20 e5)
+.*: (e8 09 00 00|00 00 09 e8) ld r0,0\(r9\)
+.*: (06 10 00 01|01 00 10 06) pla r7,65972
+.*: (38 e0 01 b4|b4 01 e0 38)
.*: (88 c7 00 00|00 00 c7 88) lbz r6,0\(r7\)